1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2011 Freescale Semiconductor, Inc.
4 * Andy Fleming <afleming@gmail.com>
6 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
12 #include <linux/list.h>
13 #include <linux/mii.h>
14 #include <linux/ethtool.h>
15 #include <linux/mdio.h>
16 #include <phy_interface.h>
18 #define PHY_FIXED_ID 0xa5a55a5a
20 #define PHY_MAX_ADDR 32
22 #define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
24 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
28 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
29 SUPPORTED_10baseT_Full)
31 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
32 SUPPORTED_100baseT_Full)
34 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
35 SUPPORTED_1000baseT_Full)
37 #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
38 PHY_100BT_FEATURES | \
41 #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
44 #define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
45 SUPPORTED_10000baseT_Full)
47 #ifndef PHY_ANEG_TIMEOUT
48 #define PHY_ANEG_TIMEOUT 4000
54 #define MDIO_NAME_LEN 32
57 struct list_head link;
58 char name[MDIO_NAME_LEN];
60 int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
61 int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
63 int (*reset)(struct mii_dev *bus);
64 struct phy_device *phymap[PHY_MAX_ADDR];
68 /* struct phy_driver: a structure which defines PHY behavior
70 * uid will contain a number which represents the PHY. During
71 * startup, the driver will poll the PHY to find out what its
72 * UID--as defined by registers 2 and 3--is. The 32-bit result
73 * gotten from the PHY will be masked to
74 * discard any bits which may change based on revision numbers
75 * unimportant to functionality
86 /* Called to do any driver startup necessities */
87 /* Will be called during phy_connect */
88 int (*probe)(struct phy_device *phydev);
90 /* Called to configure the PHY, and modify the controller
91 * based on the results. Should be called after phy_connect */
92 int (*config)(struct phy_device *phydev);
94 /* Called when starting up the controller */
95 int (*startup)(struct phy_device *phydev);
97 /* Called when bringing down the controller */
98 int (*shutdown)(struct phy_device *phydev);
100 int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
101 int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
103 struct list_head list;
107 /* Information about the PHY type */
108 /* And management functions */
110 struct phy_driver *drv;
116 struct eth_device *dev;
119 /* forced speed & duplex (no autoneg)
120 * partner speed & duplex & pause (autoneg)
125 /* The most recently read link state */
128 phy_interface_t interface;
150 static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
152 struct mii_dev *bus = phydev->bus;
154 return bus->read(bus, phydev->addr, devad, regnum);
157 static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
160 struct mii_dev *bus = phydev->bus;
162 return bus->write(bus, phydev->addr, devad, regnum, val);
165 #ifdef CONFIG_PHYLIB_10G
166 extern struct phy_driver gen10g_driver;
168 /* For now, XGMII is the only 10G interface */
169 static inline int is_10g_interface(phy_interface_t interface)
171 return interface == PHY_INTERFACE_MODE_XGMII;
177 int phy_reset(struct phy_device *phydev);
178 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
179 phy_interface_t interface);
181 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
182 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
184 phy_interface_t interface);
186 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
187 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
188 struct eth_device *dev,
189 phy_interface_t interface);
191 int phy_startup(struct phy_device *phydev);
192 int phy_config(struct phy_device *phydev);
193 int phy_shutdown(struct phy_device *phydev);
194 int phy_register(struct phy_driver *drv);
195 int phy_set_supported(struct phy_device *phydev, u32 max_speed);
196 int genphy_config_aneg(struct phy_device *phydev);
197 int genphy_restart_aneg(struct phy_device *phydev);
198 int genphy_update_link(struct phy_device *phydev);
199 int genphy_parse_link(struct phy_device *phydev);
200 int genphy_config(struct phy_device *phydev);
201 int genphy_startup(struct phy_device *phydev);
202 int genphy_shutdown(struct phy_device *phydev);
203 int gen10g_config(struct phy_device *phydev);
204 int gen10g_startup(struct phy_device *phydev);
205 int gen10g_shutdown(struct phy_device *phydev);
206 int gen10g_discover_mmds(struct phy_device *phydev);
208 int phy_b53_init(void);
209 int phy_mv88e61xx_init(void);
210 int phy_aquantia_init(void);
211 int phy_atheros_init(void);
212 int phy_broadcom_init(void);
213 int phy_cortina_init(void);
214 int phy_davicom_init(void);
215 int phy_et1011c_init(void);
216 int phy_lxt_init(void);
217 int phy_marvell_init(void);
218 int phy_micrel_ksz8xxx_init(void);
219 int phy_micrel_ksz90x1_init(void);
220 int phy_meson_gxl_init(void);
221 int phy_natsemi_init(void);
222 int phy_realtek_init(void);
223 int phy_smsc_init(void);
224 int phy_teranetics_init(void);
225 int phy_ti_init(void);
226 int phy_vitesse_init(void);
227 int phy_xilinx_init(void);
228 int phy_mscc_init(void);
229 int phy_fixed_init(void);
231 int board_phy_config(struct phy_device *phydev);
232 int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
235 * phy_get_interface_by_name() - Look up a PHY interface name
237 * @str: PHY interface name, e.g. "mii"
238 * @return PHY_INTERFACE_MODE_... value, or -1 if not found
240 int phy_get_interface_by_name(const char *str);
243 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
244 * is RGMII (all variants)
245 * @phydev: the phy_device struct
247 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
249 return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
250 phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
254 * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
255 * is SGMII (all variants)
256 * @phydev: the phy_device struct
258 static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
260 return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
261 phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
264 /* PHY UIDs for various PHYs that are referenced in external code */
265 #define PHY_UID_CS4340 0x13e51002
266 #define PHY_UID_CS4223 0x03e57003
267 #define PHY_UID_TN2020 0x00a19410