1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2011 Freescale Semiconductor, Inc.
4 * Andy Fleming <afleming@gmail.com>
6 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
13 #include <phy_interface.h>
14 #include <dm/ofnode.h>
16 #include <linux/errno.h>
17 #include <linux/list.h>
18 #include <linux/mii.h>
19 #include <linux/ethtool.h>
20 #include <linux/mdio.h>
24 #define PHY_FIXED_ID 0xa5a55a5a
25 #define PHY_NCSI_ID 0xbeefcafe
28 * There is no actual id for this.
29 * This is just a dummy id for gmii2rgmmi converter.
31 #define PHY_GMII2RGMII_ID 0x5a5a5a5a
33 #define PHY_MAX_ADDR 32
35 #define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
37 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
41 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
42 SUPPORTED_10baseT_Full)
44 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
45 SUPPORTED_100baseT_Full)
47 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
48 SUPPORTED_1000baseT_Full)
50 #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
51 PHY_100BT_FEATURES | \
54 #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
57 #define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
58 SUPPORTED_10000baseT_Full)
60 #ifndef PHY_ANEG_TIMEOUT
61 #define PHY_ANEG_TIMEOUT 4000
67 #define MDIO_NAME_LEN 32
70 struct list_head link;
71 char name[MDIO_NAME_LEN];
73 int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
74 int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
76 int (*reset)(struct mii_dev *bus);
77 struct phy_device *phymap[PHY_MAX_ADDR];
81 /* struct phy_driver: a structure which defines PHY behavior
83 * uid will contain a number which represents the PHY. During
84 * startup, the driver will poll the PHY to find out what its
85 * UID--as defined by registers 2 and 3--is. The 32-bit result
86 * gotten from the PHY will be masked to
87 * discard any bits which may change based on revision numbers
88 * unimportant to functionality
99 /* Called to do any driver startup necessities */
100 /* Will be called during phy_connect */
101 int (*probe)(struct phy_device *phydev);
103 /* Called to configure the PHY, and modify the controller
104 * based on the results. Should be called after phy_connect */
105 int (*config)(struct phy_device *phydev);
107 /* Called when starting up the controller */
108 int (*startup)(struct phy_device *phydev);
110 /* Called when bringing down the controller */
111 int (*shutdown)(struct phy_device *phydev);
113 int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
114 int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
117 /* Phy specific driver override for reading a MMD register */
118 int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
120 /* Phy specific driver override for writing a MMD register */
121 int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
124 struct list_head list;
126 /* driver private data */
131 /* Information about the PHY type */
132 /* And management functions */
134 struct phy_driver *drv;
141 struct eth_device *dev;
144 /* forced speed & duplex (no autoneg)
145 * partner speed & duplex & pause (autoneg)
150 /* The most recently read link state */
153 phy_interface_t interface;
177 * phy_read - Convenience function for reading a given PHY register
178 * @phydev: the phy_device struct
179 * @devad: The MMD to read from
180 * @regnum: register number to read
181 * @return: value for success or negative errno for failure
183 static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
185 struct mii_dev *bus = phydev->bus;
187 if (!bus || !bus->read) {
188 debug("%s: No bus configured\n", __func__);
192 return bus->read(bus, phydev->addr, devad, regnum);
196 * phy_write - Convenience function for writing a given PHY register
197 * @phydev: the phy_device struct
198 * @devad: The MMD to read from
199 * @regnum: register number to write
200 * @val: value to write to @regnum
201 * @return: 0 for success or negative errno for failure
203 static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
206 struct mii_dev *bus = phydev->bus;
208 if (!bus || !bus->write) {
209 debug("%s: No bus configured\n", __func__);
213 return bus->write(bus, phydev->addr, devad, regnum, val);
217 * phy_mmd_start_indirect - Convenience function for writing MMD registers
218 * @phydev: the phy_device struct
219 * @devad: The MMD to read from
220 * @regnum: register number to write
223 static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
226 /* Write the desired MMD Devad */
227 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
229 /* Write the desired MMD register address */
230 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
232 /* Select the Function : DATA with no post increment */
233 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
234 (devad | MII_MMD_CTRL_NOINCR));
238 * phy_read_mmd - Convenience function for reading a register
239 * from an MMD on a given PHY.
240 * @phydev: The phy_device struct
241 * @devad: The MMD to read from
242 * @regnum: The register on the MMD to read
243 * @return: Value for success or negative errno for failure
245 static inline int phy_read_mmd(struct phy_device *phydev, int devad,
248 struct phy_driver *drv = phydev->drv;
250 if (regnum > (u16)~0 || devad > 32)
253 /* driver-specific access */
255 return drv->read_mmd(phydev, devad, regnum);
257 /* direct C45 / C22 access */
258 if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
259 devad == MDIO_DEVAD_NONE || !devad)
260 return phy_read(phydev, devad, regnum);
262 /* indirect C22 access */
263 phy_mmd_start_indirect(phydev, devad, regnum);
265 /* Read the content of the MMD's selected register */
266 return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
270 * phy_write_mmd - Convenience function for writing a register
271 * on an MMD on a given PHY.
272 * @phydev: The phy_device struct
273 * @devad: The MMD to read from
274 * @regnum: The register on the MMD to read
275 * @val: value to write to @regnum
276 * @return: 0 for success or negative errno for failure
278 static inline int phy_write_mmd(struct phy_device *phydev, int devad,
281 struct phy_driver *drv = phydev->drv;
283 if (regnum > (u16)~0 || devad > 32)
286 /* driver-specific access */
288 return drv->write_mmd(phydev, devad, regnum, val);
290 /* direct C45 / C22 access */
291 if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
292 devad == MDIO_DEVAD_NONE || !devad)
293 return phy_write(phydev, devad, regnum, val);
295 /* indirect C22 access */
296 phy_mmd_start_indirect(phydev, devad, regnum);
298 /* Write the data into MMD's selected register */
299 return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
303 * phy_set_bits_mmd - Convenience function for setting bits in a register
305 * @phydev: the phy_device struct
306 * @devad: the MMD containing register to modify
307 * @regnum: register number to modify
309 * @return: 0 for success or negative errno for failure
311 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
316 value = phy_read_mmd(phydev, devad, regnum);
322 ret = phy_write_mmd(phydev, devad, regnum, value);
330 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
332 * @phydev: the phy_device struct
333 * @devad: the MMD containing register to modify
334 * @regnum: register number to modify
335 * @val: bits to clear
336 * @return: 0 for success or negative errno for failure
338 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
343 value = phy_read_mmd(phydev, devad, regnum);
349 ret = phy_write_mmd(phydev, devad, regnum, value);
356 #ifdef CONFIG_PHYLIB_10G
357 extern struct phy_driver gen10g_driver;
360 * List all 10G interfaces here, the assumption being that PHYs on these
363 static inline int is_10g_interface(phy_interface_t interface)
365 return interface == PHY_INTERFACE_MODE_XGMII ||
366 interface == PHY_INTERFACE_MODE_USXGMII ||
367 interface == PHY_INTERFACE_MODE_XFI;
373 * phy_init() - Initializes the PHY drivers
374 * This function registers all available PHY drivers
376 * @return: 0 if OK, -ve on error
381 * phy_reset() - Resets the specified PHY
382 * Issues a reset of the PHY and waits for it to complete
384 * @phydev: PHY to reset
385 * @return: 0 if OK, -ve on error
387 int phy_reset(struct phy_device *phydev);
390 * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
391 * The function checks the PHY addresses flagged in phy_mask and returns a
392 * phy_device pointer if it detects a PHY.
393 * This function should only be called if just one PHY is expected to be present
394 * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
395 * it is undefined which of these PHYs is returned.
397 * @bus: MII/MDIO bus to scan
398 * @phy_mask: bitmap of PYH addresses to scan
399 * @interface: type of MAC-PHY interface
400 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
402 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
403 phy_interface_t interface);
408 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
409 * @phydev: PHY device
410 * @dev: Ethernet device
412 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
415 * phy_connect() - Creates a PHY device for the Ethernet interface
416 * Creates a PHY device for the PHY at the given address, if one doesn't exist
417 * already, and associates it with the Ethernet device.
418 * The function may be called with addr <= 0, in this case addr value is ignored
419 * and the bus is scanned to detect a PHY. Scanning should only be used if only
420 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
421 * which PHY is returned.
423 * @bus: MII/MDIO bus that hosts the PHY
424 * @addr: PHY address on MDIO bus
425 * @dev: Ethernet device to associate to the PHY
426 * @interface: type of MAC-PHY interface
427 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
429 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
431 phy_interface_t interface);
433 static inline ofnode phy_get_ofnode(struct phy_device *phydev)
435 if (ofnode_valid(phydev->node))
438 return dev_ofnode(phydev->dev);
443 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
444 * @phydev: PHY device
445 * @dev: Ethernet device
447 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
450 * phy_connect() - Creates a PHY device for the Ethernet interface
451 * Creates a PHY device for the PHY at the given address, if one doesn't exist
452 * already, and associates it with the Ethernet device.
453 * The function may be called with addr <= 0, in this case addr value is ignored
454 * and the bus is scanned to detect a PHY. Scanning should only be used if only
455 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
456 * which PHY is returned.
458 * @bus: MII/MDIO bus that hosts the PHY
459 * @addr: PHY address on MDIO bus
460 * @dev: Ethernet device to associate to the PHY
461 * @interface: type of MAC-PHY interface
462 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
464 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
465 struct eth_device *dev,
466 phy_interface_t interface);
468 static inline ofnode phy_get_ofnode(struct phy_device *phydev)
470 return ofnode_null();
473 int phy_startup(struct phy_device *phydev);
474 int phy_config(struct phy_device *phydev);
475 int phy_shutdown(struct phy_device *phydev);
476 int phy_register(struct phy_driver *drv);
477 int phy_set_supported(struct phy_device *phydev, u32 max_speed);
478 int genphy_config_aneg(struct phy_device *phydev);
479 int genphy_restart_aneg(struct phy_device *phydev);
480 int genphy_update_link(struct phy_device *phydev);
481 int genphy_parse_link(struct phy_device *phydev);
482 int genphy_config(struct phy_device *phydev);
483 int genphy_startup(struct phy_device *phydev);
484 int genphy_shutdown(struct phy_device *phydev);
485 int gen10g_config(struct phy_device *phydev);
486 int gen10g_startup(struct phy_device *phydev);
487 int gen10g_shutdown(struct phy_device *phydev);
488 int gen10g_discover_mmds(struct phy_device *phydev);
490 int phy_b53_init(void);
491 int phy_mv88e61xx_init(void);
492 int phy_aquantia_init(void);
493 int phy_atheros_init(void);
494 int phy_broadcom_init(void);
495 int phy_cortina_init(void);
496 int phy_cortina_access_init(void);
497 int phy_davicom_init(void);
498 int phy_et1011c_init(void);
499 int phy_lxt_init(void);
500 int phy_marvell_init(void);
501 int phy_micrel_ksz8xxx_init(void);
502 int phy_micrel_ksz90x1_init(void);
503 int phy_meson_gxl_init(void);
504 int phy_natsemi_init(void);
505 int phy_realtek_init(void);
506 int phy_smsc_init(void);
507 int phy_teranetics_init(void);
508 int phy_ti_init(void);
509 int phy_vitesse_init(void);
510 int phy_xilinx_init(void);
511 int phy_mscc_init(void);
512 int phy_fixed_init(void);
513 int phy_ncsi_init(void);
514 int phy_xilinx_gmii2rgmii_init(void);
516 int board_phy_config(struct phy_device *phydev);
517 int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
520 * phy_get_interface_by_name() - Look up a PHY interface name
522 * @str: PHY interface name, e.g. "mii"
523 * @return: PHY_INTERFACE_MODE_... value, or -1 if not found
525 int phy_get_interface_by_name(const char *str);
528 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
529 * is RGMII (all variants)
530 * @phydev: the phy_device struct
531 * @return: true if MII bus is RGMII or false if it is not
533 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
535 return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
536 phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
540 * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
541 * is SGMII (all variants)
542 * @phydev: the phy_device struct
543 * @return: true if MII bus is SGMII or false if it is not
545 static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
547 return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
548 phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
551 /* PHY UIDs for various PHYs that are referenced in external code */
552 #define PHY_UID_CS4340 0x13e51002
553 #define PHY_UID_CS4223 0x03e57003
554 #define PHY_UID_TN2020 0x00a19410
555 #define PHY_UID_IN112525_S03 0x02107440