1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (c) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
12 #define BIOS_CTRL_BIOSWE BIT(0)
14 /* All the supported PCH ioctls */
16 /* Returns HDA config info if Azalia V1CTL enabled, -ENOENT if not */
19 PCH_REQ_TEST1, /* Test requests for sandbox driver */
23 PCH_REQ_COUNT, /* Number of ioctrls supported */
27 * struct pch_ops - Operations for the Platform Controller Hub
29 * Consider using ioctl() to add rarely used or driver-specific operations.
33 * get_spi_base() - get the address of SPI base
35 * @dev: PCH device to check
36 * @sbasep: Returns address of SPI base if available, else 0
37 * @return 0 if OK, -ve on error (e.g. there is no SPI base)
39 int (*get_spi_base)(struct udevice *dev, ulong *sbasep);
42 * set_spi_protect() - set whether SPI flash is protected or not
44 * @dev: PCH device to adjust
45 * @protect: true to protect, false to unprotect
47 * @return 0 on success, -ENOSYS if not implemented
49 int (*set_spi_protect)(struct udevice *dev, bool protect);
52 * get_gpio_base() - get the address of GPIO base
54 * @dev: PCH device to check
55 * @gbasep: Returns address of GPIO base if available, else 0
56 * @return 0 if OK, -ve on error (e.g. there is no GPIO base)
58 int (*get_gpio_base)(struct udevice *dev, u32 *gbasep);
61 * get_io_base() - get the address of IO base
63 * @dev: PCH device to check
64 * @iobasep: Returns address of IO base if available, else 0
65 * @return 0 if OK, -ve on error (e.g. there is no IO base)
67 int (*get_io_base)(struct udevice *dev, u32 *iobasep);
70 * ioctl() - perform misc read/write operations
72 * This is a catch-all operation intended to avoid adding lots of
73 * methods to this uclass, of which few are commonly used. Uncommon
74 * operations that pertain only to a few devices in this uclass should
75 * use this method instead of adding new methods.
77 * @dev: PCH device to check
78 * @req: PCH request ID
79 * @data: Input/output data
80 * @size: Size of input data (and maximum size of output data)
81 * @return size of output data on sucesss, -ve on error
83 int (*ioctl)(struct udevice *dev, enum pch_req_t req, void *data,
87 #define pch_get_ops(dev) ((struct pch_ops *)(dev)->driver->ops)
90 * pch_get_spi_base() - get the address of SPI base
92 * @dev: PCH device to check
93 * @sbasep: Returns address of SPI base if available, else 0
94 * @return 0 if OK, -ve on error (e.g. there is no SPI base)
96 int pch_get_spi_base(struct udevice *dev, ulong *sbasep);
99 * set_spi_protect() - set whether SPI flash is protected or not
101 * @dev: PCH device to adjust
102 * @protect: true to protect, false to unprotect
104 * @return 0 on success, -ENOSYS if not implemented
106 int pch_set_spi_protect(struct udevice *dev, bool protect);
109 * pch_get_gpio_base() - get the address of GPIO base
111 * @dev: PCH device to check
112 * @gbasep: Returns address of GPIO base if available, else 0
113 * @return 0 if OK, -ve on error (e.g. there is no GPIO base)
115 int pch_get_gpio_base(struct udevice *dev, u32 *gbasep);
118 * pch_get_io_base() - get the address of IO base
120 * @dev: PCH device to check
121 * @iobasep: Returns address of IO base if available, else 0
122 * @return 0 if OK, -ve on error (e.g. there is no IO base)
124 int pch_get_io_base(struct udevice *dev, u32 *iobasep);
127 * pch_ioctl() - perform misc read/write operations
129 * This is a catch-all operation intended to avoid adding lots of
130 * methods to this uclass, of which few are commonly used. Uncommon
131 * operations that pertain only to a few devices in this uclass should
132 * use this method instead of adding new methods.
134 * @dev: PCH device to check
135 * @req: PCH request ID
136 * @data: Input/output data
137 * @size: Size of input data (and maximum size of output data)
138 * @return size of output data on sucesss, -ve on error
140 int pch_ioctl(struct udevice *dev, ulong req, void *data, int size);