1 /* Opcode decoder for the TI MSP430
2 Copyright (C) 2012-2018 Free Software Foundation, Inc.
3 Written by DJ Delorie <dj@redhat.com>
5 This file is part of GDB, the GNU Debugger.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
29 /* Double-operand instructions - all repeat .REPEATS times. */
30 MSO_mov, /* dest = src */
31 MSO_add, /* dest += src */
32 MSO_addc, /* dest += src + carry */
33 MSO_subc, /* dest -= (src-1) + carry */
34 MSO_sub, /* dest -= src */
35 MSO_cmp, /* dest - src -> status */
36 MSO_dadd, /* dest += src (as BCD) */
37 MSO_bit, /* dest & src -> status */
38 MSO_bic, /* dest &= ~src (bit clear) */
39 MSO_bis, /* dest |= src (bit set, OR) */
40 MSO_xor, /* dest ^= src */
41 MSO_and, /* dest &= src */
43 /* Single-operand instructions. */
44 MSO_rrc, /* Rotate through carry, dest >>= .REPEATS. */
45 MSO_swpb, /* Swap lower bytes of operand. */
46 MSO_rra, /* Signed shift dest >>= .REPEATS. */
47 MSO_sxt, /* Sign extend lower byte. */
48 MSO_push, /* Push .REPEATS registers (or other op) starting at SRC going towards R0. */
49 MSO_pop, /* Pop .REPEATS registers starting at DEST going towards R15. */
54 MSO_jmp, /* PC = SRC if .COND true. */
56 /* Extended single-operand instructions. */
57 MSO_rru, /* Unsigned shift right, dest >>= .REPEATS. */
64 MSP430_Operand_Immediate,
65 MSP430_Operand_Register,
66 MSP430_Operand_Indirect,
67 MSP430_Operand_Indirect_Postinc
68 } MSP430_Operand_Type;
82 MSP430_Operand_Type type;
84 MSP430_Register reg : 8;
85 MSP430_Register reg2 : 8;
86 unsigned char bit_number : 4;
87 unsigned char condition : 3;
88 } MSP430_Opcode_Operand;
90 /* These numerically match the bit encoding. */
103 #define MSP430_FLAG_C 0x01
104 #define MSP430_FLAG_Z 0x02
105 #define MSP430_FLAG_N 0x04
106 #define MSP430_FLAG_V 0x80
112 unsigned flags_1:8; /* These flags are set to '1' by the insn. */
113 unsigned flags_0:8; /* These flags are set to '0' by the insn. */
114 unsigned flags_set:8; /* These flags are set appropriately by the insn. */
115 unsigned zc:1; /* If set, pretend the carry bit is zero. */
116 unsigned repeat_reg:1; /* If set, count is in REG[repeats]. */
117 unsigned ofs_430x:1; /* If set, the offset in any operand is 430x (else use 430 compatibility mode). */
118 unsigned repeats:5; /* Contains COUNT-1, or register number. */
119 int n_bytes; /* Opcode size in BYTES. */
121 int size; /* Operand size in BITS. */
122 MSP430_Condition cond;
123 /* By convention, these are [0]destination, [1]source. */
124 MSP430_Opcode_Operand op[2];
125 } MSP430_Opcode_Decoded;
127 int msp430_decode_opcode (unsigned long, MSP430_Opcode_Decoded *, int (*)(void *), void *);