include/opcode/arm.h

   1 /* ARM assembler/disassembler support.
   2    Copyright (C) 2004-2015 Free Software Foundation, Inc.
   3
   4    This file is part of GDB and GAS.
   5
   6    GDB and GAS are free software; you can redistribute it and/or
   7    modify it under the terms of the GNU General Public License as
   8    published by the Free Software Foundation; either version 3, or (at
   9    your option) any later version.
  10
  11    GDB and GAS are distributed in the hope that it will be useful, but
  12    WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14    General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with GDB or GAS; see the file COPYING3.  If not, write to the
  18    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
  19    MA 02110-1301, USA.  */
  20
  21 /* The following bitmasks control CPU extensions:  */
  22 #define ARM_EXT_V1       0x00000001     /* All processors (core set).  */
  23 #define ARM_EXT_V2       0x00000002     /* Multiply instructions.  */
  24 #define ARM_EXT_V2S      0x00000004     /* SWP instructions.       */
  25 #define ARM_EXT_V3       0x00000008     /* MSR MRS.                */
  26 #define ARM_EXT_V3M      0x00000010     /* Allow long multiplies.  */
  27 #define ARM_EXT_V4       0x00000020     /* Allow half word loads.  */
  28 #define ARM_EXT_V4T      0x00000040     /* Thumb.                  */
  29 #define ARM_EXT_V5       0x00000080     /* Allow CLZ, etc.         */
  30 #define ARM_EXT_V5T      0x00000100     /* Improved interworking.  */
  31 #define ARM_EXT_V5ExP    0x00000200     /* DSP core set.           */
  32 #define ARM_EXT_V5E      0x00000400     /* DSP Double transfers.   */
  33 #define ARM_EXT_V5J      0x00000800     /* Jazelle extension.      */
  34 #define ARM_EXT_V6       0x00001000     /* ARM V6.                 */
  35 #define ARM_EXT_V6K      0x00002000     /* ARM V6K.                */
  36 #define ARM_EXT_V8       0x00004000     /* ARMv8 w/o atomics.      */
  37 #define ARM_EXT_V6T2     0x00008000     /* Thumb-2.                */
  38 #define ARM_EXT_DIV      0x00010000     /* Integer division.       */
  39 /* The 'M' in Arm V7M stands for Microcontroller.
  40    On earlier architecture variants it stands for Multiply.  */
  41 #define ARM_EXT_V5E_NOTM 0x00020000     /* Arm V5E but not Arm V7M. */
  42 #define ARM_EXT_V6_NOTM  0x00040000     /* Arm V6 but not Arm V7M. */
  43 #define ARM_EXT_V7       0x00080000     /* Arm V7.                 */
  44 #define ARM_EXT_V7A      0x00100000     /* Arm V7A.                */
  45 #define ARM_EXT_V7R      0x00200000     /* Arm V7R.                */
  46 #define ARM_EXT_V7M      0x00400000     /* Arm V7M.                */
  47 #define ARM_EXT_V6M      0x00800000     /* ARM V6M.                 */
  48 #define ARM_EXT_BARRIER  0x01000000     /* DSB/DMB/ISB.             */
  49 #define ARM_EXT_THUMB_MSR 0x02000000    /* Thumb MSR/MRS.           */
  50 #define ARM_EXT_V6_DSP 0x04000000       /* ARM v6 (DSP-related),
  51                                            not in v7-M.  */
  52 #define ARM_EXT_MP       0x08000000     /* Multiprocessing Extensions.  */
  53 #define ARM_EXT_SEC      0x10000000     /* Security extensions.  */
  54 #define ARM_EXT_OS       0x20000000     /* OS Extensions.  */
  55 #define ARM_EXT_ADIV     0x40000000     /* Integer divide extensions in ARM
  56                                            state.  */
  57 #define ARM_EXT_VIRT     0x80000000     /* Virtualization extensions.  */
  58
  59 #define ARM_EXT2_PAN     0x00000001     /* PAN extension.  */
  60 #define ARM_EXT2_V8_2A   0x00000002     /* ARM V8.2A.  */
  61 #define ARM_EXT2_V8M     0x00000004     /* ARM V8M.  */
  62 #define ARM_EXT2_ATOMICS 0x00000008     /* ARMv8 atomics.  */
  63
  64 /* Co-processor space extensions.  */
  65 #define ARM_CEXT_XSCALE   0x00000001    /* Allow MIA etc.          */
  66 #define ARM_CEXT_MAVERICK 0x00000002    /* Use Cirrus/DSP coprocessor.  */
  67 #define ARM_CEXT_IWMMXT   0x00000004    /* Intel Wireless MMX technology coprocessor.   */
  68 #define ARM_CEXT_IWMMXT2  0x00000008    /* Intel Wireless MMX technology coprocessor version 2.   */
  69
  70 #define FPU_ENDIAN_PURE  0x80000000     /* Pure-endian doubles.       */
  71 #define FPU_ENDIAN_BIG   0              /* Double words-big-endian.   */
  72 #define FPU_FPA_EXT_V1   0x40000000     /* Base FPA instruction set.  */
  73 #define FPU_FPA_EXT_V2   0x20000000     /* LFM/SFM.                   */
  74 #define FPU_MAVERICK     0x10000000     /* Cirrus Maverick.           */
  75 #define FPU_VFP_EXT_V1xD 0x08000000     /* Base VFP instruction set.  */
  76 #define FPU_VFP_EXT_V1   0x04000000     /* Double-precision insns.    */
  77 #define FPU_VFP_EXT_V2   0x02000000     /* ARM10E VFPr1.              */
  78 #define FPU_VFP_EXT_V3xD 0x01000000     /* VFPv3 single-precision.    */
  79 #define FPU_VFP_EXT_V3   0x00800000     /* VFPv3 double-precision.    */
  80 #define FPU_NEON_EXT_V1  0x00400000     /* Neon (SIMD) insns.         */
  81 #define FPU_VFP_EXT_D32  0x00200000     /* Registers D16-D31.         */
  82 #define FPU_VFP_EXT_FP16 0x00100000     /* Half-precision extensions. */
  83 #define FPU_NEON_EXT_FMA 0x00080000     /* Neon fused multiply-add    */
  84 #define FPU_VFP_EXT_FMA  0x00040000     /* VFP fused multiply-add     */
  85 #define FPU_VFP_EXT_ARMV8 0x00020000    /* Double-precision FP for ARMv8.  */
  86 #define FPU_NEON_EXT_ARMV8 0x00010000   /* Neon for ARMv8.  */
  87 #define FPU_CRYPTO_EXT_ARMV8 0x00008000 /* Crypto for ARMv8.  */
  88 #define CRC_EXT_ARMV8    0x00004000     /* CRC32 for ARMv8.  */
  89 #define FPU_VFP_EXT_ARMV8xD 0x00002000  /* Single-precision FP for ARMv8.  */
  90 #define FPU_NEON_EXT_RDMA 0x00001000     /* v8.1 Adv.SIMD extensions.  */
  91
  92 /* Architectures are the sum of the base and extensions.  The ARM ARM (rev E)
  93    defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
  94    ARMv5xM, ARMv5, ARMv5TxM, ARMv5T, ARMv5TExP, ARMv5TE.  To these we add
  95    three more to cover cores prior to ARM6.  Finally, there are cores which
  96    implement further extensions in the co-processor space.  */
  97 #define ARM_AEXT_V1                       ARM_EXT_V1
  98 #define ARM_AEXT_V2     (ARM_AEXT_V1    | ARM_EXT_V2)
  99 #define ARM_AEXT_V2S    (ARM_AEXT_V2    | ARM_EXT_V2S)
 100 #define ARM_AEXT_V3     (ARM_AEXT_V2S   | ARM_EXT_V3)
 101 #define ARM_AEXT_V3M    (ARM_AEXT_V3    | ARM_EXT_V3M)
 102 #define ARM_AEXT_V4xM   (ARM_AEXT_V3    | ARM_EXT_V4)
 103 #define ARM_AEXT_V4     (ARM_AEXT_V3M   | ARM_EXT_V4)
 104 #define ARM_AEXT_V4TxM  (ARM_AEXT_V4xM  | ARM_EXT_V4T)
 105 #define ARM_AEXT_V4T    (ARM_AEXT_V4    | ARM_EXT_V4T)
 106 #define ARM_AEXT_V5xM   (ARM_AEXT_V4xM  | ARM_EXT_V5)
 107 #define ARM_AEXT_V5     (ARM_AEXT_V4    | ARM_EXT_V5)
 108 #define ARM_AEXT_V5TxM  (ARM_AEXT_V5xM  | ARM_EXT_V4T | ARM_EXT_V5T)
 109 #define ARM_AEXT_V5T    (ARM_AEXT_V5    | ARM_EXT_V4T | ARM_EXT_V5T)
 110 #define ARM_AEXT_V5TExP (ARM_AEXT_V5T   | ARM_EXT_V5ExP)
 111 #define ARM_AEXT_V5TE   (ARM_AEXT_V5TExP | ARM_EXT_V5E)
 112 #define ARM_AEXT_V5TEJ  (ARM_AEXT_V5TE  | ARM_EXT_V5J)
 113 #define ARM_AEXT_V6     (ARM_AEXT_V5TEJ | ARM_EXT_V6)
 114 #define ARM_AEXT_V6K    (ARM_AEXT_V6    | ARM_EXT_V6K)
 115 #define ARM_AEXT_V6Z    (ARM_AEXT_V6K   | ARM_EXT_SEC)
 116 #define ARM_AEXT_V6KZ   (ARM_AEXT_V6K   | ARM_EXT_SEC)
 117 #define ARM_AEXT_V6T2   (ARM_AEXT_V6 \
 118     | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM | ARM_EXT_THUMB_MSR \
 119     | ARM_EXT_V6_DSP )
 120 #define ARM_AEXT_V6KT2  (ARM_AEXT_V6T2 | ARM_EXT_V6K)
 121 #define ARM_AEXT_V6ZT2  (ARM_AEXT_V6T2 | ARM_EXT_SEC)
 122 #define ARM_AEXT_V6KZT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_SEC)
 123 #define ARM_AEXT_V7_ARM (ARM_AEXT_V6KT2 | ARM_EXT_V7 | ARM_EXT_BARRIER)
 124 #define ARM_AEXT_V7A    (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
 125 #define ARM_AEXT_V7VE   (ARM_AEXT_V7A  | ARM_EXT_DIV | ARM_EXT_ADIV \
 126     | ARM_EXT_VIRT | ARM_EXT_SEC | ARM_EXT_MP)
 127 #define ARM_AEXT_V7R    (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
 128 #define ARM_AEXT_NOTM \
 129   (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM \
 130    | ARM_EXT_V6_DSP )
 131 #define ARM_AEXT_V6M_ONLY \
 132   ((ARM_EXT_BARRIER | ARM_EXT_V6M | ARM_EXT_THUMB_MSR) & ~(ARM_AEXT_NOTM))
 133 #define ARM_AEXT_V6M \
 134   ((ARM_AEXT_V6K | ARM_AEXT_V6M_ONLY) & ~(ARM_AEXT_NOTM))
 135 #define ARM_AEXT_V6SM (ARM_AEXT_V6M | ARM_EXT_OS)
 136 #define ARM_AEXT_V7M \
 137   ((ARM_AEXT_V7_ARM | ARM_EXT_V6M | ARM_EXT_V7M | ARM_EXT_DIV) \
 138    & ~(ARM_AEXT_NOTM))
 139 #define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
 140 #define ARM_AEXT_V7EM \
 141   (ARM_AEXT_V7M | ARM_EXT_V5ExP | ARM_EXT_V6_DSP)
 142 #define ARM_AEXT_V8A \
 143   (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC | ARM_EXT_DIV | ARM_EXT_ADIV \
 144    | ARM_EXT_VIRT | ARM_EXT_V8)
 145 #define ARM_AEXT2_V8_1A (ARM_EXT2_ATOMICS | ARM_EXT2_PAN)
 146 #define ARM_AEXT2_V8_2A (ARM_AEXT2_V8_1A | ARM_EXT2_V8_2A)
 147 #define ARM_AEXT_V8M_MAIN ARM_AEXT_V7M
 148 #define ARM_AEXT2_V8M   (ARM_EXT2_V8M | ARM_EXT2_ATOMICS)
 149
 150 /* Processors with specific extensions in the co-processor space.  */
 151 #define ARM_ARCH_XSCALE ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
 152 #define ARM_ARCH_IWMMXT \
 153  ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT)
 154 #define ARM_ARCH_IWMMXT2        \
 155  ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT \
 156                   | ARM_CEXT_IWMMXT2)
 157
 158 #define FPU_VFP_V1xD    (FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE)
 159 #define FPU_VFP_V1      (FPU_VFP_V1xD | FPU_VFP_EXT_V1)
 160 #define FPU_VFP_V2      (FPU_VFP_V1 | FPU_VFP_EXT_V2)
 161 #define FPU_VFP_V3D16   (FPU_VFP_V2 | FPU_VFP_EXT_V3xD | FPU_VFP_EXT_V3)
 162 #define FPU_VFP_V3      (FPU_VFP_V3D16 | FPU_VFP_EXT_D32)
 163 #define FPU_VFP_V3xD    (FPU_VFP_V1xD | FPU_VFP_EXT_V2 | FPU_VFP_EXT_V3xD)
 164 #define FPU_VFP_V4D16   (FPU_VFP_V3D16 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
 165 #define FPU_VFP_V4      (FPU_VFP_V3 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
 166 #define FPU_VFP_V4_SP_D16 (FPU_VFP_V3xD | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
 167 #define FPU_VFP_V5D16   (FPU_VFP_V4D16 | FPU_VFP_EXT_ARMV8xD | FPU_VFP_EXT_ARMV8)
 168 #define FPU_VFP_V5_SP_D16 (FPU_VFP_V4_SP_D16 | FPU_VFP_EXT_ARMV8xD)
 169 #define FPU_VFP_ARMV8   (FPU_VFP_V4 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)
 170 #define FPU_NEON_ARMV8  (FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA | FPU_NEON_EXT_ARMV8)
 171 #define FPU_CRYPTO_ARMV8 (FPU_CRYPTO_EXT_ARMV8)
 172 #define FPU_VFP_HARD    (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2 \
 173                          | FPU_VFP_EXT_V3xD | FPU_VFP_EXT_FMA | FPU_NEON_EXT_FMA \
 174                          | FPU_VFP_EXT_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_D32)
 175 #define FPU_FPA         (FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2)
 176
 177 /* Deprecated.  */
 178 #define FPU_ARCH_VFP    ARM_FEATURE_COPROC (FPU_ENDIAN_PURE)
 179
 180 #define FPU_ARCH_FPE    ARM_FEATURE_COPROC (FPU_FPA_EXT_V1)
 181 #define FPU_ARCH_FPA    ARM_FEATURE_COPROC (FPU_FPA)
 182
 183 #define FPU_ARCH_VFP_V1xD ARM_FEATURE_COPROC (FPU_VFP_V1xD)
 184 #define FPU_ARCH_VFP_V1   ARM_FEATURE_COPROC (FPU_VFP_V1)
 185 #define FPU_ARCH_VFP_V2   ARM_FEATURE_COPROC (FPU_VFP_V2)
 186 #define FPU_ARCH_VFP_V3D16      ARM_FEATURE_COPROC (FPU_VFP_V3D16)
 187 #define FPU_ARCH_VFP_V3D16_FP16 \
 188   ARM_FEATURE_COPROC (FPU_VFP_V3D16 | FPU_VFP_EXT_FP16)
 189 #define FPU_ARCH_VFP_V3   ARM_FEATURE_COPROC (FPU_VFP_V3)
 190 #define FPU_ARCH_VFP_V3_FP16    ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_VFP_EXT_FP16)
 191 #define FPU_ARCH_VFP_V3xD       ARM_FEATURE_COPROC (FPU_VFP_V3xD)
 192 #define FPU_ARCH_VFP_V3xD_FP16  ARM_FEATURE_COPROC (FPU_VFP_V3xD \
 193                                                  | FPU_VFP_EXT_FP16)
 194 #define FPU_ARCH_NEON_V1  ARM_FEATURE_COPROC (FPU_NEON_EXT_V1)
 195 #define FPU_ARCH_VFP_V3_PLUS_NEON_V1 \
 196   ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_NEON_EXT_V1)
 197 #define FPU_ARCH_NEON_FP16 \
 198   ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_FP16)
 199 #define FPU_ARCH_VFP_HARD ARM_FEATURE_COPROC (FPU_VFP_HARD)
 200 #define FPU_ARCH_VFP_V4 ARM_FEATURE_COPROC (FPU_VFP_V4)
 201 #define FPU_ARCH_VFP_V4D16 ARM_FEATURE_COPROC (FPU_VFP_V4D16)
 202 #define FPU_ARCH_VFP_V4_SP_D16 ARM_FEATURE_COPROC (FPU_VFP_V4_SP_D16)
 203 #define FPU_ARCH_VFP_V5D16 ARM_FEATURE_COPROC (FPU_VFP_V5D16)
 204 #define FPU_ARCH_VFP_V5_SP_D16 ARM_FEATURE_COPROC (FPU_VFP_V5_SP_D16)
 205 #define FPU_ARCH_NEON_VFP_V4 \
 206   ARM_FEATURE_COPROC (FPU_VFP_V4 | FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA)
 207 #define FPU_ARCH_VFP_ARMV8 ARM_FEATURE_COPROC (FPU_VFP_ARMV8)
 208 #define FPU_ARCH_NEON_VFP_ARMV8 ARM_FEATURE_COPROC (FPU_NEON_ARMV8 \
 209                                                  | FPU_VFP_ARMV8)
 210 #define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8 \
 211   ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8)
 212 #define ARCH_CRC_ARMV8 ARM_FEATURE_COPROC (CRC_EXT_ARMV8)
 213 #define FPU_ARCH_NEON_VFP_ARMV8_1 \
 214   ARM_FEATURE_COPROC (FPU_NEON_ARMV8                             \
 215                       | FPU_VFP_ARMV8                            \
 216                       | FPU_NEON_EXT_RDMA)
 217 #define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1 \
 218   ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8 \
 219                       | FPU_NEON_EXT_RDMA)
 220
 221
 222 #define FPU_ARCH_ENDIAN_PURE ARM_FEATURE_COPROC (FPU_ENDIAN_PURE)
 223
 224 #define FPU_ARCH_MAVERICK ARM_FEATURE_COPROC (FPU_MAVERICK)
 225
 226 #define ARM_ARCH_V1     ARM_FEATURE_CORE_LOW (ARM_AEXT_V1)
 227 #define ARM_ARCH_V2     ARM_FEATURE_CORE_LOW (ARM_AEXT_V2)
 228 #define ARM_ARCH_V2S    ARM_FEATURE_CORE_LOW (ARM_AEXT_V2S)
 229 #define ARM_ARCH_V3     ARM_FEATURE_CORE_LOW (ARM_AEXT_V3)
 230 #define ARM_ARCH_V3M    ARM_FEATURE_CORE_LOW (ARM_AEXT_V3M)
 231 #define ARM_ARCH_V4xM   ARM_FEATURE_CORE_LOW (ARM_AEXT_V4xM)
 232 #define ARM_ARCH_V4     ARM_FEATURE_CORE_LOW (ARM_AEXT_V4)
 233 #define ARM_ARCH_V4TxM  ARM_FEATURE_CORE_LOW (ARM_AEXT_V4TxM)
 234 #define ARM_ARCH_V4T    ARM_FEATURE_CORE_LOW (ARM_AEXT_V4T)
 235 #define ARM_ARCH_V5xM   ARM_FEATURE_CORE_LOW (ARM_AEXT_V5xM)
 236 #define ARM_ARCH_V5     ARM_FEATURE_CORE_LOW (ARM_AEXT_V5)
 237 #define ARM_ARCH_V5TxM  ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TxM)
 238 #define ARM_ARCH_V5T    ARM_FEATURE_CORE_LOW (ARM_AEXT_V5T)
 239 #define ARM_ARCH_V5TExP ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TExP)
 240 #define ARM_ARCH_V5TE   ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TE)
 241 #define ARM_ARCH_V5TEJ  ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TEJ)
 242 #define ARM_ARCH_V6     ARM_FEATURE_CORE_LOW (ARM_AEXT_V6)
 243 #define ARM_ARCH_V6K    ARM_FEATURE_CORE_LOW (ARM_AEXT_V6K)
 244 #define ARM_ARCH_V6Z    ARM_FEATURE_CORE_LOW (ARM_AEXT_V6Z)
 245 #define ARM_ARCH_V6KZ   ARM_FEATURE_CORE_LOW (ARM_AEXT_V6KZ)
 246 #define ARM_ARCH_V6T2   ARM_FEATURE_CORE_LOW (ARM_AEXT_V6T2)
 247 #define ARM_ARCH_V6KT2  ARM_FEATURE_CORE_LOW (ARM_AEXT_V6KT2)
 248 #define ARM_ARCH_V6ZT2  ARM_FEATURE_CORE_LOW (ARM_AEXT_V6ZT2)
 249 #define ARM_ARCH_V6KZT2 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6KZT2)
 250 #define ARM_ARCH_V6M    ARM_FEATURE_CORE_LOW (ARM_AEXT_V6M)
 251 #define ARM_ARCH_V6SM   ARM_FEATURE_CORE_LOW (ARM_AEXT_V6SM)
 252 #define ARM_ARCH_V7     ARM_FEATURE_CORE_LOW (ARM_AEXT_V7)
 253 #define ARM_ARCH_V7A    ARM_FEATURE_CORE_LOW (ARM_AEXT_V7A)
 254 #define ARM_ARCH_V7VE   ARM_FEATURE_CORE_LOW (ARM_AEXT_V7VE)
 255 #define ARM_ARCH_V7R    ARM_FEATURE_CORE_LOW (ARM_AEXT_V7R)
 256 #define ARM_ARCH_V7M    ARM_FEATURE_CORE_LOW (ARM_AEXT_V7M)
 257 #define ARM_ARCH_V7EM   ARM_FEATURE_CORE_LOW (ARM_AEXT_V7EM)
 258 #define ARM_ARCH_V8A    ARM_FEATURE_CORE (ARM_AEXT_V8A, ARM_EXT2_ATOMICS)
 259 #define ARM_ARCH_V8_1A  ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A,     \
 260                                      CRC_EXT_ARMV8)
 261 #define ARM_ARCH_V8_2A  ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_2A,     \
 262                                      CRC_EXT_ARMV8)
 263 #define ARM_ARCH_V8M_MAIN ARM_FEATURE_CORE (ARM_AEXT_V8M_MAIN, ARM_AEXT2_V8M)
 264
 265 /* Some useful combinations:  */
 266 #define ARM_ARCH_NONE   ARM_FEATURE_LOW (0, 0)
 267 #define FPU_NONE        ARM_FEATURE_LOW (0, 0)
 268 #define ARM_ANY         ARM_FEATURE (-1, -1, 0) /* Any basic core.  */
 269 #define ARM_FEATURE_ALL ARM_FEATURE (-1, -1, -1)/* All CPU and FPU features.  */
 270 #define FPU_ANY_HARD    ARM_FEATURE_COPROC (FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK)
 271 /* Extensions containing some Thumb-2 instructions.  If any is present, Thumb
 272    ISA is Thumb-2.  */
 273 #define ARM_ARCH_THUMB2 ARM_FEATURE_CORE_LOW (ARM_EXT_V6T2 | ARM_EXT_V7 \
 274                                               | ARM_EXT_DIV | ARM_EXT_V8)
 275 /* v7-a+sec.  */
 276 #define ARM_ARCH_V7A_SEC ARM_FEATURE_CORE_LOW (ARM_AEXT_V7A | ARM_EXT_SEC)
 277 /* v7-a+mp+sec.  */
 278 #define ARM_ARCH_V7A_MP_SEC \
 279                         ARM_FEATURE_CORE_LOW (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC)
 280 /* v7-r+idiv.  */
 281 #define ARM_ARCH_V7R_IDIV       ARM_FEATURE_CORE_LOW (ARM_AEXT_V7R | ARM_EXT_ADIV)
 282 /* Features that are present in v6M and v6S-M but not other v6 cores.  */
 283 #define ARM_ARCH_V6M_ONLY ARM_FEATURE_CORE_LOW (ARM_AEXT_V6M_ONLY)
 284 /* v8-a+fp.  */
 285 #define ARM_ARCH_V8A_FP \
 286   ARM_FEATURE (ARM_AEXT_V8A, ARM_EXT2_ATOMICS, FPU_ARCH_VFP_ARMV8)
 287 /* v8-a+simd (implies fp).  */
 288 #define ARM_ARCH_V8A_SIMD \
 289   ARM_FEATURE (ARM_AEXT_V8A, ARM_EXT2_ATOMICS, FPU_ARCH_NEON_VFP_ARMV8)
 290 /* v8-a+crypto (implies simd+fp).  */
 291 #define ARM_ARCH_V8A_CRYPTOV1 \
 292   ARM_FEATURE (ARM_AEXT_V8A, ARM_EXT2_ATOMICS, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8)
 293
 294 /* v8.1-a+fp.  */
 295 #define ARM_ARCH_V8_1A_FP \
 296   ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, FPU_ARCH_VFP_ARMV8)
 297 /* v8.1-a+simd (implies fp).  */
 298 #define ARM_ARCH_V8_1A_SIMD \
 299   ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, FPU_ARCH_NEON_VFP_ARMV8_1)
 300 /* v8.1-a+crypto (implies simd+fp).  */
 301 #define ARM_ARCH_V8_1A_CRYPTOV1 \
 302   ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1)
 303
 304
 305 /* There are too many feature bits to fit in a single word, so use a
 306    structure.  For simplicity we put all core features in array CORE
 307    and everything else in the other.  All the bits in element core[0]
 308    have been occupied, so new feature should use bit in element core[1]
 309    and use macro ARM_FEATURE to initialize the feature set variable.  */
 310 typedef struct
 311 {
 312   unsigned long core[2];
 313   unsigned long coproc;
 314 } arm_feature_set;
 315
 316 #define ARM_CPU_HAS_FEATURE(CPU,FEAT) \
 317   (((CPU).core[0] & (FEAT).core[0]) != 0 \
 318    || ((CPU).core[1] & (FEAT).core[1]) != 0 \
 319    || ((CPU).coproc & (FEAT).coproc) != 0)
 320
 321 #define ARM_CPU_IS_ANY(CPU) \
 322   ((CPU).core[0] == ((arm_feature_set)ARM_ANY).core[0] \
 323    && (CPU).core[1] == ((arm_feature_set)ARM_ANY).core[1])
 324
 325 #define ARM_MERGE_FEATURE_SETS(TARG,F1,F2)      \
 326   do {                                          \
 327     (TARG).core[0] = (F1).core[0] | (F2).core[0];\
 328     (TARG).core[1] = (F1).core[1] | (F2).core[1];\
 329     (TARG).coproc = (F1).coproc | (F2).coproc;  \
 330   } while (0)
 331
 332 #define ARM_CLEAR_FEATURE(TARG,F1,F2)           \
 333   do {                                          \
 334     (TARG).core[0] = (F1).core[0] &~ (F2).core[0];\
 335     (TARG).core[1] = (F1).core[1] &~ (F2).core[1];\
 336     (TARG).coproc = (F1).coproc &~ (F2).coproc; \
 337   } while (0)
 338
 339 #define ARM_FEATURE_COPY(F1, F2)                \
 340   do {                                          \
 341       (F1).core[0] = (F2).core[0];              \
 342       (F1).core[1] = (F2).core[1];              \
 343       (F1).coproc = (F2).coproc;                \
 344   } while (0)
 345
 346 #define ARM_FEATURE_EQUAL(T1,T2)                \
 347   ((T1).core[0] == (T2).core[0]                 \
 348    && (T1).core[1] == (T2).core[1]              \
 349    && (T1).coproc == (T2).coproc)
 350
 351 #define ARM_FEATURE_ZERO(T)                     \
 352   ((T).core[0] == 0 && (T).core[1] == 0 && (T).coproc == 0)
 353
 354 #define ARM_FEATURE_CORE_EQUAL(T1, T2)          \
 355   ((T1).core[0] == (T2).core[0] && (T1).core[1] == (T2).core[1])
 356
 357 #define ARM_FEATURE_LOW(core, coproc) {{(core), 0}, (coproc)}
 358 #define ARM_FEATURE_CORE(core1, core2) {{(core1), (core2)}, 0}
 359 #define ARM_FEATURE_CORE_LOW(core) {{(core), 0}, 0}
 360 #define ARM_FEATURE_CORE_HIGH(core) {{0, (core)}, 0}
 361 #define ARM_FEATURE_COPROC(coproc) {{0, 0}, (coproc)}
 362 #define ARM_FEATURE(core1, core2, coproc) {{(core1), (core2)}, (coproc)}