1 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
3 * sparc.h: Add '_' and '/' for v9a asr's.
4 Patch from David Miller <davem@vger.rutgers.edu>
6 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
8 * h8300.h: Bit ops with absolute addresses not in the 8 bit
9 area are not available in the base model (H8/300).
11 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
13 * m68k.h: Remove documentation of ` operand specifier.
15 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
17 * m68k.h: Document q and v operand specifiers.
19 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
21 * v850.h (struct v850_opcode): Add processors field.
22 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
24 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
25 (PROCESSOR_V850EQ): New bit constants.
29 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
31 Merge changes from Martin Hunt:
33 * d30v.h: Allow up to 64 control registers. Add
36 * d30v.h (LONG_Db): New form for delayed branches.
38 * d30v.h: (LONG_Db): New form for repeati.
40 * d30v.h (SHORT_D2B): New form.
42 * d30v.h (SHORT_A2): New form.
44 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
45 registers are used. Needed for VLIW optimization.
48 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
50 * cgen.h: Move assembler interface section
51 up so cgen_parse_operand_result is defined for cgen_parse_address.
52 (cgen_parse_address): Update prototype.
54 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
56 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
58 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
60 * i386.h (two_byte_segment_defaults): Correct base register 5 in
61 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
64 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
67 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
70 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
71 (JUMP_ON_ECX_ZERO): Remove commented out macro.
73 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
75 * v850.h (V850_NOT_R0): New flag.
77 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
79 * v850.h (struct v850_opcode): Remove flags field.
81 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
83 * v850.h (struct v850_opcode): Add flags field.
84 (struct v850_operand): Extend meaning of 'bits' and 'shift'
88 (V850E_INSTRUCTION, V850EQ_INSTRUCTION): New flags.
89 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
92 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
96 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
98 * sparc.h (sparc_opcodes): Declare as const.
100 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
102 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
103 uses single or double precision floating point resources.
104 (INSN_NO_ISA, INSN_ISA1): Define.
105 (cpu specific INSN macros): Tweak into bitmasks outside the range
108 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
110 * i386.h: Fix pand opcode.
112 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
114 * mips.h: Widen INSN_ISA and move it to a more convenient
115 bit position. Add INSN_3900.
117 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
119 * mips.h (struct mips_opcode): added new field membership.
121 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
123 * i386.h (movd): only Reg32 is allowed.
125 * i386.h: add fcomp and ud2. From Wayne Scott
126 <wscott@ichips.intel.com>.
128 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
130 * i386.h: Add MMX instructions.
132 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
134 * i386.h: Remove W modifier from conditional move instructions.
136 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
138 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
139 with no arguments to match that generated by the UnixWare
142 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
144 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
145 (cgen_parse_operand_fn): Declare.
146 (cgen_init_parse_operand): Declare.
147 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
149 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
150 (enum cgen_parse_operand_type): New enum.
152 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
154 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
156 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
160 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
162 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
165 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
167 * v850.h (extract): Make unsigned.
169 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
173 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
175 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
176 take a direction bit.
178 start-sanitize-coldfire
179 Wed Mar 19 06:24:58 1997 J.T. Conklin <jtc@cygnus.com>
181 * m68k.h (mcfmac, mcfdiv): New macros.
183 end-sanitize-coldfire
184 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
186 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
188 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
190 * sparc.h: Include <ansidecl.h>. Update function declarations to
191 use prototypes, and to use const when appropriate.
193 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
195 * mn10300.h (MN10300_OPERAND_RELAX): Define.
197 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
199 * d10v.h: Change pre_defined_registers to
200 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
202 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
204 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
205 Change mips_opcodes from const array to a pointer,
206 and change bfd_mips_num_opcodes from const int to int,
207 so that we can increase the size of the mips opcodes table
211 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
213 * d30v.h (FLAG_X): Remove unused flag.
215 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
221 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
223 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
224 (PDS_VALUE): Macro to access value field of predefined symbols.
225 (tic80_next_predefined_symbol): Add prototype.
229 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
235 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
237 * tic80.h (tic80_symbol_to_value): Change prototype to match
238 change in function, added class parameter.
240 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
242 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
243 endmask fields, which are somewhat weird in that 0 and 32 are
244 treated exactly the same.
246 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
248 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
249 rather than a constant that is 2**X. Reorder them to put bits for
250 operands that have symbolic names in the upper bits, so they can
251 be packed into an int where the lower bits contain the value that
252 corresponds to that symbolic name.
253 (predefined_symbo): Add struct.
254 (tic80_predefined_symbols): Declare array of translations.
255 (tic80_num_predefined_symbols): Declare size of that array.
256 (tic80_value_to_symbol): Declare function.
257 (tic80_symbol_to_value): Declare function.
260 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
262 * mn10200.h (MN10200_OPERAND_RELAX): Define.
265 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
267 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
268 be the destination register.
270 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
272 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
273 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
274 (TIC80_VECTOR): Define a flag bit for the flags. This one means
275 that the opcode can have two vector instructions in a single
276 32 bit word and we have to encode/decode both.
278 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
280 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
281 TIC80_OPERAND_RELATIVE for PC relative.
282 (TIC80_OPERAND_BASEREL): New flag bit for register
285 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
287 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
289 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
291 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
292 ":s" modifier for scaling.
294 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
296 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
297 (TIC80_OPERAND_M_LI): Ditto
299 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
301 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
302 (TIC80_OPERAND_CC): New define for condition code operand.
303 (TIC80_OPERAND_CR): New define for control register operand.
305 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
307 * tic80.h (struct tic80_opcode): Name changed.
308 (struct tic80_opcode): Remove format field.
309 (struct tic80_operand): Add insertion and extraction functions.
310 (TIC80_OPERAND_*): Remove old bogus values, start adding new
315 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
317 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
318 type IV instruction offsets.
321 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
326 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
328 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
330 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
332 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
333 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
334 * v850.h: Fix comment, v850_operand not powerpc_operand.
336 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
338 * mn10200.h: Flesh out structures and definitions needed by
339 the mn10200 assembler & disassembler.
341 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
343 * mips.h: Add mips16 definitions.
345 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
347 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
349 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
351 * mn10300.h (MN10300_OPERAND_PCREL): Define.
352 (MN10300_OPERAND_MEMADDR): Define.
354 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
356 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
358 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
360 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
362 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
364 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
366 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
368 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
370 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
372 * alpha.h: Don't include "bfd.h"; private relocation types are now
373 negative to minimize problems with shared libraries. Organize
374 instruction subsets by AMASK extensions and PALcode
376 (struct alpha_operand): Move flags slot for better packing.
378 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
380 * v850.h (V850_OPERAND_RELAX): New operand flag.
382 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
384 * mn10300.h (FMT_*): Move operand format definitions
387 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
389 * mn10300.h (MN10300_OPERAND_PAREN): Define.
391 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
393 * mn10300.h (mn10300_opcode): Add "format" field.
394 (MN10300_OPERAND_*): Define.
396 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
399 * mn10200.h, mn10300.h: New files.
401 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
403 * mn10x00.h: New file.
405 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
407 * v850.h: Add new flag to indicate this instruction uses a PC
410 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
412 * h8300.h (stmac): Add missing instruction.
414 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
416 * v850.h (v850_opcode): Remove "size" field. Add "memop"
419 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
421 * v850.h (V850_OPERAND_EP): Define.
423 * v850.h (v850_opcode): Add size field.
425 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
427 * v850.h (v850_operands): Add insert and extract fields, pointers
428 to functions used to handle unusual operand encoding.
429 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
430 V850_OPERAND_SIGNED): Defined.
432 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
434 * v850.h (v850_operands): Add flags field.
435 (OPERAND_REG, OPERAND_NUM): Defined.
437 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
441 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
443 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
444 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
445 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
446 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
447 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
450 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
452 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
453 a 3 bit space id instead of a 2 bit space id.
455 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
457 * d10v.h: Add some additional defines to support the
458 assembler in determining which operations can be done in parallel.
460 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
462 * h8300.h (SN): Define.
463 (eepmov.b): Renamed from "eepmov"
464 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
467 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
469 * d10v.h (OPERAND_SHIFT): New operand flag.
471 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
473 * d10v.h: Changes for divs, parallel-only instructions, and
476 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
478 * d10v.h (pd_reg): Define. Putting the definition here allows
479 the assembler and disassembler to share the same struct.
481 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
483 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
484 Williams <steve@icarus.com>.
486 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
490 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
492 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
494 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
496 * m68k.h (mcf5200): New macro.
497 Document names of coldfire control registers.
499 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
501 * h8300.h (SRC_IN_DST): Define.
503 * h8300.h (UNOP3): Mark the register operand in this insn
504 as a source operand, not a destination operand.
505 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
506 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
507 register operand with SRC_IN_DST.
509 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
513 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
515 * rs6k.h: Remove obsolete file.
517 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
519 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
520 fdivp, and fdivrp. Add ffreep.
522 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
524 * h8300.h: Reorder various #defines for readability.
525 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
526 (BITOP): Accept additional (unused) argument. All callers changed.
529 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
531 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
532 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
533 (BITOP, EBITOP): Handle new H8/S addressing modes for
535 (UNOP3): Handle new shift/rotate insns on the H8/S.
536 (insns using exr): New instructions.
537 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
539 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
541 * h8300.h (add.l): Undo Apr 5th change. The manual I had
544 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
546 * h8300.h (START): Remove.
547 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
548 and mov.l insns that can be relaxed.
550 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
552 * i386.h: Remove Abs32 from lcall.
554 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
556 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
558 Mark X,Y opcode letters as in use.
560 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
562 * sparc.h (F_FLOAT, F_FBR): Define.
564 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
566 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
568 (ABS8SRC,ABS8DST): Add ABS8MEM.
569 (add.l): Fix reg+reg variant.
570 (eepmov.w): Renamed from eepmovw.
571 (ldc,stc): Fix many cases.
573 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
575 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
577 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
579 * sparc.h (O): Mark operand letter as in use.
581 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
583 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
584 Mark operand letters uU as in use.
586 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
588 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
589 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
590 (SPARC_OPCODE_SUPPORTED): New macro.
591 (SPARC_OPCODE_CONFLICT_P): Rewrite.
594 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
596 * sparc.h (sparc_opcode_lookup_arch) Make return type in
597 declaration consistent with return type in definition.
599 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
601 * i386.h (i386_optab): Remove Data32 from pushf and popf.
603 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
605 * i386.h (i386_regtab): Add 80486 test registers.
607 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
609 * i960.h (I_HX): Define.
610 (i960_opcodes): Add HX instruction.
612 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
614 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
617 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
619 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
620 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
621 (bfd_* defines): Delete.
622 (sparc_opcode_archs): Replaces architecture_pname.
623 (sparc_opcode_lookup_arch): Declare.
624 (NUMOPCODES): Delete.
626 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
628 * sparc.h (enum sparc_architecture): Add v9a.
629 (ARCHITECTURES_CONFLICT_P): Update.
631 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
633 * i386.h: Added Pentium Pro instructions.
635 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
637 * m68k.h: Document new 'W' operand place.
639 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
641 * hppa.h: Add lci and syncdma instructions.
643 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
645 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
648 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
650 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
651 assembler's -mcom and -many switches.
653 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
655 * i386.h: Fix cmpxchg8b extension opcode description.
657 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
659 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
662 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
664 * m68k.h: Change comment: split type P into types 0, 1 and 2.
666 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
668 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
670 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
672 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
674 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
678 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
679 declarations. Remove F_ALIAS and flag field of struct
680 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
681 int. Make name and args fields of struct m68k_opcode const.
683 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
685 * sparc.h (F_NOTV9): Define.
687 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
689 * mips.h (INSN_4010): Define.
691 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
693 * m68k.h (TBL1): Reverse sense of "round" argument in result.
695 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
696 * m68k.h: Fix argument descriptions of coprocessor
697 instructions to allow only alterable operands where appropriate.
698 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
699 (m68k_opcode_aliases): Add more aliases.
701 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
703 * m68k.h: Added explcitly short-sized conditional branches, and a
704 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
705 svr4-based configurations.
707 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
709 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
710 * i386.h: added missing Data16/Data32 flags to a few instructions.
712 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
714 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
715 (OP_MASK_BCC, OP_SH_BCC): Define.
716 (OP_MASK_PREFX, OP_SH_PREFX): Define.
717 (OP_MASK_CCC, OP_SH_CCC): Define.
718 (INSN_READ_FPR_R): Define.
721 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
723 * m68k.h (enum m68k_architecture): Deleted.
724 (struct m68k_opcode_alias): New type.
725 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
726 matching constraints, values and flags. As a side effect of this,
727 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
728 as I know were never used, now may need re-examining.
729 (numopcodes): Now const.
730 (m68k_opcode_aliases, numaliases): New variables.
732 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
733 m68k_opcode_aliases; update declaration of m68k_opcodes.
735 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
737 * hppa.h (delay_type): Delete unused enumeration.
738 (pa_opcode): Replace unused delayed field with an architecture
740 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
742 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
744 * mips.h (INSN_ISA4): Define.
746 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
748 * mips.h (M_DLA_AB, M_DLI): Define.
750 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
752 * hppa.h (fstwx): Fix single-bit error.
754 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
756 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
758 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
760 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
761 debug registers. From Charles Hannum (mycroft@netbsd.org).
763 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
765 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
767 * i386.h (MOV_AX_DISP32): New macro.
768 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
769 of several call/return instructions.
770 (ADDR_PREFIX_OPCODE): New macro.
772 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
774 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
776 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
777 it pointer to const char;
778 (struct vot, field `name'): ditto.
780 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
782 * vax.h: Supply and properly group all values in end sentinel.
784 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
786 * mips.h (INSN_ISA, INSN_4650): Define.
788 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
790 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
791 systems with a separate instruction and data cache, such as the
792 29040, these instructions take an optional argument.
794 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
796 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
799 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
801 * mips.h (INSN_STORE_MEMORY): Define.
803 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
805 * sparc.h: Document new operand type 'x'.
807 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
809 * i960.h (I_CX2): New instruction category. It includes
810 instructions available on Cx and Jx processors.
811 (I_JX): New instruction category, for JX-only instructions.
812 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
813 Jx-only instructions, in I_JX category.
815 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
817 * ns32k.h (endop): Made pointer const too.
819 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
821 * ns32k.h: Drop Q operand type as there is no correct use
822 for it. Add I and Z operand types which allow better checking.
824 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
826 * h8300.h (xor.l) :fix bit pattern.
827 (L_2): New size of operand.
830 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
832 * m68k.h: Move "trap" before "tpcc" to change disassembly.
834 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
836 * sparc.h: Include v9 definitions.
838 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
840 * m68k.h (m68060): Defined.
841 (m68040up, mfloat, mmmu): Include it.
842 (struct m68k_opcode): Widen `arch' field.
843 (m68k_opcodes): Updated for M68060. Removed comments that were
844 instructions commented out by "JF" years ago.
846 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
848 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
849 add a one-bit `flags' field.
850 (F_ALIAS): New macro.
852 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
854 * h8300.h (dec, inc): Get encoding right.
856 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
858 * ppc.h (struct powerpc_operand): Removed signedp field; just use
860 (PPC_OPERAND_SIGNED): Define.
861 (PPC_OPERAND_SIGNOPT): Define.
863 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
865 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
866 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
868 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
870 * i386.h: Reverse last change. It'll be handled in gas instead.
872 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
874 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
875 slower on the 486 and used the implicit shift count despite the
876 explicit operand. The one-operand form is still available to get
877 the shorter form with the implicit shift count.
879 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
881 * hppa.h: Fix typo in fstws arg string.
883 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
885 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
887 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
889 * ppc.h (PPC_OPCODE_601): Define.
891 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
893 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
894 (so we can determine valid completers for both addb and addb[tf].)
896 * hppa.h (xmpyu): No floating point format specifier for the
899 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
901 * ppc.h (PPC_OPERAND_NEXT): Define.
902 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
903 (struct powerpc_macro): Define.
904 (powerpc_macros, powerpc_num_macros): Declare.
906 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
908 * ppc.h: New file. Header file for PowerPC opcode table.
910 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
912 * hppa.h: More minor template fixes for sfu and copr (to allow
913 for easier disassembly).
915 * hppa.h: Fix templates for all the sfu and copr instructions.
917 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
919 * i386.h (push): Permit Imm16 operand too.
921 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
923 * h8300.h (andc): Exists in base arch.
925 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
927 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
928 * hppa.h: #undef NONE to avoid conflict with hiux include files.
930 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
932 * hppa.h: Add FP quadword store instructions.
934 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
936 * mips.h: (M_J_A): Added.
939 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
941 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
942 <mellon@pepper.ncd.com>.
944 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
946 * hppa.h: Immediate field in probei instructions is unsigned,
947 not low-sign extended.
949 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
951 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
953 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
955 * i386.h: Add "fxch" without operand.
957 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
959 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
961 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
963 * hppa.h: Add gfw and gfr to the opcode table.
965 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
967 * m88k.h: extended to handle m88110.
969 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
971 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
974 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
976 * i960.h (i960_opcodes): Properly bracket initializers.
978 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
980 * m88k.h (BOFLAG): rewrite to avoid nested comment.
982 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
984 * m68k.h (two): Protect second argument with parentheses.
986 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
988 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
989 Deleted old in/out instructions in "#if 0" section.
991 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
993 * i386.h (i386_optab): Properly bracket initializers.
995 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
997 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
998 Jeff Law, law@cs.utah.edu).
1000 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1002 * i386.h (lcall): Accept Imm32 operand also.
1004 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1006 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1009 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1011 * mips.h (INSN_*): Changed values. Removed unused definitions.
1012 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1013 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1014 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1015 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1016 (M_*): Added new values for r6000 and r4000 macros.
1017 (ANY_DELAY): Removed.
1019 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1021 * mips.h: Added M_LI_S and M_LI_SS.
1023 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1025 * h8300.h: Get some rare mov.bs correct.
1027 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1029 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1032 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1034 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1035 jump instructions, for use in disassemblers.
1037 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1039 * m88k.h: Make bitfields just unsigned, not unsigned long or
1042 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1044 * hppa.h: New argument type 'y'. Use in various float instructions.
1046 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1048 * hppa.h (break): First immediate field is unsigned.
1050 * hppa.h: Add rfir instruction.
1052 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1054 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1056 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1058 * mips.h: Reworked the hazard information somewhat, and fixed some
1059 bugs in the instruction hazard descriptions.
1061 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1063 * m88k.h: Corrected a couple of opcodes.
1065 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1067 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1068 new version includes instruction hazard information, but is
1069 otherwise reasonably similar.
1071 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1073 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1075 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1077 Patches from Jeff Law, law@cs.utah.edu:
1078 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1079 Make the tables be the same for the following instructions:
1080 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1081 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1082 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1083 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1084 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1085 "fcmp", and "ftest".
1087 * hppa.h: Make new and old tables the same for "break", "mtctl",
1088 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1089 Fix typo in last patch. Collapse several #ifdefs into a
1092 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1093 of the comments up-to-date.
1095 * hppa.h: Update "free list" of letters and update
1096 comments describing each letter's function.
1098 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1100 * h8300.h: checkpoint, includes H8/300-H opcodes.
1102 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1104 * Patches from Jeffrey Law <law@cs.utah.edu>.
1105 * hppa.h: Rework single precision FP
1106 instructions so that they correctly disassemble code
1109 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1111 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1112 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1114 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1116 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1117 gdb will define it for now.
1119 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1121 * sparc.h: Don't end enumerator list with comma.
1123 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1125 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1126 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1127 ("bc2t"): Correct typo.
1128 ("[ls]wc[023]"): Use T rather than t.
1129 ("c[0123]"): Define general coprocessor instructions.
1131 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1133 * m68k.h: Move split point for gcc compilation more towards
1136 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1138 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1139 simply wrong, ics, rfi, & rfsvc were missing).
1140 Add "a" to opr_ext for "bb". Doc fix.
1142 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1144 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1145 * mips.h: Add casts, to suppress warnings about shifting too much.
1146 * m68k.h: Document the placement code '9'.
1148 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1150 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1151 allows callers to break up the large initialized struct full of
1152 opcodes into two half-sized ones. This permits GCC to compile
1153 this module, since it takes exponential space for initializers.
1154 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1156 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1158 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1159 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1160 initialized structs in it.
1162 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1164 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1165 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1166 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1168 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1170 * mips.h: document "i" and "j" operands correctly.
1172 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1174 * mips.h: Removed endianness dependency.
1176 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1178 * h8300.h: include info on number of cycles per instruction.
1180 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1182 * hppa.h: Move handy aliases to the front. Fix masks for extract
1183 and deposit instructions.
1185 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1187 * i386.h: accept shld and shrd both with and without the shift
1188 count argument, which is always %cl.
1190 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1192 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1193 (one_byte_segment_defaults, two_byte_segment_defaults,
1194 i386_prefixtab_end): Ditto.
1196 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1198 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1199 for operand 2; from John Carr, jfc@dsg.dec.com.
1201 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1203 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1204 always use 16-bit offsets. Makes calculated-size jump tables
1207 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1209 * i386.h: Fix one-operand forms of in* and out* patterns.
1211 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1213 * m68k.h: Added CPU32 support.
1215 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1217 * mips.h (break): Disassemble the argument. Patch from
1218 jonathan@cs.stanford.edu (Jonathan Stone).
1220 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1222 * m68k.h: merged Motorola and MIT syntax.
1224 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1226 * m68k.h (pmove): make the tests less strict, the 68k book is
1229 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1231 * m68k.h (m68ec030): Defined as alias for 68030.
1232 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1233 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1234 them. Tightened description of "fmovex" to distinguish it from
1235 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1236 up descriptions that claimed versions were available for chips not
1237 supporting them. Added "pmovefd".
1239 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1241 * m68k.h: fix where the . goes in divull
1243 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1245 * m68k.h: the cas2 instruction is supposed to be written with
1246 indirection on the last two operands, which can be either data or
1247 address registers. Added a new operand type 'r' which accepts
1248 either register type. Added new cases for cas2l and cas2w which
1249 use them. Corrected masks for cas2 which failed to recognize use
1250 of address register.
1252 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1254 * m68k.h: Merged in patches (mostly m68040-specific) from
1255 Colin Smith <colin@wrs.com>.
1257 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1258 base). Also cleaned up duplicates, re-ordered instructions for
1259 the sake of dis-assembling (so aliases come after standard names).
1260 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
1262 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1264 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
1267 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
1269 * sparc.h: Moved tables to BFD library.
1271 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
1273 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
1275 * h8300.h: Finish filling in all the holes in the opcode table,
1276 so that the Lucid C compiler can digest this as well...
1278 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
1280 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
1281 Fix opcodes on various sizes of fild/fist instructions
1282 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
1283 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
1285 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
1287 * h8300.h: Fill in all the holes in the opcode table so that the
1288 losing HPUX C compiler can digest this...
1290 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
1292 * mips.h: Fix decoding of coprocessor instructions, somewhat.
1293 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
1295 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
1297 * sparc.h: Add new architecture variant sparclite; add its scan
1298 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
1300 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
1302 * mips.h: Add some more opcode synonyms (from Frank Yellin,
1305 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
1307 * rs6k.h: New version from IBM (Metin).
1309 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
1311 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
1312 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
1314 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
1316 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
1318 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
1320 * m68k.h (one, two): Cast macro args to unsigned to suppress
1321 complaints from compiler and lint about integer overflow during
1324 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
1326 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
1328 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
1330 * mips.h: Make bitfield layout depend on the HOST compiler,
1331 not on the TARGET system.
1333 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
1335 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
1336 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
1337 <TRANLE@INTELLICORP.COM>.
1339 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
1341 * h8300.h: turned op_type enum into #define list
1343 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
1345 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
1346 similar instructions -- they've been renamed to "fitoq", etc.
1347 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
1348 number of arguments.
1349 * h8300.h: Remove extra ; which produces compiler warning.
1351 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
1353 * sparc.h: fix opcode for tsubcctv.
1355 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
1357 * sparc.h: fba and cba are now aliases for fb and cb respectively.
1359 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
1361 * sparc.h (nop): Made the 'lose' field be even tighter,
1362 so only a standard 'nop' is disassembled as a nop.
1364 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
1366 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
1367 disassembled as a nop.
1369 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
1371 * sparc.h: fix a typo.
1373 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
1375 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
1376 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
1377 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
1381 version-control: never