3 * Benjamin Warren, biggerbadderben@gmail.com
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * netdev.h - definitions an prototypes for network devices
32 * Board and CPU-specific initialization functions
33 * board_eth_init() has highest priority. cpu_eth_init() only
34 * gets called if board_eth_init() isn't instantiated or fails.
40 int board_eth_init(bd_t *bis);
41 int cpu_eth_init(bd_t *bis);
43 /* Driver initialization prototypes */
44 int altera_tse_initialize(u8 dev_num, int mac_base,
45 int sgdma_rx_base, int sgdma_tx_base,
46 u32 sgdma_desc_base, u32 sgdma_desc_size);
47 int at91emac_register(bd_t *bis, unsigned long iobase);
48 int au1x00_enet_initialize(bd_t*);
49 int ax88180_initialize(bd_t *bis);
50 int bfin_EMAC_initialize(bd_t *bis);
51 int calxedaxgmac_initialize(u32 id, ulong base_addr);
52 int cs8900_initialize(u8 dev_num, int base_addr);
53 int davinci_emac_initialize(void);
54 int dc21x4x_initialize(bd_t *bis);
55 int designware_initialize(u32 id, ulong base_addr, u32 phy_addr, u32 interface);
56 int dm9000_initialize(bd_t *bis);
57 int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
58 int e1000_initialize(bd_t *bis);
59 int eepro100_initialize(bd_t *bis);
60 int enc28j60_initialize(unsigned int bus, unsigned int cs,
61 unsigned int max_hz, unsigned int mode);
62 int ep93xx_eth_initialize(u8 dev_num, int base_addr);
63 int eth_3com_initialize (bd_t * bis);
64 int ethoc_initialize(u8 dev_num, int base_addr);
65 int fec_initialize (bd_t *bis);
66 int fecmxc_initialize(bd_t *bis);
67 int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr);
68 int ftgmac100_initialize(bd_t *bits);
69 int ftmac100_initialize(bd_t *bits);
70 int greth_initialize(bd_t *bis);
71 void gt6426x_eth_initialize(bd_t *bis);
72 int inca_switch_initialize(bd_t *bis);
73 int ks8695_eth_initialize(void);
74 int ks8851_mll_initialize(u8 dev_num, int base_addr);
75 int lan91c96_initialize(u8 dev_num, int base_addr);
76 int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
77 int mcdmafec_initialize(bd_t *bis);
78 int mcffec_initialize(bd_t *bis);
79 int mpc512x_fec_initialize(bd_t *bis);
80 int mpc5xxx_fec_initialize(bd_t *bis);
81 int mpc82xx_scc_enet_initialize(bd_t *bis);
82 int mvgbe_initialize(bd_t *bis);
83 int natsemi_initialize(bd_t *bis);
84 int ne2k_register(void);
85 int npe_initialize(bd_t *bis);
86 int ns8382x_initialize(bd_t *bis);
87 int pcnet_initialize(bd_t *bis);
88 int plb2800_eth_initialize(bd_t *bis);
89 int ppc_4xx_eth_initialize (bd_t *bis);
90 int rtl8139_initialize(bd_t *bis);
91 int rtl8169_initialize(bd_t *bis);
92 int scc_initialize(bd_t *bis);
93 int sh_eth_initialize(bd_t *bis);
94 int skge_initialize(bd_t *bis);
95 int smc91111_initialize(u8 dev_num, int base_addr);
96 int smc911x_initialize(u8 dev_num, int base_addr);
97 int sunxi_wemac_initialize(bd_t *bis);
98 int tsi108_eth_initialize(bd_t *bis);
99 int uec_standard_init(bd_t *bis);
100 int uli526x_initialize(bd_t *bis);
101 int armada100_fec_register(unsigned long base_addr);
102 int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr,
103 unsigned long dma_addr);
104 int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
106 int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,
107 unsigned long ctrl_addr);
108 int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio);
110 * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface
111 * exported by a public hader file, we need a global definition at this point.
113 #if defined(CONFIG_XILINX_LL_TEMAC)
114 #define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */
115 #define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */
116 #define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */
119 /* Boards with PCI network controllers can call this from their board_eth_init()
120 * function to initialize whatever's on board.
121 * Return value is total # of devices found */
123 static inline int pci_eth_init(bd_t *bis)
129 #ifdef CONFIG_EEPRO100
130 num += eepro100_initialize(bis);
133 num += dc21x4x_initialize(bis);
136 num += e1000_initialize(bis);
139 num += pcnet_initialize(bis);
141 #ifdef CONFIG_NATSEMI
142 num += natsemi_initialize(bis);
144 #ifdef CONFIG_NS8382X
145 num += ns8382x_initialize(bis);
147 #if defined(CONFIG_RTL8139)
148 num += rtl8139_initialize(bis);
150 #if defined(CONFIG_RTL8169)
151 num += rtl8169_initialize(bis);
153 #if defined(CONFIG_ULI526X)
154 num += uli526x_initialize(bis);
157 #endif /* CONFIG_PCI */
162 * Boards with mv88e61xx switch can use this by defining
163 * CONFIG_MV88E61XX_SWITCH in respective board configheader file
164 * the stuct and enums here are used to specify switch configuration params
166 #if defined(CONFIG_MV88E61XX_SWITCH)
168 /* constants for any 88E61xx switch */
169 #define MV88E61XX_MAX_PORTS_NUM 6
171 enum mv88e61xx_cfg_mdip {
172 MV88E61XX_MDIP_NOCHANGE,
173 MV88E61XX_MDIP_REVERSE
176 enum mv88e61xx_cfg_ledinit {
177 MV88E61XX_LED_INIT_DIS,
178 MV88E61XX_LED_INIT_EN
181 enum mv88e61xx_cfg_rgmiid {
182 MV88E61XX_RGMII_DELAY_DIS,
183 MV88E61XX_RGMII_DELAY_EN
186 enum mv88e61xx_cfg_prtstt {
187 MV88E61XX_PORTSTT_DISABLED,
188 MV88E61XX_PORTSTT_BLOCKING,
189 MV88E61XX_PORTSTT_LEARNING,
190 MV88E61XX_PORTSTT_FORWARDING
193 struct mv88e61xx_config {
195 u8 vlancfg[MV88E61XX_MAX_PORTS_NUM];
196 enum mv88e61xx_cfg_rgmiid rgmii_delay;
197 enum mv88e61xx_cfg_prtstt portstate;
198 enum mv88e61xx_cfg_ledinit led_init;
199 enum mv88e61xx_cfg_mdip mdip;
205 * Common mappings for Internal VLANs
206 * These mappings consider that all ports are useable; the driver
207 * will mask inexistent/unused ports.
210 /* Switch mode : routes any port to any port */
211 #define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F }
213 /* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */
214 #define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F }
216 int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
217 #endif /* CONFIG_MV88E61XX_SWITCH */
219 struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id);
222 int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,
223 struct mii_dev *bus, struct phy_device *phydev);
226 * Allow FEC to fine-tune MII configuration on boards which require this.
228 int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
231 #endif /* _NETDEV_H_ */