2 * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
3 * Author: Brendan Le Foll <brendan.le.foll@intel.com>
4 * Copyright (c) 2014 Intel Corporation.
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice shall be
15 * included in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 #include "mraa_adv_func.h"
33 // Bionic does not implement pthread cancellation API
35 #define HAVE_PTHREAD_CANCEL
38 // general status failures for internal functions
39 #define MRAA_PLATFORM_NO_INIT -3
40 #define MRAA_IO_SETUP_FAILURE -2
41 #define MRAA_NO_SUCH_IO -1
44 * A structure representing a gpio pin.
48 int pin; /**< the pin number, as known to the os. */
49 int phy_pin; /**< pin passed to clean init. -1 none and raw*/
50 int value_fp; /**< the file pointer to the value of the gpio */
51 void (* isr)(void *); /**< the interupt service request */
52 void *isr_args; /**< args return when interupt service request triggered */
53 pthread_t thread_id; /**< the isr handler thread id */
54 int isr_value_fp; /**< the isr file pointer on the value */
55 #ifndef HAVE_PTHREAD_CANCEL
56 int isr_control_pipe[2]; /**< a pipe used to interrupt the isr from polling the value fd*/
58 mraa_boolean_t isr_thread_terminating; /**< is the isr thread being terminated? */
59 mraa_boolean_t owner; /**< If this context originally exported the pin */
60 mraa_result_t (*mmap_write) (mraa_gpio_context dev, int value);
61 int (*mmap_read) (mraa_gpio_context dev);
62 mraa_adv_func_t* advance_func; /**< override function table */
67 * A structure representing a I2C bus
71 int busnum; /**< the bus number of the /dev/i2c-* device */
72 int fh; /**< the file handle to the /dev/i2c-* device */
73 int addr; /**< the address of the i2c slave */
74 unsigned long funcs; /**< /dev/i2c-* device capabilities as per https://www.kernel.org/doc/Documentation/i2c/functionality */
75 void *handle; /**< generic handle for non-standard drivers that don't use file descriptors */
76 mraa_adv_func_t* advance_func; /**< override function table */
81 * A structure representing the SPI device
85 int devfd; /**< File descriptor to SPI Device */
86 uint32_t mode; /**< Spi mode see spidev.h */
87 int clock; /**< clock to run transactions at */
88 mraa_boolean_t lsb; /**< least significant bit mode */
89 unsigned int bpw; /**< Bits per word */
90 mraa_adv_func_t* advance_func; /**< override function table */
95 * A structure representing a PWM pin
99 int pin; /**< the pin number, as known to the os. */
100 int chipid; /**< the chip id, which the pwm resides */
101 int duty_fp; /**< File pointer to duty file */
102 int period; /**< Cache the period to speed up setting duty */
103 mraa_boolean_t owner; /**< Owner of pwm context*/
104 mraa_adv_func_t* advance_func; /**< override function table */
109 * A structure representing a Analog Input Channel
113 unsigned int channel; /**< the channel as on board and ADC module */
114 int adc_in_fp; /**< File Pointer to raw sysfs */
115 int value_bit; /**< 10 bits by default. Can be increased if board */
116 mraa_adv_func_t* advance_func; /**< override function table */
121 * A structure representing a UART device
125 int index; /**< the uart index, as known to the os. */
126 const char* path; /**< the uart device path. */
127 int fd; /**< file descriptor for device. */
128 mraa_adv_func_t* advance_func; /**< override function table */
133 * A structure representing an IIO device
136 int num; /**< IIO device number */
137 char* name; /**< IIO device name */
138 int fp; /**< IIO device in /dev */
139 int fp_event; /**< event file descriptor for IIO device */
140 void (* isr)(char* data); /**< the interupt service request */
141 void *isr_args; /**< args return when interupt service request triggered */
142 void (* isr_event)(struct iio_event_data* data); /**< the event interupt service request */
144 pthread_t thread_id; /**< the isr handler thread id */
145 mraa_iio_channel* channels;
147 mraa_iio_event* events;
152 * A bitfield representing the capabilities of a pin.
156 mraa_boolean_t valid:1; /**< Is the pin valid at all */
157 mraa_boolean_t gpio:1; /**< Is the pin gpio capable */
158 mraa_boolean_t pwm:1; /**< Is the pin pwm capable */
159 mraa_boolean_t fast_gpio:1; /**< Is the pin fast gpio capable */
160 mraa_boolean_t spi:1; /**< Is the pin spi capable */
161 mraa_boolean_t i2c:1; /**< Is the pin i2c capable */
162 mraa_boolean_t aio:1; /**< Is the pin analog input capable */
163 mraa_boolean_t uart:1; /**< Is the pin uart capable */
165 } mraa_pincapabilities_t;
168 * A Structure representing a multiplexer and the required value
172 unsigned int pin; /**< Raw GPIO pin id */
173 unsigned int value; /**< Raw GPIO value */
178 mraa_boolean_t complex_pin:1;
179 mraa_boolean_t output_en:1;
180 mraa_boolean_t output_en_high:1;
181 mraa_boolean_t pullup_en:1;
182 mraa_boolean_t pullup_en_hiz:1;
183 } mraa_pin_cap_complex_t;
187 unsigned int pinmap; /**< sysfs pin */
188 unsigned int parent_id; /** parent chip id */
189 unsigned int mux_total; /** Numfer of muxes needed for operation of pin */
190 mraa_mux_t mux[6]; /** Array holding information about mux */
191 unsigned int output_enable; /** Output Enable GPIO, for level shifting */
192 unsigned int pullup_enable; /** Pull-Up enable GPIO, inputs */
193 mraa_pin_cap_complex_t complex_cap;
199 char mem_dev[32]; /**< Memory device to use /dev/uio0 etc */
200 unsigned int mem_sz; /** Size of memory to map */
201 unsigned int bit_pos; /** Position of value bit */
202 mraa_pin_t gpio; /** GPio context containing none mmap info */
207 * A Structure representing a physical Pin.
211 char name[MRAA_PIN_NAME_SIZE]; /**< Pin's real world name */
212 mraa_pincapabilities_t capabilites; /**< Pin Capabiliites */
213 mraa_pin_t gpio; /**< GPIO structure */
214 mraa_pin_t pwm; /**< PWM structure */
215 mraa_pin_t aio; /**< Anaglog Pin */
216 mraa_mmap_pin_t mmap; /**< GPIO through memory */
217 mraa_pin_t i2c; /**< i2c bus/pin */
218 mraa_pin_t spi; /**< spi bus/pin */
219 mraa_pin_t uart; /**< uart module/pin */
224 * A Structure representing the physical properties of a i2c bus.
228 unsigned int bus_id; /**< ID as exposed in the system */
229 unsigned int scl; /**< i2c SCL */
230 unsigned int sda; /**< i2c SDA */
231 // mraa_drv_api_t drv_type; /**< Driver type */
236 * A Structure representing the physical properties of a spi bus.
240 unsigned int bus_id; /**< The Bus ID as exposed to the system. */
241 unsigned int slave_s; /**< Slave select */
242 mraa_boolean_t three_wire; /**< Is the bus only a three wire system */
243 unsigned int sclk; /**< Serial Clock */
244 unsigned int mosi; /**< Master Out, Slave In. */
245 unsigned int miso; /**< Master In, Slave Out. */
246 unsigned int cs; /**< Chip Select, used when the board is a spi slave */
251 * A Structure representing a uart device.
255 unsigned int index; /**< ID as exposed in the system */
256 int rx; /**< uart rx */
257 int tx; /**< uart tx */
258 const char* device_path; /**< To store "/dev/ttyS1" for example */
263 * A Structure representing a platform/board.
266 typedef struct _board_t {
268 unsigned int phy_pin_count; /**< The Total IO pins on board */
269 unsigned int gpio_count; /**< GPIO Count */
270 unsigned int aio_count; /**< Analog side Count */
271 unsigned int i2c_bus_count; /**< Usable i2c Count */
272 mraa_i2c_bus_t i2c_bus[12]; /**< Array of i2c */
273 unsigned int def_i2c_bus; /**< Position in array of default i2c bus */
274 unsigned int spi_bus_count; /**< Usable spi Count */
275 mraa_spi_bus_t spi_bus[12]; /**< Array of spi */
276 unsigned int def_spi_bus; /**< Position in array of defult spi bus */
277 unsigned int adc_raw; /**< ADC raw bit value */
278 unsigned int adc_supported; /**< ADC supported bit value */
279 unsigned int def_uart_dev; /**< Position in array of defult uart */
280 unsigned int uart_dev_count; /**< Usable spi Count */
281 mraa_uart_dev_t uart_dev[6]; /**< Array of UARTs */
282 mraa_boolean_t no_bus_mux; /**< i2c/spi/adc/pwm/uart bus muxing setup not required */
283 int pwm_default_period; /**< The default PWM period is US */
284 int pwm_max_period; /**< Maximum period in us */
285 int pwm_min_period; /**< Minimum period in us */
286 mraa_platform_t platform_type; /**< Platform type */
287 const char* platform_name; /**< Platform Name pointer */
288 mraa_pininfo_t* pins; /**< Pointer to pin array */
289 mraa_adv_func_t* adv_func; /**< Pointer to advanced function disptach table */
290 struct _board_t* sub_platform; /**< Pointer to sub platform */
295 struct _iio* iio_devices; /**< Pointer to IIO devices */
296 uint8_t iio_device_count; /**< IIO device count */