2 * Copyright 2004, 2007 Freescale Semiconductor.
3 * Copyright(c) 2003 Motorola Inc.
9 /* define for common ppc_asm.tmpl */
10 #define EXC_OFF_SYS_RESET 0x100 /* System reset */
11 #define _START_OFFSET 0
13 #if defined(CONFIG_E500)
18 * SCCR - System Clock Control Register, 9-8
20 #define SCCR_CLPD 0x00000004 /* CPM Low Power Disable */
21 #define SCCR_DFBRG_MSK 0x00000003 /* Division by BRGCLK Mask */
22 #define SCCR_DFBRG_SHIFT 0
24 #define SCCR_DFBRG00 0x00000000 /* BRGCLK division by 4 */
25 #define SCCR_DFBRG01 0x00000001 /* BRGCLK div by 16 (normal) */
26 #define SCCR_DFBRG10 0x00000002 /* BRGCLK division by 64 */
27 #define SCCR_DFBRG11 0x00000003 /* BRGCLK division by 256 */
30 * Define default values for some CCSR macros to make header files cleaner*
32 * To completely disable CCSR relocation in a board header file, define
33 * CONFIG_SYS_CCSR_DO_NOT_RELOCATE. This will force CONFIG_SYS_CCSRBAR_PHYS
34 * to a value that is the same as CONFIG_SYS_CCSRBAR.
37 #ifdef CONFIG_SYS_CCSRBAR_PHYS
38 #error "Do not define CONFIG_SYS_CCSRBAR_PHYS directly. Use \
39 CONFIG_SYS_CCSRBAR_PHYS_LOW and/or CONFIG_SYS_CCSRBAR_PHYS_HIGH instead."
42 #ifdef CONFIG_SYS_CCSR_DO_NOT_RELOCATE
43 #undef CONFIG_SYS_CCSRBAR_PHYS_HIGH
44 #undef CONFIG_SYS_CCSRBAR_PHYS_LOW
45 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0
48 #ifndef CONFIG_SYS_CCSRBAR
49 #define CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT
52 #ifndef CONFIG_SYS_CCSRBAR_PHYS_HIGH
53 #ifdef CONFIG_PHYS_64BIT
54 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0xf
56 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0
60 #ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW
61 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT
64 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \
65 CONFIG_SYS_CCSRBAR_PHYS_LOW)
67 #ifndef CONFIG_SYS_IMMR
68 #define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR
71 #endif /* __MPC85xx_H__ */