1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2008,2010 Freescale Semiconductor, Inc
6 * Based (loosely) on the Linux code
12 #include <linux/list.h>
13 #include <linux/sizes.h>
14 #include <linux/compiler.h>
17 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
18 #define MMC_SUPPORTS_TUNING
20 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
21 #define MMC_SUPPORTS_TUNING
24 /* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */
25 #define SD_VERSION_SD (1U << 31)
26 #define MMC_VERSION_MMC (1U << 30)
28 #define MAKE_SDMMC_VERSION(a, b, c) \
29 ((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c))
30 #define MAKE_SD_VERSION(a, b, c) \
31 (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c))
32 #define MAKE_MMC_VERSION(a, b, c) \
33 (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c))
35 #define EXTRACT_SDMMC_MAJOR_VERSION(x) \
36 (((u32)(x) >> 16) & 0xff)
37 #define EXTRACT_SDMMC_MINOR_VERSION(x) \
38 (((u32)(x) >> 8) & 0xff)
39 #define EXTRACT_SDMMC_CHANGE_VERSION(x) \
42 #define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0)
43 #define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0)
44 #define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0)
45 #define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0)
47 #define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0)
48 #define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0)
49 #define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0)
50 #define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0)
51 #define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0)
52 #define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0)
53 #define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0)
54 #define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0)
55 #define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0)
56 #define MMC_VERSION_4_4 MAKE_MMC_VERSION(4, 4, 0)
57 #define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1)
58 #define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0)
59 #define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0)
60 #define MMC_VERSION_5_1 MAKE_MMC_VERSION(5, 1, 0)
62 #define MMC_CAP(mode) (1 << mode)
63 #define MMC_MODE_HS (MMC_CAP(MMC_HS) | MMC_CAP(SD_HS))
64 #define MMC_MODE_HS_52MHz MMC_CAP(MMC_HS_52)
65 #define MMC_MODE_DDR_52MHz MMC_CAP(MMC_DDR_52)
66 #define MMC_MODE_HS200 MMC_CAP(MMC_HS_200)
67 #define MMC_MODE_HS400 MMC_CAP(MMC_HS_400)
69 #define MMC_CAP_NONREMOVABLE BIT(14)
70 #define MMC_CAP_NEEDS_POLL BIT(15)
71 #define MMC_CAP_CD_ACTIVE_HIGH BIT(16)
73 #define MMC_MODE_8BIT BIT(30)
74 #define MMC_MODE_4BIT BIT(29)
75 #define MMC_MODE_1BIT BIT(28)
76 #define MMC_MODE_SPI BIT(27)
79 #define SD_DATA_4BIT 0x00040000
81 #define IS_SD(x) ((x)->version & SD_VERSION_SD)
82 #define IS_MMC(x) ((x)->version & MMC_VERSION_MMC)
84 #define MMC_DATA_READ 1
85 #define MMC_DATA_WRITE 2
87 #define MMC_CMD_GO_IDLE_STATE 0
88 #define MMC_CMD_SEND_OP_COND 1
89 #define MMC_CMD_ALL_SEND_CID 2
90 #define MMC_CMD_SET_RELATIVE_ADDR 3
91 #define MMC_CMD_SET_DSR 4
92 #define MMC_CMD_SWITCH 6
93 #define MMC_CMD_SELECT_CARD 7
94 #define MMC_CMD_SEND_EXT_CSD 8
95 #define MMC_CMD_SEND_CSD 9
96 #define MMC_CMD_SEND_CID 10
97 #define MMC_CMD_STOP_TRANSMISSION 12
98 #define MMC_CMD_SEND_STATUS 13
99 #define MMC_CMD_SET_BLOCKLEN 16
100 #define MMC_CMD_READ_SINGLE_BLOCK 17
101 #define MMC_CMD_READ_MULTIPLE_BLOCK 18
102 #define MMC_CMD_SEND_TUNING_BLOCK 19
103 #define MMC_CMD_SEND_TUNING_BLOCK_HS200 21
104 #define MMC_CMD_SET_BLOCK_COUNT 23
105 #define MMC_CMD_WRITE_SINGLE_BLOCK 24
106 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
107 #define MMC_CMD_ERASE_GROUP_START 35
108 #define MMC_CMD_ERASE_GROUP_END 36
109 #define MMC_CMD_ERASE 38
110 #define MMC_CMD_APP_CMD 55
111 #define MMC_CMD_SPI_READ_OCR 58
112 #define MMC_CMD_SPI_CRC_ON_OFF 59
113 #define MMC_CMD_RES_MAN 62
115 #define MMC_CMD62_ARG1 0xefac62ec
116 #define MMC_CMD62_ARG2 0xcbaea7
119 #define SD_CMD_SEND_RELATIVE_ADDR 3
120 #define SD_CMD_SWITCH_FUNC 6
121 #define SD_CMD_SEND_IF_COND 8
122 #define SD_CMD_SWITCH_UHS18V 11
124 #define SD_CMD_APP_SET_BUS_WIDTH 6
125 #define SD_CMD_APP_SD_STATUS 13
126 #define SD_CMD_ERASE_WR_BLK_START 32
127 #define SD_CMD_ERASE_WR_BLK_END 33
128 #define SD_CMD_APP_SEND_OP_COND 41
129 #define SD_CMD_APP_SEND_SCR 51
131 static inline bool mmc_is_tuning_cmd(uint cmdidx)
133 if ((cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) ||
134 (cmdidx == MMC_CMD_SEND_TUNING_BLOCK))
139 /* SCR definitions in different words */
140 #define SD_HIGHSPEED_BUSY 0x00020000
141 #define SD_HIGHSPEED_SUPPORTED 0x00020000
143 #define UHS_SDR12_BUS_SPEED 0
144 #define HIGH_SPEED_BUS_SPEED 1
145 #define UHS_SDR25_BUS_SPEED 1
146 #define UHS_SDR50_BUS_SPEED 2
147 #define UHS_SDR104_BUS_SPEED 3
148 #define UHS_DDR50_BUS_SPEED 4
150 #define SD_MODE_UHS_SDR12 BIT(UHS_SDR12_BUS_SPEED)
151 #define SD_MODE_UHS_SDR25 BIT(UHS_SDR25_BUS_SPEED)
152 #define SD_MODE_UHS_SDR50 BIT(UHS_SDR50_BUS_SPEED)
153 #define SD_MODE_UHS_SDR104 BIT(UHS_SDR104_BUS_SPEED)
154 #define SD_MODE_UHS_DDR50 BIT(UHS_DDR50_BUS_SPEED)
156 #define OCR_BUSY 0x80000000
157 #define OCR_HCS 0x40000000
158 #define OCR_S18R 0x1000000
159 #define OCR_VOLTAGE_MASK 0x007FFF80
160 #define OCR_ACCESS_MODE 0x60000000
162 #define MMC_ERASE_ARG 0x00000000
163 #define MMC_SECURE_ERASE_ARG 0x80000000
164 #define MMC_TRIM_ARG 0x00000001
165 #define MMC_DISCARD_ARG 0x00000003
166 #define MMC_SECURE_TRIM1_ARG 0x80000001
167 #define MMC_SECURE_TRIM2_ARG 0x80008000
169 #define MMC_STATUS_MASK (~0x0206BF7F)
170 #define MMC_STATUS_SWITCH_ERROR (1 << 7)
171 #define MMC_STATUS_RDY_FOR_DATA (1 << 8)
172 #define MMC_STATUS_CURR_STATE (0xf << 9)
173 #define MMC_STATUS_ERROR (1 << 19)
175 #define MMC_STATE_PRG (7 << 9)
177 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
178 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
179 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
180 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
181 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
182 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
183 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
184 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
185 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
186 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
187 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
188 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
189 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
190 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
191 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
192 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
193 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
195 #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
196 #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte
197 addressed by index which are
199 #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte
200 addressed by index, which are
202 #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */
204 #define SD_SWITCH_CHECK 0
205 #define SD_SWITCH_SWITCH 1
210 #define EXT_CSD_ENH_START_ADDR 136 /* R/W */
211 #define EXT_CSD_ENH_SIZE_MULT 140 /* R/W */
212 #define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
213 #define EXT_CSD_PARTITION_SETTING 155 /* R/W */
214 #define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */
215 #define EXT_CSD_MAX_ENH_SIZE_MULT 157 /* R */
216 #define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
217 #define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
218 #define EXT_CSD_BKOPS_EN 163 /* R/W & R/W/E */
219 #define EXT_CSD_WR_REL_PARAM 166 /* R */
220 #define EXT_CSD_WR_REL_SET 167 /* R/W */
221 #define EXT_CSD_RPMB_MULT 168 /* RO */
222 #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
223 #define EXT_CSD_BOOT_BUS_WIDTH 177
224 #define EXT_CSD_PART_CONF 179 /* R/W */
225 #define EXT_CSD_BUS_WIDTH 183 /* R/W */
226 #define EXT_CSD_HS_TIMING 185 /* R/W */
227 #define EXT_CSD_REV 192 /* RO */
228 #define EXT_CSD_CARD_TYPE 196 /* RO */
229 #define EXT_CSD_PART_SWITCH_TIME 199 /* RO */
230 #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
231 #define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
232 #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
233 #define EXT_CSD_BOOT_MULT 226 /* RO */
234 #define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */
235 #define EXT_CSD_BKOPS_SUPPORT 502 /* RO */
238 * EXT_CSD field definitions
241 #define EXT_CSD_CMD_SET_NORMAL (1 << 0)
242 #define EXT_CSD_CMD_SET_SECURE (1 << 1)
243 #define EXT_CSD_CMD_SET_CPSECURE (1 << 2)
245 #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */
246 #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */
247 #define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2)
248 #define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3)
249 #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
250 | EXT_CSD_CARD_TYPE_DDR_1_2V)
252 #define EXT_CSD_CARD_TYPE_HS200_1_8V BIT(4) /* Card can run at 200MHz */
253 /* SDR mode @1.8V I/O */
254 #define EXT_CSD_CARD_TYPE_HS200_1_2V BIT(5) /* Card can run at 200MHz */
255 /* SDR mode @1.2V I/O */
256 #define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \
257 EXT_CSD_CARD_TYPE_HS200_1_2V)
258 #define EXT_CSD_CARD_TYPE_HS400_1_8V BIT(6)
259 #define EXT_CSD_CARD_TYPE_HS400_1_2V BIT(7)
260 #define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \
261 EXT_CSD_CARD_TYPE_HS400_1_2V)
263 #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
264 #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
265 #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
266 #define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
267 #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
268 #define EXT_CSD_DDR_FLAG BIT(2) /* Flag for DDR mode */
270 #define EXT_CSD_TIMING_LEGACY 0 /* no high speed */
271 #define EXT_CSD_TIMING_HS 1 /* HS */
272 #define EXT_CSD_TIMING_HS200 2 /* HS200 */
273 #define EXT_CSD_TIMING_HS400 3 /* HS400 */
275 #define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
276 #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
277 #define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
278 #define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0)
280 #define EXT_CSD_BOOT_ACK(x) (x << 6)
281 #define EXT_CSD_BOOT_PART_NUM(x) (x << 3)
282 #define EXT_CSD_PARTITION_ACCESS(x) (x << 0)
284 #define EXT_CSD_EXTRACT_BOOT_ACK(x) (((x) >> 6) & 0x1)
285 #define EXT_CSD_EXTRACT_BOOT_PART(x) (((x) >> 3) & 0x7)
286 #define EXT_CSD_EXTRACT_PARTITION_ACCESS(x) ((x) & 0x7)
288 #define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3)
289 #define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2)
290 #define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x)
292 #define EXT_CSD_PARTITION_SETTING_COMPLETED (1 << 0)
294 #define EXT_CSD_ENH_USR (1 << 0) /* user data area is enhanced */
295 #define EXT_CSD_ENH_GP(x) (1 << ((x)+1)) /* GP part (x+1) is enhanced */
297 #define EXT_CSD_HS_CTRL_REL (1 << 0) /* host controlled WR_REL_SET */
299 #define EXT_CSD_WR_DATA_REL_USR (1 << 0) /* user data area WR_REL */
300 #define EXT_CSD_WR_DATA_REL_GP(x) (1 << ((x)+1)) /* GP part (x+1) WR_REL */
302 #define R1_ILLEGAL_COMMAND (1 << 22)
303 #define R1_APP_CMD (1 << 5)
305 #define MMC_RSP_PRESENT (1 << 0)
306 #define MMC_RSP_136 (1 << 1) /* 136 bit response */
307 #define MMC_RSP_CRC (1 << 2) /* expect valid crc */
308 #define MMC_RSP_BUSY (1 << 3) /* card may send busy */
309 #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
311 #define MMC_RSP_NONE (0)
312 #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
313 #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
315 #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
316 #define MMC_RSP_R3 (MMC_RSP_PRESENT)
317 #define MMC_RSP_R4 (MMC_RSP_PRESENT)
318 #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
319 #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
320 #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
322 #define MMCPART_NOAVAILABLE (0xff)
323 #define PART_ACCESS_MASK (0x7)
324 #define PART_SUPPORT (0x1)
325 #define ENHNCD_SUPPORT (0x2)
326 #define PART_ENH_ATTRIB (0x1f)
328 #define MMC_QUIRK_RETRY_SEND_CID BIT(0)
329 #define MMC_QUIRK_RETRY_SET_BLOCKLEN BIT(1)
332 MMC_SIGNAL_VOLTAGE_000 = 0,
333 MMC_SIGNAL_VOLTAGE_120 = 1,
334 MMC_SIGNAL_VOLTAGE_180 = 2,
335 MMC_SIGNAL_VOLTAGE_330 = 4,
338 #define MMC_ALL_SIGNAL_VOLTAGE (MMC_SIGNAL_VOLTAGE_120 |\
339 MMC_SIGNAL_VOLTAGE_180 |\
340 MMC_SIGNAL_VOLTAGE_330)
342 /* Maximum block size for MMC */
343 #define MMC_MAX_BLOCK_LEN 512
345 /* The number of MMC physical partitions. These consist of:
346 * boot partitions (2), general purpose partitions (4) in MMC v4.4.
348 #define MMC_NUM_BOOT_PARTITION 2
349 #define MMC_PART_RPMB 3 /* RPMB partition number */
351 /* Driver model support */
354 * struct mmc_uclass_priv - Holds information about a device used by the uclass
356 struct mmc_uclass_priv {
361 * mmc_get_mmc_dev() - get the MMC struct pointer for a device
363 * Provided that the device is already probed and ready for use, this value
367 * @return associated mmc struct pointer if available, else NULL
369 struct mmc *mmc_get_mmc_dev(struct udevice *dev);
371 /* End of driver model support */
392 const char *src; /* src buffers don't get written to */
402 #if CONFIG_IS_ENABLED(DM_MMC)
405 * send_cmd() - Send a command to the MMC device
407 * @dev: Device to receive the command
408 * @cmd: Command to send
409 * @data: Additional data to send/receive
410 * @return 0 if OK, -ve on error
412 int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd,
413 struct mmc_data *data);
416 * set_ios() - Set the I/O speed/width for an MMC device
418 * @dev: Device to update
419 * @return 0 if OK, -ve on error
421 int (*set_ios)(struct udevice *dev);
424 * get_cd() - See whether a card is present
426 * @dev: Device to check
427 * @return 0 if not present, 1 if present, -ve on error
429 int (*get_cd)(struct udevice *dev);
432 * get_wp() - See whether a card has write-protect enabled
434 * @dev: Device to check
435 * @return 0 if write-enabled, 1 if write-protected, -ve on error
437 int (*get_wp)(struct udevice *dev);
439 #ifdef MMC_SUPPORTS_TUNING
441 * execute_tuning() - Start the tuning process
443 * @dev: Device to start the tuning
444 * @opcode: Command opcode to send
445 * @return 0 if OK, -ve on error
447 int (*execute_tuning)(struct udevice *dev, uint opcode);
451 * wait_dat0() - wait until dat0 is in the target state
452 * (CLK must be running during the wait)
454 * @dev: Device to check
455 * @state: target state
456 * @timeout: timeout in us
457 * @return 0 if dat0 is in the target state, -ve on error
459 int (*wait_dat0)(struct udevice *dev, int state, int timeout);
462 #define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops)
464 int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
465 struct mmc_data *data);
466 int dm_mmc_set_ios(struct udevice *dev);
467 int dm_mmc_get_cd(struct udevice *dev);
468 int dm_mmc_get_wp(struct udevice *dev);
469 int dm_mmc_execute_tuning(struct udevice *dev, uint opcode);
470 int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout);
472 /* Transition functions for compatibility */
473 int mmc_set_ios(struct mmc *mmc);
474 int mmc_getcd(struct mmc *mmc);
475 int mmc_getwp(struct mmc *mmc);
476 int mmc_execute_tuning(struct mmc *mmc, uint opcode);
477 int mmc_wait_dat0(struct mmc *mmc, int state, int timeout);
481 int (*send_cmd)(struct mmc *mmc,
482 struct mmc_cmd *cmd, struct mmc_data *data);
483 int (*set_ios)(struct mmc *mmc);
484 int (*init)(struct mmc *mmc);
485 int (*getcd)(struct mmc *mmc);
486 int (*getwp)(struct mmc *mmc);
492 #if !CONFIG_IS_ENABLED(DM_MMC)
493 const struct mmc_ops *ops;
500 unsigned char part_type;
504 unsigned int au; /* In sectors */
505 unsigned int erase_timeout; /* In milliseconds */
506 unsigned int erase_offset; /* In milliseconds */
526 const char *mmc_mode_name(enum bus_mode mode);
527 void mmc_dump_capabilities(const char *text, uint caps);
529 static inline bool mmc_is_mode_ddr(enum bus_mode mode)
531 if (mode == MMC_DDR_52)
533 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
534 else if (mode == UHS_DDR50)
537 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
538 else if (mode == MMC_HS_400)
545 #define UHS_CAPS (MMC_CAP(UHS_SDR12) | MMC_CAP(UHS_SDR25) | \
546 MMC_CAP(UHS_SDR50) | MMC_CAP(UHS_SDR104) | \
549 static inline bool supports_uhs(uint caps)
551 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
552 return (caps & UHS_CAPS) ? true : false;
559 * With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device
560 * with mmc_get_mmc_dev().
562 * TODO struct mmc should be in mmc_private but it's hard to fix right now
565 #if !CONFIG_IS_ENABLED(BLK)
566 struct list_head link;
568 const struct mmc_config *cfg; /* provided configuration */
573 bool clk_disable; /* true if the clock can be turned off */
576 enum mmc_voltage signal_voltage;
593 uint legacy_speed; /* speed for the legacy mode provided by the card */
595 #if CONFIG_IS_ENABLED(MMC_WRITE)
597 uint erase_grp_size; /* in 512-byte sectors */
599 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
600 uint hc_wp_grp_size; /* in 512-byte sectors */
602 #if CONFIG_IS_ENABLED(MMC_WRITE)
603 struct sd_ssr ssr; /* SD status register */
610 #ifndef CONFIG_SPL_BUILD
614 #if !CONFIG_IS_ENABLED(BLK)
615 struct blk_desc block_dev;
617 char op_cond_pending; /* 1 if we are waiting on an op_cond command */
618 char init_in_progress; /* 1 if we have done mmc_start_init() */
619 char preinit; /* start init as early as possible */
621 #if CONFIG_IS_ENABLED(DM_MMC)
622 struct udevice *dev; /* Device for this MMC controller */
623 #if CONFIG_IS_ENABLED(DM_REGULATOR)
624 struct udevice *vmmc_supply; /* Main voltage regulator (Vcc)*/
625 struct udevice *vqmmc_supply; /* IO voltage regulator (Vccq)*/
629 u32 cardtype; /* cardtype read from the MMC */
630 enum mmc_voltage current_voltage;
631 enum bus_mode selected_mode; /* mode currently used */
632 enum bus_mode best_mode; /* best mode is the supported mode with the
633 * highest bandwidth. It may not always be the
634 * operating mode due to limitations when
635 * accessing the boot partitions
640 struct mmc_hwpart_conf {
642 uint enh_start; /* in 512-byte sectors */
643 uint enh_size; /* in 512-byte sectors, if 0 no enh area */
644 unsigned wr_rel_change : 1;
645 unsigned wr_rel_set : 1;
648 uint size; /* in 512-byte sectors */
649 unsigned enhanced : 1;
650 unsigned wr_rel_change : 1;
651 unsigned wr_rel_set : 1;
655 enum mmc_hwpart_conf_mode {
656 MMC_HWPART_CONF_CHECK,
658 MMC_HWPART_CONF_COMPLETE,
661 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv);
664 * mmc_bind() - Set up a new MMC device ready for probing
666 * A child block device is bound with the IF_TYPE_MMC interface type. This
667 * allows the device to be used with CONFIG_BLK
669 * @dev: MMC device to set up
671 * @cfg: MMC configuration
672 * @return 0 if OK, -ve on error
674 int mmc_bind(struct udevice *dev, struct mmc *mmc,
675 const struct mmc_config *cfg);
676 void mmc_destroy(struct mmc *mmc);
679 * mmc_unbind() - Unbind a MMC device's child block device
682 * @return 0 if OK, -ve on error
684 int mmc_unbind(struct udevice *dev);
685 int mmc_initialize(bd_t *bis);
686 int mmc_init(struct mmc *mmc);
687 int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error);
689 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
690 CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
691 CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
692 int mmc_deinit(struct mmc *mmc);
696 * mmc_of_parse() - Parse the device tree to get the capabilities of the host
699 * @cfg: MMC configuration
700 * @return 0 if OK, -ve on error
702 int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg);
704 int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
707 * mmc_voltage_to_mv() - Convert a mmc_voltage in mV
709 * @voltage: The mmc_voltage to convert
710 * @return the value in mV if OK, -EINVAL on error (invalid mmc_voltage value)
712 int mmc_voltage_to_mv(enum mmc_voltage voltage);
715 * mmc_set_clock() - change the bus clock
717 * @clock: bus frequency in Hz
718 * @disable: flag indicating if the clock must on or off
719 * @return 0 if OK, -ve on error
721 int mmc_set_clock(struct mmc *mmc, uint clock, bool disable);
723 #define MMC_CLK_ENABLE false
724 #define MMC_CLK_DISABLE true
726 struct mmc *find_mmc_device(int dev_num);
727 int mmc_set_dev(int dev_num);
728 void print_mmc_devices(char separator);
731 * get_mmc_num() - get the total MMC device number
733 * @return 0 if there is no MMC device, else the number of devices
735 int get_mmc_num(void);
736 int mmc_switch_part(struct mmc *mmc, unsigned int part_num);
737 int mmc_hwpart_config(struct mmc *mmc, const struct mmc_hwpart_conf *conf,
738 enum mmc_hwpart_conf_mode mode);
740 #if !CONFIG_IS_ENABLED(DM_MMC)
741 int mmc_getcd(struct mmc *mmc);
742 int board_mmc_getcd(struct mmc *mmc);
743 int mmc_getwp(struct mmc *mmc);
744 int board_mmc_getwp(struct mmc *mmc);
747 int mmc_set_dsr(struct mmc *mmc, u16 val);
748 /* Function to change the size of boot partition and rpmb partitions */
749 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
750 unsigned long rpmbsize);
751 /* Function to modify the PARTITION_CONFIG field of EXT_CSD */
752 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access);
753 /* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */
754 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode);
755 /* Function to modify the RST_n_FUNCTION field of EXT_CSD */
756 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable);
757 /* Functions to read / write the RPMB partition */
758 int mmc_rpmb_set_key(struct mmc *mmc, void *key);
759 int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *counter);
760 int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk,
761 unsigned short cnt, unsigned char *key);
762 int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk,
763 unsigned short cnt, unsigned char *key);
766 * mmc_rpmb_route_frames() - route RPMB data frames
767 * @mmc Pointer to a MMC device struct
768 * @req Request data frames
769 * @reqlen Length of data frames in bytes
770 * @rsp Supplied buffer for response data frames
771 * @rsplen Length of supplied buffer for response data frames
773 * The RPMB data frames are routed to/from some external entity, for
774 * example a Trusted Exectuion Environment in an arm TrustZone protected
775 * secure world. It's expected that it's the external entity who is in
776 * control of the RPMB key.
778 * Returns 0 on success, < 0 on error.
780 int mmc_rpmb_route_frames(struct mmc *mmc, void *req, unsigned long reqlen,
781 void *rsp, unsigned long rsplen);
783 #ifdef CONFIG_CMD_BKOPS_ENABLE
784 int mmc_set_bkops_enable(struct mmc *mmc);
788 * Start device initialization and return immediately; it does not block on
789 * polling OCR (operation condition register) status. Useful for checking
790 * the presence of SD/eMMC when no card detect logic is available.
792 * @param mmc Pointer to a MMC device struct
793 * @return 0 on success, <0 on error.
795 int mmc_get_op_cond(struct mmc *mmc);
798 * Start device initialization and return immediately; it does not block on
799 * polling OCR (operation condition register) status. Then you should call
800 * mmc_init, which would block on polling OCR status and complete the device
803 * @param mmc Pointer to a MMC device struct
804 * @return 0 on success, <0 on error.
806 int mmc_start_init(struct mmc *mmc);
809 * Set preinit flag of mmc device.
811 * This will cause the device to be pre-inited during mmc_initialize(),
812 * which may save boot time if the device is not accessed until later.
813 * Some eMMC devices take 200-300ms to init, but unfortunately they
814 * must be sent a series of commands to even get them to start preparing
817 * @param mmc Pointer to a MMC device struct
818 * @param preinit preinit flag value
820 void mmc_set_preinit(struct mmc *mmc, int preinit);
822 #ifdef CONFIG_MMC_SPI
823 #define mmc_host_is_spi(mmc) ((mmc)->cfg->host_caps & MMC_MODE_SPI)
825 #define mmc_host_is_spi(mmc) 0
827 struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
829 void board_mmc_power_init(void);
830 int board_mmc_init(bd_t *bis);
831 int cpu_mmc_init(bd_t *bis);
832 int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr);
833 # ifdef CONFIG_SYS_MMC_ENV_PART
834 extern uint mmc_get_env_part(struct mmc *mmc);
836 int mmc_get_env_dev(void);
838 /* Minimum partition switch timeout in units of 10-milliseconds */
839 #define MMC_MIN_PART_SWITCH_TIME 30 /* 300 ms */
841 /* Set block count limit because of 16 bit register limit on some hardware*/
842 #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
843 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
847 * mmc_get_blk_desc() - Get the block descriptor for an MMC device
850 * @return block device if found, else NULL
852 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc);