1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2010 Texas Instruments Inc
14 /* vpbe_timing_type - Timing types used in vpbe device */
15 enum vpbe_enc_timings_type {
17 VPBE_ENC_DV_TIMINGS = 0x4,
18 /* Used when set timings through FB device interface */
19 VPBE_ENC_TIMINGS_INVALID = 0x8,
23 * struct vpbe_enc_mode_info
24 * @name: ptr to name string of the standard, "NTSC", "PAL" etc
25 * @std: standard or non-standard mode. 1 - standard, 0 - nonstandard
26 * @interlaced: 1 - interlaced, 0 - non interlaced/progressive
27 * @xres: x or horizontal resolution of the display
28 * @yres: y or vertical resolution of the display
29 * @fps: frame per second
30 * @left_margin: left margin of the display
31 * @right_margin: right margin of the display
32 * @upper_margin: upper margin of the display
33 * @lower_margin: lower margin of the display
34 * @hsync_len: h-sync length
35 * @vsync_len: v-sync length
36 * @flags: bit field: bit usage is documented below
39 * Structure holding timing and resolution information of a standard.
40 * Used by vpbe_device to set required non-standard timing in the
41 * venc when lcd controller output is connected to a external encoder.
42 * A table of timings is maintained in vpbe device to set this in
43 * venc when external encoder is connected to lcd controller output.
44 * Encoder may provide a g_dv_timings() API to override these values
49 * if_type should be used only by encoder manager and encoder.
51 * b0 (LSB) - hsync polarity, 0 - negative, 1 - positive
52 * b1 - vsync polarity, 0 - negative, 1 - positive
53 * b2 - field id polarity, 0 - negative, 1 - positive
55 struct vpbe_enc_mode_info {
57 enum vpbe_enc_timings_type timings_type;
59 struct v4l2_dv_timings dv_timings;
60 unsigned int interlaced;
63 struct v4l2_fract aspect;
64 struct v4l2_fract fps;
65 unsigned int left_margin;
66 unsigned int right_margin;
67 unsigned int upper_margin;
68 unsigned int lower_margin;
69 unsigned int hsync_len;
70 unsigned int vsync_len;