Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[platform/adaptation/renesas_rcar/renesas_kernel.git] / include / linux / platform_data / ad5755.h
1 /*
2  * Copyright 2012 Analog Devices Inc.
3  *
4  * Licensed under the GPL-2.
5  */
6 #ifndef __LINUX_PLATFORM_DATA_AD5755_H__
7 #define __LINUX_PLATFORM_DATA_AD5755_H__
8
9 enum ad5755_mode {
10         AD5755_MODE_VOLTAGE_0V_5V               = 0,
11         AD5755_MODE_VOLTAGE_0V_10V              = 1,
12         AD5755_MODE_VOLTAGE_PLUSMINUS_5V        = 2,
13         AD5755_MODE_VOLTAGE_PLUSMINUS_10V       = 3,
14         AD5755_MODE_CURRENT_4mA_20mA            = 4,
15         AD5755_MODE_CURRENT_0mA_20mA            = 5,
16         AD5755_MODE_CURRENT_0mA_24mA            = 6,
17 };
18
19 enum ad5755_dc_dc_phase {
20         AD5755_DC_DC_PHASE_ALL_SAME_EDGE                = 0,
21         AD5755_DC_DC_PHASE_A_B_SAME_EDGE_C_D_OPP_EDGE   = 1,
22         AD5755_DC_DC_PHASE_A_C_SAME_EDGE_B_D_OPP_EDGE   = 2,
23         AD5755_DC_DC_PHASE_90_DEGREE                    = 3,
24 };
25
26 enum ad5755_dc_dc_freq {
27         AD5755_DC_DC_FREQ_250kHZ = 0,
28         AD5755_DC_DC_FREQ_410kHZ = 1,
29         AD5755_DC_DC_FREQ_650kHZ = 2,
30 };
31
32 enum ad5755_dc_dc_maxv {
33         AD5755_DC_DC_MAXV_23V   = 0,
34         AD5755_DC_DC_MAXV_24V5  = 1,
35         AD5755_DC_DC_MAXV_27V   = 2,
36         AD5755_DC_DC_MAXV_29V5  = 3,
37 };
38
39 enum ad5755_slew_rate {
40         AD5755_SLEW_RATE_64k    = 0,
41         AD5755_SLEW_RATE_32k    = 1,
42         AD5755_SLEW_RATE_16k    = 2,
43         AD5755_SLEW_RATE_8k     = 3,
44         AD5755_SLEW_RATE_4k     = 4,
45         AD5755_SLEW_RATE_2k     = 5,
46         AD5755_SLEW_RATE_1k     = 6,
47         AD5755_SLEW_RATE_500    = 7,
48         AD5755_SLEW_RATE_250    = 8,
49         AD5755_SLEW_RATE_125    = 9,
50         AD5755_SLEW_RATE_64     = 10,
51         AD5755_SLEW_RATE_32     = 11,
52         AD5755_SLEW_RATE_16     = 12,
53         AD5755_SLEW_RATE_8      = 13,
54         AD5755_SLEW_RATE_4      = 14,
55         AD5755_SLEW_RATE_0_5    = 15,
56 };
57
58 enum ad5755_slew_step_size {
59         AD5755_SLEW_STEP_SIZE_1 = 0,
60         AD5755_SLEW_STEP_SIZE_2 = 1,
61         AD5755_SLEW_STEP_SIZE_4 = 2,
62         AD5755_SLEW_STEP_SIZE_8 = 3,
63         AD5755_SLEW_STEP_SIZE_16 = 4,
64         AD5755_SLEW_STEP_SIZE_32 = 5,
65         AD5755_SLEW_STEP_SIZE_64 = 6,
66         AD5755_SLEW_STEP_SIZE_128 = 7,
67         AD5755_SLEW_STEP_SIZE_256 = 8,
68 };
69
70 /**
71  * struct ad5755_platform_data - AD5755 DAC driver platform data
72  * @ext_dc_dc_compenstation_resistor: Whether an external DC-DC converter
73  * compensation register is used.
74  * @dc_dc_phase: DC-DC converter phase.
75  * @dc_dc_freq: DC-DC converter frequency.
76  * @dc_dc_maxv: DC-DC maximum allowed boost voltage.
77  * @dac.mode: The mode to be used for the DAC output.
78  * @dac.ext_current_sense_resistor: Whether an external current sense resistor
79  * is used.
80  * @dac.enable_voltage_overrange: Whether to enable 20% voltage output overrange.
81  * @dac.slew.enable: Whether to enable digital slew.
82  * @dac.slew.rate: Slew rate of the digital slew.
83  * @dac.slew.step_size: Slew step size of the digital slew.
84  **/
85 struct ad5755_platform_data {
86         bool ext_dc_dc_compenstation_resistor;
87         enum ad5755_dc_dc_phase dc_dc_phase;
88         enum ad5755_dc_dc_freq dc_dc_freq;
89         enum ad5755_dc_dc_maxv dc_dc_maxv;
90
91         struct {
92                 enum ad5755_mode mode;
93                 bool ext_current_sense_resistor;
94                 bool enable_voltage_overrange;
95                 struct {
96                         bool enable;
97                         enum ad5755_slew_rate rate;
98                         enum ad5755_slew_step_size step_size;
99                 } slew;
100         } dac[4];
101 };
102
103 #endif