1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_PGTABLE_H
3 #define _LINUX_PGTABLE_H
6 #include <asm/pgtable.h>
11 #include <linux/mm_types.h>
12 #include <linux/bug.h>
13 #include <linux/errno.h>
14 #include <asm-generic/pgtable_uffd.h>
16 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
17 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
18 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
22 * On almost all architectures and configurations, 0 can be used as the
23 * upper ceiling to free_pgtables(): on many architectures it has the same
24 * effect as using TASK_SIZE. However, there is one configuration which
25 * must impose a more careful limit, to avoid freeing kernel pgtables.
27 #ifndef USER_PGTABLES_CEILING
28 #define USER_PGTABLES_CEILING 0UL
32 * This defines the first usable user address. Platforms
33 * can override its value with custom FIRST_USER_ADDRESS
34 * defined in their respective <asm/pgtable.h>.
36 #ifndef FIRST_USER_ADDRESS
37 #define FIRST_USER_ADDRESS 0UL
41 * This defines the generic helper for accessing PMD page
42 * table page. Although platforms can still override this
43 * via their respective <asm/pgtable.h>.
46 #define pmd_pgtable(pmd) pmd_page(pmd)
50 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD]
52 * The pXx_index() functions return the index of the entry in the page
53 * table page which would control the given virtual address
55 * As these functions may be used by the same code for different levels of
56 * the page table folding, they are always available, regardless of
57 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0
58 * because in such cases PTRS_PER_PxD equals 1.
61 static inline unsigned long pte_index(unsigned long address)
63 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
67 static inline unsigned long pmd_index(unsigned long address)
69 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
71 #define pmd_index pmd_index
75 static inline unsigned long pud_index(unsigned long address)
77 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
79 #define pud_index pud_index
83 /* Must be a compile-time constant, so implement it as a macro */
84 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
87 #ifndef pte_offset_kernel
88 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
90 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
92 #define pte_offset_kernel pte_offset_kernel
95 #if defined(CONFIG_HIGHPTE)
96 #define pte_offset_map(dir, address) \
97 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \
99 #define pte_unmap(pte) kunmap_atomic((pte))
101 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
102 #define pte_unmap(pte) ((void)(pte)) /* NOP */
105 /* Find an entry in the second-level page table.. */
107 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
109 return pud_pgtable(*pud) + pmd_index(address);
111 #define pmd_offset pmd_offset
115 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
117 return p4d_pgtable(*p4d) + pud_index(address);
119 #define pud_offset pud_offset
122 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address)
124 return (pgd + pgd_index(address));
128 * a shortcut to get a pgd_t in a given mm
131 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
135 * a shortcut which implies the use of the kernel's pgd, instead
139 #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
143 * In many cases it is known that a virtual address is mapped at PMD or PTE
144 * level, so instead of traversing all the page table levels, we can get a
145 * pointer to the PMD entry in user or kernel page table or translate a virtual
146 * address to the pointer in the PTE in the kernel page tables with simple
149 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va)
151 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va);
154 static inline pmd_t *pmd_off_k(unsigned long va)
156 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va);
159 static inline pte_t *virt_to_kpte(unsigned long vaddr)
161 pmd_t *pmd = pmd_off_k(vaddr);
163 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr);
166 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
167 extern int ptep_set_access_flags(struct vm_area_struct *vma,
168 unsigned long address, pte_t *ptep,
169 pte_t entry, int dirty);
172 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
173 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
174 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
175 unsigned long address, pmd_t *pmdp,
176 pmd_t entry, int dirty);
177 extern int pudp_set_access_flags(struct vm_area_struct *vma,
178 unsigned long address, pud_t *pudp,
179 pud_t entry, int dirty);
181 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
182 unsigned long address, pmd_t *pmdp,
183 pmd_t entry, int dirty)
188 static inline int pudp_set_access_flags(struct vm_area_struct *vma,
189 unsigned long address, pud_t *pudp,
190 pud_t entry, int dirty)
195 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
198 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
199 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
200 unsigned long address,
208 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
213 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
214 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
215 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
216 unsigned long address,
224 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
228 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
229 unsigned long address,
235 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
238 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
239 int ptep_clear_flush_young(struct vm_area_struct *vma,
240 unsigned long address, pte_t *ptep);
243 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
244 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
245 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
246 unsigned long address, pmd_t *pmdp);
249 * Despite relevant to THP only, this API is called from generic rmap code
250 * under PageTransHuge(), hence needs a dummy implementation for !THP
252 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
253 unsigned long address, pmd_t *pmdp)
258 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
261 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
262 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
263 unsigned long address,
267 pte_clear(mm, address, ptep);
272 #ifndef __HAVE_ARCH_PTEP_GET
273 static inline pte_t ptep_get(pte_t *ptep)
275 return READ_ONCE(*ptep);
279 #ifdef CONFIG_GUP_GET_PTE_LOW_HIGH
281 * WARNING: only to be used in the get_user_pages_fast() implementation.
283 * With get_user_pages_fast(), we walk down the pagetables without taking any
284 * locks. For this we would like to load the pointers atomically, but sometimes
285 * that is not possible (e.g. without expensive cmpxchg8b on x86_32 PAE). What
286 * we do have is the guarantee that a PTE will only either go from not present
287 * to present, or present to not present or both -- it will not switch to a
288 * completely different present page without a TLB flush in between; something
289 * that we are blocking by holding interrupts off.
291 * Setting ptes from not present to present goes:
293 * ptep->pte_high = h;
297 * And present to not present goes:
301 * ptep->pte_high = 0;
303 * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'.
304 * We load pte_high *after* loading pte_low, which ensures we don't see an older
305 * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't
306 * picked up a changed pte high. We might have gotten rubbish values from
307 * pte_low and pte_high, but we are guaranteed that pte_low will not have the
308 * present bit set *unless* it is 'l'. Because get_user_pages_fast() only
309 * operates on present ptes we're safe.
311 static inline pte_t ptep_get_lockless(pte_t *ptep)
316 pte.pte_low = ptep->pte_low;
318 pte.pte_high = ptep->pte_high;
320 } while (unlikely(pte.pte_low != ptep->pte_low));
324 #else /* CONFIG_GUP_GET_PTE_LOW_HIGH */
326 * We require that the PTE can be read atomically.
328 static inline pte_t ptep_get_lockless(pte_t *ptep)
330 return ptep_get(ptep);
332 #endif /* CONFIG_GUP_GET_PTE_LOW_HIGH */
334 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
335 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
336 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
337 unsigned long address,
344 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
345 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
346 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
347 unsigned long address,
355 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
356 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
358 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
359 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
360 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,
361 unsigned long address, pmd_t *pmdp,
364 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
368 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
369 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
370 unsigned long address, pud_t *pudp,
373 return pudp_huge_get_and_clear(mm, address, pudp);
376 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
378 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
379 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
380 unsigned long address, pte_t *ptep,
384 pte = ptep_get_and_clear(mm, address, ptep);
391 * If two threads concurrently fault at the same page, the thread that
392 * won the race updates the PTE and its local TLB/Cache. The other thread
393 * gives up, simply does nothing, and continues; on architectures where
394 * software can update TLB, local TLB can be updated here to avoid next page
395 * fault. This function updates TLB only, do nothing with cache or others.
396 * It is the difference with function update_mmu_cache.
398 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB
399 static inline void update_mmu_tlb(struct vm_area_struct *vma,
400 unsigned long address, pte_t *ptep)
403 #define __HAVE_ARCH_UPDATE_MMU_TLB
407 * Some architectures may be able to avoid expensive synchronization
408 * primitives when modifications are made to PTE's which are already
409 * not present, or in the process of an address space destruction.
411 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
412 static inline void pte_clear_not_present_full(struct mm_struct *mm,
413 unsigned long address,
417 pte_clear(mm, address, ptep);
421 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
422 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
423 unsigned long address,
427 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
428 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
429 unsigned long address,
431 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
432 unsigned long address,
436 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
438 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
440 pte_t old_pte = *ptep;
441 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
446 * On some architectures hardware does not set page access bit when accessing
447 * memory page, it is responsibility of software setting this bit. It brings
448 * out extra page fault penalty to track page access bit. For optimization page
449 * access bit can be set during all page fault flow on these arches.
450 * To be differentiate with macro pte_mkyoung, this macro is used on platforms
451 * where software maintains page access bit.
453 #ifndef pte_sw_mkyoung
454 static inline pte_t pte_sw_mkyoung(pte_t pte)
458 #define pte_sw_mkyoung pte_sw_mkyoung
461 #ifndef pte_savedwrite
462 #define pte_savedwrite pte_write
465 #ifndef pte_mk_savedwrite
466 #define pte_mk_savedwrite pte_mkwrite
469 #ifndef pte_clear_savedwrite
470 #define pte_clear_savedwrite pte_wrprotect
473 #ifndef pmd_savedwrite
474 #define pmd_savedwrite pmd_write
477 #ifndef pmd_mk_savedwrite
478 #define pmd_mk_savedwrite pmd_mkwrite
481 #ifndef pmd_clear_savedwrite
482 #define pmd_clear_savedwrite pmd_wrprotect
485 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
486 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
487 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
488 unsigned long address, pmd_t *pmdp)
490 pmd_t old_pmd = *pmdp;
491 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
494 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
495 unsigned long address, pmd_t *pmdp)
499 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
501 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
502 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
503 static inline void pudp_set_wrprotect(struct mm_struct *mm,
504 unsigned long address, pud_t *pudp)
506 pud_t old_pud = *pudp;
508 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
511 static inline void pudp_set_wrprotect(struct mm_struct *mm,
512 unsigned long address, pud_t *pudp)
516 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
519 #ifndef pmdp_collapse_flush
520 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
521 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
522 unsigned long address, pmd_t *pmdp);
524 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
525 unsigned long address,
531 #define pmdp_collapse_flush pmdp_collapse_flush
532 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
535 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
536 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
540 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
541 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
544 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
546 * This is an implementation of pmdp_establish() that is only suitable for an
547 * architecture that doesn't have hardware dirty/accessed bits. In this case we
548 * can't race with CPU which sets these bits and non-atomic approach is fine.
550 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma,
551 unsigned long address, pmd_t *pmdp, pmd_t pmd)
553 pmd_t old_pmd = *pmdp;
554 set_pmd_at(vma->vm_mm, address, pmdp, pmd);
559 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
560 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
564 #ifndef __HAVE_ARCH_PTE_SAME
565 static inline int pte_same(pte_t pte_a, pte_t pte_b)
567 return pte_val(pte_a) == pte_val(pte_b);
571 #ifndef __HAVE_ARCH_PTE_UNUSED
573 * Some architectures provide facilities to virtualization guests
574 * so that they can flag allocated pages as unused. This allows the
575 * host to transparently reclaim unused pages. This function returns
576 * whether the pte's page is unused.
578 static inline int pte_unused(pte_t pte)
584 #ifndef pte_access_permitted
585 #define pte_access_permitted(pte, write) \
586 (pte_present(pte) && (!(write) || pte_write(pte)))
589 #ifndef pmd_access_permitted
590 #define pmd_access_permitted(pmd, write) \
591 (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
594 #ifndef pud_access_permitted
595 #define pud_access_permitted(pud, write) \
596 (pud_present(pud) && (!(write) || pud_write(pud)))
599 #ifndef p4d_access_permitted
600 #define p4d_access_permitted(p4d, write) \
601 (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
604 #ifndef pgd_access_permitted
605 #define pgd_access_permitted(pgd, write) \
606 (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
609 #ifndef __HAVE_ARCH_PMD_SAME
610 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
612 return pmd_val(pmd_a) == pmd_val(pmd_b);
615 static inline int pud_same(pud_t pud_a, pud_t pud_b)
617 return pud_val(pud_a) == pud_val(pud_b);
621 #ifndef __HAVE_ARCH_P4D_SAME
622 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b)
624 return p4d_val(p4d_a) == p4d_val(p4d_b);
628 #ifndef __HAVE_ARCH_PGD_SAME
629 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b)
631 return pgd_val(pgd_a) == pgd_val(pgd_b);
636 * Use set_p*_safe(), and elide TLB flushing, when confident that *no*
637 * TLB flush will be required as a result of the "set". For example, use
638 * in scenarios where it is known ahead of time that the routine is
639 * setting non-present entries, or re-setting an existing entry to the
640 * same value. Otherwise, use the typical "set" helpers and flush the
643 #define set_pte_safe(ptep, pte) \
645 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \
646 set_pte(ptep, pte); \
649 #define set_pmd_safe(pmdp, pmd) \
651 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \
652 set_pmd(pmdp, pmd); \
655 #define set_pud_safe(pudp, pud) \
657 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \
658 set_pud(pudp, pud); \
661 #define set_p4d_safe(p4dp, p4d) \
663 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \
664 set_p4d(p4dp, p4d); \
667 #define set_pgd_safe(pgdp, pgd) \
669 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \
670 set_pgd(pgdp, pgd); \
673 #ifndef __HAVE_ARCH_DO_SWAP_PAGE
675 * Some architectures support metadata associated with a page. When a
676 * page is being swapped out, this metadata must be saved so it can be
677 * restored when the page is swapped back in. SPARC M7 and newer
678 * processors support an ADI (Application Data Integrity) tag for the
679 * page as metadata for the page. arch_do_swap_page() can restore this
680 * metadata when a page is swapped back in.
682 static inline void arch_do_swap_page(struct mm_struct *mm,
683 struct vm_area_struct *vma,
685 pte_t pte, pte_t oldpte)
691 #ifndef __HAVE_ARCH_UNMAP_ONE
693 * Some architectures support metadata associated with a page. When a
694 * page is being swapped out, this metadata must be saved so it can be
695 * restored when the page is swapped back in. SPARC M7 and newer
696 * processors support an ADI (Application Data Integrity) tag for the
697 * page as metadata for the page. arch_unmap_one() can save this
698 * metadata on a swap-out of a page.
700 static inline int arch_unmap_one(struct mm_struct *mm,
701 struct vm_area_struct *vma,
710 * Allow architectures to preserve additional metadata associated with
711 * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function
712 * prototypes must be defined in the arch-specific asm/pgtable.h file.
714 #ifndef __HAVE_ARCH_PREPARE_TO_SWAP
715 static inline int arch_prepare_to_swap(struct page *page)
721 #ifndef __HAVE_ARCH_SWAP_INVALIDATE
722 static inline void arch_swap_invalidate_page(int type, pgoff_t offset)
726 static inline void arch_swap_invalidate_area(int type)
731 #ifndef __HAVE_ARCH_SWAP_RESTORE
732 static inline void arch_swap_restore(swp_entry_t entry, struct page *page)
737 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
738 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
741 #ifndef __HAVE_ARCH_MOVE_PTE
742 #define move_pte(pte, prot, old_addr, new_addr) (pte)
745 #ifndef pte_accessible
746 # define pte_accessible(mm, pte) ((void)(pte), 1)
749 #ifndef flush_tlb_fix_spurious_fault
750 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
754 * When walking page tables, get the address of the next boundary,
755 * or the end address of the range if that comes earlier. Although no
756 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
759 #define pgd_addr_end(addr, end) \
760 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
761 (__boundary - 1 < (end) - 1)? __boundary: (end); \
765 #define p4d_addr_end(addr, end) \
766 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
767 (__boundary - 1 < (end) - 1)? __boundary: (end); \
772 #define pud_addr_end(addr, end) \
773 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
774 (__boundary - 1 < (end) - 1)? __boundary: (end); \
779 #define pmd_addr_end(addr, end) \
780 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
781 (__boundary - 1 < (end) - 1)? __boundary: (end); \
786 * When walking page tables, we usually want to skip any p?d_none entries;
787 * and any p?d_bad entries - reporting the error before resetting to none.
788 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
790 void pgd_clear_bad(pgd_t *);
792 #ifndef __PAGETABLE_P4D_FOLDED
793 void p4d_clear_bad(p4d_t *);
795 #define p4d_clear_bad(p4d) do { } while (0)
798 #ifndef __PAGETABLE_PUD_FOLDED
799 void pud_clear_bad(pud_t *);
801 #define pud_clear_bad(p4d) do { } while (0)
804 void pmd_clear_bad(pmd_t *);
806 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
810 if (unlikely(pgd_bad(*pgd))) {
817 static inline int p4d_none_or_clear_bad(p4d_t *p4d)
821 if (unlikely(p4d_bad(*p4d))) {
828 static inline int pud_none_or_clear_bad(pud_t *pud)
832 if (unlikely(pud_bad(*pud))) {
839 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
843 if (unlikely(pmd_bad(*pmd))) {
850 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma,
855 * Get the current pte state, but zero it out to make it
856 * non-present, preventing the hardware from asynchronously
859 return ptep_get_and_clear(vma->vm_mm, addr, ptep);
862 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma,
864 pte_t *ptep, pte_t pte)
867 * The pte is non-present, so there's no hardware state to
870 set_pte_at(vma->vm_mm, addr, ptep, pte);
873 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
875 * Start a pte protection read-modify-write transaction, which
876 * protects against asynchronous hardware modifications to the pte.
877 * The intention is not to prevent the hardware from making pte
878 * updates, but to prevent any updates it may make from being lost.
880 * This does not protect against other software modifications of the
881 * pte; the appropriate pte lock must be held over the transaction.
883 * Note that this interface is intended to be batchable, meaning that
884 * ptep_modify_prot_commit may not actually update the pte, but merely
885 * queue the update to be done at some later time. The update must be
886 * actually committed before the pte lock is released, however.
888 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma,
892 return __ptep_modify_prot_start(vma, addr, ptep);
896 * Commit an update to a pte, leaving any hardware-controlled bits in
897 * the PTE unmodified.
899 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma,
901 pte_t *ptep, pte_t old_pte, pte_t pte)
903 __ptep_modify_prot_commit(vma, addr, ptep, pte);
905 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
906 #endif /* CONFIG_MMU */
909 * No-op macros that just return the current protection value. Defined here
910 * because these macros can be used even if CONFIG_MMU is not defined.
914 #define pgprot_nx(prot) (prot)
917 #ifndef pgprot_noncached
918 #define pgprot_noncached(prot) (prot)
921 #ifndef pgprot_writecombine
922 #define pgprot_writecombine pgprot_noncached
925 #ifndef pgprot_writethrough
926 #define pgprot_writethrough pgprot_noncached
929 #ifndef pgprot_device
930 #define pgprot_device pgprot_noncached
934 #define pgprot_mhp(prot) (prot)
938 #ifndef pgprot_modify
939 #define pgprot_modify pgprot_modify
940 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
942 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
943 newprot = pgprot_noncached(newprot);
944 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
945 newprot = pgprot_writecombine(newprot);
946 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
947 newprot = pgprot_device(newprot);
951 #endif /* CONFIG_MMU */
953 #ifndef pgprot_encrypted
954 #define pgprot_encrypted(prot) (prot)
957 #ifndef pgprot_decrypted
958 #define pgprot_decrypted(prot) (prot)
962 * A facility to provide lazy MMU batching. This allows PTE updates and
963 * page invalidations to be delayed until a call to leave lazy MMU mode
964 * is issued. Some architectures may benefit from doing this, and it is
965 * beneficial for both shadow and direct mode hypervisors, which may batch
966 * the PTE updates which happen during this window. Note that using this
967 * interface requires that read hazards be removed from the code. A read
968 * hazard could result in the direct mode hypervisor case, since the actual
969 * write to the page tables may not yet have taken place, so reads though
970 * a raw PTE pointer after it has been modified are not guaranteed to be
971 * up to date. This mode can only be entered and left under the protection of
972 * the page table locks for all page tables which may be modified. In the UP
973 * case, this is required so that preemption is disabled, and in the SMP case,
974 * it must synchronize the delayed page table writes properly on other CPUs.
976 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
977 #define arch_enter_lazy_mmu_mode() do {} while (0)
978 #define arch_leave_lazy_mmu_mode() do {} while (0)
979 #define arch_flush_lazy_mmu_mode() do {} while (0)
983 * A facility to provide batching of the reload of page tables and
984 * other process state with the actual context switch code for
985 * paravirtualized guests. By convention, only one of the batched
986 * update (lazy) modes (CPU, MMU) should be active at any given time,
987 * entry should never be nested, and entry and exits should always be
988 * paired. This is for sanity of maintaining and reasoning about the
989 * kernel code. In this case, the exit (end of the context switch) is
990 * in architecture-specific code, and so doesn't need a generic
993 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
994 #define arch_start_context_switch(prev) do {} while (0)
997 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
998 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION
999 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1004 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1009 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1014 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */
1015 static inline int pte_soft_dirty(pte_t pte)
1020 static inline int pmd_soft_dirty(pmd_t pmd)
1025 static inline pte_t pte_mksoft_dirty(pte_t pte)
1030 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
1035 static inline pte_t pte_clear_soft_dirty(pte_t pte)
1040 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
1045 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1050 static inline int pte_swp_soft_dirty(pte_t pte)
1055 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1060 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1065 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1070 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1076 #ifndef __HAVE_PFNMAP_TRACKING
1078 * Interfaces that can be used by architecture code to keep track of
1079 * memory type of pfn mappings specified by the remap_pfn_range,
1084 * track_pfn_remap is called when a _new_ pfn mapping is being established
1085 * by remap_pfn_range() for physical range indicated by pfn and size.
1087 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1088 unsigned long pfn, unsigned long addr,
1095 * track_pfn_insert is called when a _new_ single pfn is established
1096 * by vmf_insert_pfn().
1098 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1104 * track_pfn_copy is called when vma that is covering the pfnmap gets
1105 * copied through copy_page_range().
1107 static inline int track_pfn_copy(struct vm_area_struct *vma)
1113 * untrack_pfn is called while unmapping a pfnmap for a region.
1114 * untrack can be called for a specific region indicated by pfn and size or
1115 * can be for the entire vma (in which case pfn, size are zero).
1117 static inline void untrack_pfn(struct vm_area_struct *vma,
1118 unsigned long pfn, unsigned long size)
1123 * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
1125 static inline void untrack_pfn_moved(struct vm_area_struct *vma)
1129 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1130 unsigned long pfn, unsigned long addr,
1131 unsigned long size);
1132 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1134 extern int track_pfn_copy(struct vm_area_struct *vma);
1135 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
1136 unsigned long size);
1137 extern void untrack_pfn_moved(struct vm_area_struct *vma);
1141 #ifdef __HAVE_COLOR_ZERO_PAGE
1142 static inline int is_zero_pfn(unsigned long pfn)
1144 extern unsigned long zero_pfn;
1145 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
1146 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
1149 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
1152 static inline int is_zero_pfn(unsigned long pfn)
1154 extern unsigned long zero_pfn;
1155 return pfn == zero_pfn;
1158 static inline unsigned long my_zero_pfn(unsigned long addr)
1160 extern unsigned long zero_pfn;
1165 static inline int is_zero_pfn(unsigned long pfn)
1170 static inline unsigned long my_zero_pfn(unsigned long addr)
1174 #endif /* CONFIG_MMU */
1178 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
1179 static inline int pmd_trans_huge(pmd_t pmd)
1184 static inline int pmd_write(pmd_t pmd)
1189 #endif /* pmd_write */
1190 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1193 static inline int pud_write(pud_t pud)
1198 #endif /* pud_write */
1200 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE)
1201 static inline int pmd_devmap(pmd_t pmd)
1205 static inline int pud_devmap(pud_t pud)
1209 static inline int pgd_devmap(pgd_t pgd)
1215 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
1216 (defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1217 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD))
1218 static inline int pud_trans_huge(pud_t pud)
1224 /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */
1225 static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud)
1227 pud_t pudval = READ_ONCE(*pud);
1229 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval))
1231 if (unlikely(pud_bad(pudval))) {
1238 /* See pmd_trans_unstable for discussion. */
1239 static inline int pud_trans_unstable(pud_t *pud)
1241 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1242 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
1243 return pud_none_or_trans_huge_or_dev_or_clear_bad(pud);
1249 #ifndef pmd_read_atomic
1250 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
1253 * Depend on compiler for an atomic pmd read. NOTE: this is
1254 * only going to work, if the pmdval_t isn't larger than
1261 #ifndef arch_needs_pgtable_deposit
1262 #define arch_needs_pgtable_deposit() (false)
1265 * This function is meant to be used by sites walking pagetables with
1266 * the mmap_lock held in read mode to protect against MADV_DONTNEED and
1267 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
1268 * into a null pmd and the transhuge page fault can convert a null pmd
1269 * into an hugepmd or into a regular pmd (if the hugepage allocation
1270 * fails). While holding the mmap_lock in read mode the pmd becomes
1271 * stable and stops changing under us only if it's not null and not a
1272 * transhuge pmd. When those races occurs and this function makes a
1273 * difference vs the standard pmd_none_or_clear_bad, the result is
1274 * undefined so behaving like if the pmd was none is safe (because it
1275 * can return none anyway). The compiler level barrier() is critically
1276 * important to compute the two checks atomically on the same pmdval.
1278 * For 32bit kernels with a 64bit large pmd_t this automatically takes
1279 * care of reading the pmd atomically to avoid SMP race conditions
1280 * against pmd_populate() when the mmap_lock is hold for reading by the
1281 * caller (a special atomic read not done by "gcc" as in the generic
1282 * version above, is also needed when THP is disabled because the page
1283 * fault can populate the pmd from under us).
1285 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
1287 pmd_t pmdval = pmd_read_atomic(pmd);
1289 * The barrier will stabilize the pmdval in a register or on
1290 * the stack so that it will stop changing under the code.
1292 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
1293 * pmd_read_atomic is allowed to return a not atomic pmdval
1294 * (for example pointing to an hugepage that has never been
1295 * mapped in the pmd). The below checks will only care about
1296 * the low part of the pmd with 32bit PAE x86 anyway, with the
1297 * exception of pmd_none(). So the important thing is that if
1298 * the low part of the pmd is found null, the high part will
1299 * be also null or the pmd_none() check below would be
1302 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1306 * !pmd_present() checks for pmd migration entries
1308 * The complete check uses is_pmd_migration_entry() in linux/swapops.h
1309 * But using that requires moving current function and pmd_trans_unstable()
1310 * to linux/swapops.h to resolve dependency, which is too much code move.
1312 * !pmd_present() is equivalent to is_pmd_migration_entry() currently,
1313 * because !pmd_present() pages can only be under migration not swapped
1316 * pmd_none() is preserved for future condition checks on pmd migration
1317 * entries and not confusing with this function name, although it is
1318 * redundant with !pmd_present().
1320 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) ||
1321 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval)))
1323 if (unlikely(pmd_bad(pmdval))) {
1331 * This is a noop if Transparent Hugepage Support is not built into
1332 * the kernel. Otherwise it is equivalent to
1333 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
1334 * places that already verified the pmd is not none and they want to
1335 * walk ptes while holding the mmap sem in read mode (write mode don't
1336 * need this). If THP is not enabled, the pmd can't go away under the
1337 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
1338 * run a pmd_trans_unstable before walking the ptes after
1339 * split_huge_pmd returns (because it may have run when the pmd become
1340 * null, but then a page fault can map in a THP and not a regular page).
1342 static inline int pmd_trans_unstable(pmd_t *pmd)
1344 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1345 return pmd_none_or_trans_huge_or_clear_bad(pmd);
1352 * the ordering of these checks is important for pmds with _page_devmap set.
1353 * if we check pmd_trans_unstable() first we will trip the bad_pmd() check
1354 * inside of pmd_none_or_trans_huge_or_clear_bad(). this will end up correctly
1355 * returning 1 but not before it spams dmesg with the pmd_clear_bad() output.
1357 static inline int pmd_devmap_trans_unstable(pmd_t *pmd)
1359 return pmd_devmap(*pmd) || pmd_trans_unstable(pmd);
1362 #ifndef CONFIG_NUMA_BALANCING
1364 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
1365 * the only case the kernel cares is for NUMA balancing and is only ever set
1366 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
1367 * _PAGE_PROTNONE so by default, implement the helper as "always no". It
1368 * is the responsibility of the caller to distinguish between PROT_NONE
1369 * protections and NUMA hinting fault protections.
1371 static inline int pte_protnone(pte_t pte)
1376 static inline int pmd_protnone(pmd_t pmd)
1380 #endif /* CONFIG_NUMA_BALANCING */
1382 #endif /* CONFIG_MMU */
1384 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
1386 #ifndef __PAGETABLE_P4D_FOLDED
1387 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
1388 int p4d_clear_huge(p4d_t *p4d);
1390 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1394 static inline int p4d_clear_huge(p4d_t *p4d)
1398 #endif /* !__PAGETABLE_P4D_FOLDED */
1400 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
1401 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
1402 int pud_clear_huge(pud_t *pud);
1403 int pmd_clear_huge(pmd_t *pmd);
1404 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr);
1405 int pud_free_pmd_page(pud_t *pud, unsigned long addr);
1406 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);
1407 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
1408 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1412 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
1416 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
1420 static inline int p4d_clear_huge(p4d_t *p4d)
1424 static inline int pud_clear_huge(pud_t *pud)
1428 static inline int pmd_clear_huge(pmd_t *pmd)
1432 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr)
1436 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr)
1440 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
1444 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
1446 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
1447 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1449 * ARCHes with special requirements for evicting THP backing TLB entries can
1450 * implement this. Otherwise also, it can help optimize normal TLB flush in
1451 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the
1452 * entire TLB if flush span is greater than a threshold, which will
1453 * likely be true for a single huge page. Thus a single THP flush will
1454 * invalidate the entire TLB which is not desirable.
1455 * e.g. see arch/arc: flush_pmd_tlb_range
1457 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1458 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1460 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
1461 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
1466 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
1467 unsigned long size, pgprot_t *vma_prot);
1469 #ifndef CONFIG_X86_ESPFIX64
1470 static inline void init_espfix_bsp(void) { }
1473 extern void __init pgtable_cache_init(void);
1475 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED
1476 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
1481 static inline bool arch_has_pfn_modify_check(void)
1485 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */
1488 * Architecture PAGE_KERNEL_* fallbacks
1490 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either
1491 * because they really don't support them, or the port needs to be updated to
1492 * reflect the required functionality. Below are a set of relatively safe
1493 * fallbacks, as best effort, which we can count on in lieu of the architectures
1494 * not defining them on their own yet.
1497 #ifndef PAGE_KERNEL_RO
1498 # define PAGE_KERNEL_RO PAGE_KERNEL
1501 #ifndef PAGE_KERNEL_EXEC
1502 # define PAGE_KERNEL_EXEC PAGE_KERNEL
1506 * Page Table Modification bits for pgtbl_mod_mask.
1508 * These are used by the p?d_alloc_track*() set of functions an in the generic
1509 * vmalloc/ioremap code to track at which page-table levels entries have been
1510 * modified. Based on that the code can better decide when vmalloc and ioremap
1511 * mapping changes need to be synchronized to other page-tables in the system.
1513 #define __PGTBL_PGD_MODIFIED 0
1514 #define __PGTBL_P4D_MODIFIED 1
1515 #define __PGTBL_PUD_MODIFIED 2
1516 #define __PGTBL_PMD_MODIFIED 3
1517 #define __PGTBL_PTE_MODIFIED 4
1519 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED)
1520 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED)
1521 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED)
1522 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED)
1523 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED)
1525 /* Page-Table Modification Mask */
1526 typedef unsigned int pgtbl_mod_mask;
1528 #endif /* !__ASSEMBLY__ */
1530 #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT)
1531 #ifdef CONFIG_PHYS_ADDR_T_64BIT
1533 * ZSMALLOC needs to know the highest PFN on 32-bit architectures
1534 * with physical address space extension, but falls back to
1535 * BITS_PER_LONG otherwise.
1537 #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition
1539 #define MAX_POSSIBLE_PHYSMEM_BITS 32
1543 #ifndef has_transparent_hugepage
1544 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1545 #define has_transparent_hugepage() 1
1547 #define has_transparent_hugepage() 0
1552 * On some architectures it depends on the mm if the p4d/pud or pmd
1553 * layer of the page table hierarchy is folded or not.
1555 #ifndef mm_p4d_folded
1556 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED)
1559 #ifndef mm_pud_folded
1560 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED)
1563 #ifndef mm_pmd_folded
1564 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED)
1567 #ifndef p4d_offset_lockless
1568 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address)
1570 #ifndef pud_offset_lockless
1571 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address)
1573 #ifndef pmd_offset_lockless
1574 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address)
1578 * p?d_leaf() - true if this entry is a final mapping to a physical address.
1579 * This differs from p?d_huge() by the fact that they are always available (if
1580 * the architecture supports large pages at the appropriate level) even
1581 * if CONFIG_HUGETLB_PAGE is not defined.
1582 * Only meaningful when called on a valid entry.
1585 #define pgd_leaf(x) 0
1588 #define p4d_leaf(x) 0
1591 #define pud_leaf(x) 0
1594 #define pmd_leaf(x) 0
1597 #ifndef pgd_leaf_size
1598 #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT)
1600 #ifndef p4d_leaf_size
1601 #define p4d_leaf_size(x) P4D_SIZE
1603 #ifndef pud_leaf_size
1604 #define pud_leaf_size(x) PUD_SIZE
1606 #ifndef pmd_leaf_size
1607 #define pmd_leaf_size(x) PMD_SIZE
1609 #ifndef pte_leaf_size
1610 #define pte_leaf_size(x) PAGE_SIZE
1614 * Some architectures have MMUs that are configurable or selectable at boot
1615 * time. These lead to variable PTRS_PER_x. For statically allocated arrays it
1616 * helps to have a static maximum value.
1619 #ifndef MAX_PTRS_PER_PTE
1620 #define MAX_PTRS_PER_PTE PTRS_PER_PTE
1623 #ifndef MAX_PTRS_PER_PMD
1624 #define MAX_PTRS_PER_PMD PTRS_PER_PMD
1627 #ifndef MAX_PTRS_PER_PUD
1628 #define MAX_PTRS_PER_PUD PTRS_PER_PUD
1631 #ifndef MAX_PTRS_PER_P4D
1632 #define MAX_PTRS_PER_P4D PTRS_PER_P4D
1635 #endif /* _LINUX_PGTABLE_H */