1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_PGTABLE_H
3 #define _LINUX_PGTABLE_H
6 #include <asm/pgtable.h>
11 #include <linux/mm_types.h>
12 #include <linux/bug.h>
13 #include <linux/errno.h>
14 #include <asm-generic/pgtable_uffd.h>
16 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
17 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
18 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
22 * On almost all architectures and configurations, 0 can be used as the
23 * upper ceiling to free_pgtables(): on many architectures it has the same
24 * effect as using TASK_SIZE. However, there is one configuration which
25 * must impose a more careful limit, to avoid freeing kernel pgtables.
27 #ifndef USER_PGTABLES_CEILING
28 #define USER_PGTABLES_CEILING 0UL
32 * This defines the first usable user address. Platforms
33 * can override its value with custom FIRST_USER_ADDRESS
34 * defined in their respective <asm/pgtable.h>.
36 #ifndef FIRST_USER_ADDRESS
37 #define FIRST_USER_ADDRESS 0UL
41 * This defines the generic helper for accessing PMD page
42 * table page. Although platforms can still override this
43 * via their respective <asm/pgtable.h>.
46 #define pmd_pgtable(pmd) pmd_page(pmd)
50 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD]
52 * The pXx_index() functions return the index of the entry in the page
53 * table page which would control the given virtual address
55 * As these functions may be used by the same code for different levels of
56 * the page table folding, they are always available, regardless of
57 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0
58 * because in such cases PTRS_PER_PxD equals 1.
61 static inline unsigned long pte_index(unsigned long address)
63 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
65 #define pte_index pte_index
68 static inline unsigned long pmd_index(unsigned long address)
70 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
72 #define pmd_index pmd_index
76 static inline unsigned long pud_index(unsigned long address)
78 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
80 #define pud_index pud_index
84 /* Must be a compile-time constant, so implement it as a macro */
85 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
88 #ifndef pte_offset_kernel
89 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
91 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
93 #define pte_offset_kernel pte_offset_kernel
96 #if defined(CONFIG_HIGHPTE)
97 #define pte_offset_map(dir, address) \
98 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \
100 #define pte_unmap(pte) kunmap_atomic((pte))
102 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
103 #define pte_unmap(pte) ((void)(pte)) /* NOP */
106 /* Find an entry in the second-level page table.. */
108 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
110 return pud_pgtable(*pud) + pmd_index(address);
112 #define pmd_offset pmd_offset
116 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
118 return p4d_pgtable(*p4d) + pud_index(address);
120 #define pud_offset pud_offset
123 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address)
125 return (pgd + pgd_index(address));
129 * a shortcut to get a pgd_t in a given mm
132 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
136 * a shortcut which implies the use of the kernel's pgd, instead
140 #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
144 * In many cases it is known that a virtual address is mapped at PMD or PTE
145 * level, so instead of traversing all the page table levels, we can get a
146 * pointer to the PMD entry in user or kernel page table or translate a virtual
147 * address to the pointer in the PTE in the kernel page tables with simple
150 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va)
152 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va);
155 static inline pmd_t *pmd_off_k(unsigned long va)
157 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va);
160 static inline pte_t *virt_to_kpte(unsigned long vaddr)
162 pmd_t *pmd = pmd_off_k(vaddr);
164 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr);
167 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
168 extern int ptep_set_access_flags(struct vm_area_struct *vma,
169 unsigned long address, pte_t *ptep,
170 pte_t entry, int dirty);
173 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
174 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
175 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
176 unsigned long address, pmd_t *pmdp,
177 pmd_t entry, int dirty);
178 extern int pudp_set_access_flags(struct vm_area_struct *vma,
179 unsigned long address, pud_t *pudp,
180 pud_t entry, int dirty);
182 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
183 unsigned long address, pmd_t *pmdp,
184 pmd_t entry, int dirty)
189 static inline int pudp_set_access_flags(struct vm_area_struct *vma,
190 unsigned long address, pud_t *pudp,
191 pud_t entry, int dirty)
196 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
199 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
200 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
201 unsigned long address,
209 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
214 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
215 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
216 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
217 unsigned long address,
225 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
229 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
230 unsigned long address,
236 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
239 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
240 int ptep_clear_flush_young(struct vm_area_struct *vma,
241 unsigned long address, pte_t *ptep);
244 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
245 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
246 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
247 unsigned long address, pmd_t *pmdp);
250 * Despite relevant to THP only, this API is called from generic rmap code
251 * under PageTransHuge(), hence needs a dummy implementation for !THP
253 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
254 unsigned long address, pmd_t *pmdp)
259 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
262 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
263 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
264 unsigned long address,
268 pte_clear(mm, address, ptep);
273 #ifndef __HAVE_ARCH_PTEP_GET
274 static inline pte_t ptep_get(pte_t *ptep)
276 return READ_ONCE(*ptep);
280 #ifdef CONFIG_GUP_GET_PTE_LOW_HIGH
282 * WARNING: only to be used in the get_user_pages_fast() implementation.
284 * With get_user_pages_fast(), we walk down the pagetables without taking any
285 * locks. For this we would like to load the pointers atomically, but sometimes
286 * that is not possible (e.g. without expensive cmpxchg8b on x86_32 PAE). What
287 * we do have is the guarantee that a PTE will only either go from not present
288 * to present, or present to not present or both -- it will not switch to a
289 * completely different present page without a TLB flush in between; something
290 * that we are blocking by holding interrupts off.
292 * Setting ptes from not present to present goes:
294 * ptep->pte_high = h;
298 * And present to not present goes:
302 * ptep->pte_high = 0;
304 * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'.
305 * We load pte_high *after* loading pte_low, which ensures we don't see an older
306 * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't
307 * picked up a changed pte high. We might have gotten rubbish values from
308 * pte_low and pte_high, but we are guaranteed that pte_low will not have the
309 * present bit set *unless* it is 'l'. Because get_user_pages_fast() only
310 * operates on present ptes we're safe.
312 static inline pte_t ptep_get_lockless(pte_t *ptep)
317 pte.pte_low = ptep->pte_low;
319 pte.pte_high = ptep->pte_high;
321 } while (unlikely(pte.pte_low != ptep->pte_low));
325 #else /* CONFIG_GUP_GET_PTE_LOW_HIGH */
327 * We require that the PTE can be read atomically.
329 static inline pte_t ptep_get_lockless(pte_t *ptep)
331 return ptep_get(ptep);
333 #endif /* CONFIG_GUP_GET_PTE_LOW_HIGH */
335 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
336 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
337 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
338 unsigned long address,
345 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
346 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
347 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
348 unsigned long address,
356 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
357 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
359 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
360 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
361 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,
362 unsigned long address, pmd_t *pmdp,
365 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
369 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
370 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
371 unsigned long address, pud_t *pudp,
374 return pudp_huge_get_and_clear(mm, address, pudp);
377 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
379 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
380 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
381 unsigned long address, pte_t *ptep,
385 pte = ptep_get_and_clear(mm, address, ptep);
392 * If two threads concurrently fault at the same page, the thread that
393 * won the race updates the PTE and its local TLB/Cache. The other thread
394 * gives up, simply does nothing, and continues; on architectures where
395 * software can update TLB, local TLB can be updated here to avoid next page
396 * fault. This function updates TLB only, do nothing with cache or others.
397 * It is the difference with function update_mmu_cache.
399 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB
400 static inline void update_mmu_tlb(struct vm_area_struct *vma,
401 unsigned long address, pte_t *ptep)
404 #define __HAVE_ARCH_UPDATE_MMU_TLB
408 * Some architectures may be able to avoid expensive synchronization
409 * primitives when modifications are made to PTE's which are already
410 * not present, or in the process of an address space destruction.
412 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
413 static inline void pte_clear_not_present_full(struct mm_struct *mm,
414 unsigned long address,
418 pte_clear(mm, address, ptep);
422 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
423 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
424 unsigned long address,
428 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
429 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
430 unsigned long address,
432 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
433 unsigned long address,
437 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
439 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
441 pte_t old_pte = *ptep;
442 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
447 * On some architectures hardware does not set page access bit when accessing
448 * memory page, it is responsibility of software setting this bit. It brings
449 * out extra page fault penalty to track page access bit. For optimization page
450 * access bit can be set during all page fault flow on these arches.
451 * To be differentiate with macro pte_mkyoung, this macro is used on platforms
452 * where software maintains page access bit.
454 #ifndef pte_sw_mkyoung
455 static inline pte_t pte_sw_mkyoung(pte_t pte)
459 #define pte_sw_mkyoung pte_sw_mkyoung
462 #ifndef pte_savedwrite
463 #define pte_savedwrite pte_write
466 #ifndef pte_mk_savedwrite
467 #define pte_mk_savedwrite pte_mkwrite
470 #ifndef pte_clear_savedwrite
471 #define pte_clear_savedwrite pte_wrprotect
474 #ifndef pmd_savedwrite
475 #define pmd_savedwrite pmd_write
478 #ifndef pmd_mk_savedwrite
479 #define pmd_mk_savedwrite pmd_mkwrite
482 #ifndef pmd_clear_savedwrite
483 #define pmd_clear_savedwrite pmd_wrprotect
486 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
487 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
488 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
489 unsigned long address, pmd_t *pmdp)
491 pmd_t old_pmd = *pmdp;
492 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
495 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
496 unsigned long address, pmd_t *pmdp)
500 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
502 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
503 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
504 static inline void pudp_set_wrprotect(struct mm_struct *mm,
505 unsigned long address, pud_t *pudp)
507 pud_t old_pud = *pudp;
509 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
512 static inline void pudp_set_wrprotect(struct mm_struct *mm,
513 unsigned long address, pud_t *pudp)
517 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
520 #ifndef pmdp_collapse_flush
521 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
522 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
523 unsigned long address, pmd_t *pmdp);
525 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
526 unsigned long address,
532 #define pmdp_collapse_flush pmdp_collapse_flush
533 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
536 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
537 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
541 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
542 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
545 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
547 * This is an implementation of pmdp_establish() that is only suitable for an
548 * architecture that doesn't have hardware dirty/accessed bits. In this case we
549 * can't race with CPU which sets these bits and non-atomic approach is fine.
551 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma,
552 unsigned long address, pmd_t *pmdp, pmd_t pmd)
554 pmd_t old_pmd = *pmdp;
555 set_pmd_at(vma->vm_mm, address, pmdp, pmd);
560 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
561 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
565 #ifndef __HAVE_ARCH_PTE_SAME
566 static inline int pte_same(pte_t pte_a, pte_t pte_b)
568 return pte_val(pte_a) == pte_val(pte_b);
572 #ifndef __HAVE_ARCH_PTE_UNUSED
574 * Some architectures provide facilities to virtualization guests
575 * so that they can flag allocated pages as unused. This allows the
576 * host to transparently reclaim unused pages. This function returns
577 * whether the pte's page is unused.
579 static inline int pte_unused(pte_t pte)
585 #ifndef pte_access_permitted
586 #define pte_access_permitted(pte, write) \
587 (pte_present(pte) && (!(write) || pte_write(pte)))
590 #ifndef pmd_access_permitted
591 #define pmd_access_permitted(pmd, write) \
592 (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
595 #ifndef pud_access_permitted
596 #define pud_access_permitted(pud, write) \
597 (pud_present(pud) && (!(write) || pud_write(pud)))
600 #ifndef p4d_access_permitted
601 #define p4d_access_permitted(p4d, write) \
602 (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
605 #ifndef pgd_access_permitted
606 #define pgd_access_permitted(pgd, write) \
607 (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
610 #ifndef __HAVE_ARCH_PMD_SAME
611 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
613 return pmd_val(pmd_a) == pmd_val(pmd_b);
616 static inline int pud_same(pud_t pud_a, pud_t pud_b)
618 return pud_val(pud_a) == pud_val(pud_b);
622 #ifndef __HAVE_ARCH_P4D_SAME
623 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b)
625 return p4d_val(p4d_a) == p4d_val(p4d_b);
629 #ifndef __HAVE_ARCH_PGD_SAME
630 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b)
632 return pgd_val(pgd_a) == pgd_val(pgd_b);
637 * Use set_p*_safe(), and elide TLB flushing, when confident that *no*
638 * TLB flush will be required as a result of the "set". For example, use
639 * in scenarios where it is known ahead of time that the routine is
640 * setting non-present entries, or re-setting an existing entry to the
641 * same value. Otherwise, use the typical "set" helpers and flush the
644 #define set_pte_safe(ptep, pte) \
646 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \
647 set_pte(ptep, pte); \
650 #define set_pmd_safe(pmdp, pmd) \
652 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \
653 set_pmd(pmdp, pmd); \
656 #define set_pud_safe(pudp, pud) \
658 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \
659 set_pud(pudp, pud); \
662 #define set_p4d_safe(p4dp, p4d) \
664 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \
665 set_p4d(p4dp, p4d); \
668 #define set_pgd_safe(pgdp, pgd) \
670 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \
671 set_pgd(pgdp, pgd); \
674 #ifndef __HAVE_ARCH_DO_SWAP_PAGE
676 * Some architectures support metadata associated with a page. When a
677 * page is being swapped out, this metadata must be saved so it can be
678 * restored when the page is swapped back in. SPARC M7 and newer
679 * processors support an ADI (Application Data Integrity) tag for the
680 * page as metadata for the page. arch_do_swap_page() can restore this
681 * metadata when a page is swapped back in.
683 static inline void arch_do_swap_page(struct mm_struct *mm,
684 struct vm_area_struct *vma,
686 pte_t pte, pte_t oldpte)
692 #ifndef __HAVE_ARCH_UNMAP_ONE
694 * Some architectures support metadata associated with a page. When a
695 * page is being swapped out, this metadata must be saved so it can be
696 * restored when the page is swapped back in. SPARC M7 and newer
697 * processors support an ADI (Application Data Integrity) tag for the
698 * page as metadata for the page. arch_unmap_one() can save this
699 * metadata on a swap-out of a page.
701 static inline int arch_unmap_one(struct mm_struct *mm,
702 struct vm_area_struct *vma,
711 * Allow architectures to preserve additional metadata associated with
712 * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function
713 * prototypes must be defined in the arch-specific asm/pgtable.h file.
715 #ifndef __HAVE_ARCH_PREPARE_TO_SWAP
716 static inline int arch_prepare_to_swap(struct page *page)
722 #ifndef __HAVE_ARCH_SWAP_INVALIDATE
723 static inline void arch_swap_invalidate_page(int type, pgoff_t offset)
727 static inline void arch_swap_invalidate_area(int type)
732 #ifndef __HAVE_ARCH_SWAP_RESTORE
733 static inline void arch_swap_restore(swp_entry_t entry, struct page *page)
738 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
739 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
742 #ifndef __HAVE_ARCH_MOVE_PTE
743 #define move_pte(pte, prot, old_addr, new_addr) (pte)
746 #ifndef pte_accessible
747 # define pte_accessible(mm, pte) ((void)(pte), 1)
750 #ifndef flush_tlb_fix_spurious_fault
751 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
755 * When walking page tables, get the address of the next boundary,
756 * or the end address of the range if that comes earlier. Although no
757 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
760 #define pgd_addr_end(addr, end) \
761 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
762 (__boundary - 1 < (end) - 1)? __boundary: (end); \
766 #define p4d_addr_end(addr, end) \
767 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
768 (__boundary - 1 < (end) - 1)? __boundary: (end); \
773 #define pud_addr_end(addr, end) \
774 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
775 (__boundary - 1 < (end) - 1)? __boundary: (end); \
780 #define pmd_addr_end(addr, end) \
781 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
782 (__boundary - 1 < (end) - 1)? __boundary: (end); \
787 * When walking page tables, we usually want to skip any p?d_none entries;
788 * and any p?d_bad entries - reporting the error before resetting to none.
789 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
791 void pgd_clear_bad(pgd_t *);
793 #ifndef __PAGETABLE_P4D_FOLDED
794 void p4d_clear_bad(p4d_t *);
796 #define p4d_clear_bad(p4d) do { } while (0)
799 #ifndef __PAGETABLE_PUD_FOLDED
800 void pud_clear_bad(pud_t *);
802 #define pud_clear_bad(p4d) do { } while (0)
805 void pmd_clear_bad(pmd_t *);
807 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
811 if (unlikely(pgd_bad(*pgd))) {
818 static inline int p4d_none_or_clear_bad(p4d_t *p4d)
822 if (unlikely(p4d_bad(*p4d))) {
829 static inline int pud_none_or_clear_bad(pud_t *pud)
833 if (unlikely(pud_bad(*pud))) {
840 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
844 if (unlikely(pmd_bad(*pmd))) {
851 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma,
856 * Get the current pte state, but zero it out to make it
857 * non-present, preventing the hardware from asynchronously
860 return ptep_get_and_clear(vma->vm_mm, addr, ptep);
863 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma,
865 pte_t *ptep, pte_t pte)
868 * The pte is non-present, so there's no hardware state to
871 set_pte_at(vma->vm_mm, addr, ptep, pte);
874 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
876 * Start a pte protection read-modify-write transaction, which
877 * protects against asynchronous hardware modifications to the pte.
878 * The intention is not to prevent the hardware from making pte
879 * updates, but to prevent any updates it may make from being lost.
881 * This does not protect against other software modifications of the
882 * pte; the appropriate pte lock must be held over the transaction.
884 * Note that this interface is intended to be batchable, meaning that
885 * ptep_modify_prot_commit may not actually update the pte, but merely
886 * queue the update to be done at some later time. The update must be
887 * actually committed before the pte lock is released, however.
889 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma,
893 return __ptep_modify_prot_start(vma, addr, ptep);
897 * Commit an update to a pte, leaving any hardware-controlled bits in
898 * the PTE unmodified.
900 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma,
902 pte_t *ptep, pte_t old_pte, pte_t pte)
904 __ptep_modify_prot_commit(vma, addr, ptep, pte);
906 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
907 #endif /* CONFIG_MMU */
910 * No-op macros that just return the current protection value. Defined here
911 * because these macros can be used even if CONFIG_MMU is not defined.
915 #define pgprot_nx(prot) (prot)
918 #ifndef pgprot_noncached
919 #define pgprot_noncached(prot) (prot)
922 #ifndef pgprot_writecombine
923 #define pgprot_writecombine pgprot_noncached
926 #ifndef pgprot_writethrough
927 #define pgprot_writethrough pgprot_noncached
930 #ifndef pgprot_device
931 #define pgprot_device pgprot_noncached
935 #define pgprot_mhp(prot) (prot)
939 #ifndef pgprot_modify
940 #define pgprot_modify pgprot_modify
941 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
943 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
944 newprot = pgprot_noncached(newprot);
945 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
946 newprot = pgprot_writecombine(newprot);
947 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
948 newprot = pgprot_device(newprot);
952 #endif /* CONFIG_MMU */
954 #ifndef pgprot_encrypted
955 #define pgprot_encrypted(prot) (prot)
958 #ifndef pgprot_decrypted
959 #define pgprot_decrypted(prot) (prot)
963 * A facility to provide lazy MMU batching. This allows PTE updates and
964 * page invalidations to be delayed until a call to leave lazy MMU mode
965 * is issued. Some architectures may benefit from doing this, and it is
966 * beneficial for both shadow and direct mode hypervisors, which may batch
967 * the PTE updates which happen during this window. Note that using this
968 * interface requires that read hazards be removed from the code. A read
969 * hazard could result in the direct mode hypervisor case, since the actual
970 * write to the page tables may not yet have taken place, so reads though
971 * a raw PTE pointer after it has been modified are not guaranteed to be
972 * up to date. This mode can only be entered and left under the protection of
973 * the page table locks for all page tables which may be modified. In the UP
974 * case, this is required so that preemption is disabled, and in the SMP case,
975 * it must synchronize the delayed page table writes properly on other CPUs.
977 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
978 #define arch_enter_lazy_mmu_mode() do {} while (0)
979 #define arch_leave_lazy_mmu_mode() do {} while (0)
980 #define arch_flush_lazy_mmu_mode() do {} while (0)
984 * A facility to provide batching of the reload of page tables and
985 * other process state with the actual context switch code for
986 * paravirtualized guests. By convention, only one of the batched
987 * update (lazy) modes (CPU, MMU) should be active at any given time,
988 * entry should never be nested, and entry and exits should always be
989 * paired. This is for sanity of maintaining and reasoning about the
990 * kernel code. In this case, the exit (end of the context switch) is
991 * in architecture-specific code, and so doesn't need a generic
994 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
995 #define arch_start_context_switch(prev) do {} while (0)
998 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
999 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION
1000 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1005 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1010 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1015 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */
1016 static inline int pte_soft_dirty(pte_t pte)
1021 static inline int pmd_soft_dirty(pmd_t pmd)
1026 static inline pte_t pte_mksoft_dirty(pte_t pte)
1031 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
1036 static inline pte_t pte_clear_soft_dirty(pte_t pte)
1041 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
1046 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1051 static inline int pte_swp_soft_dirty(pte_t pte)
1056 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1061 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1066 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1071 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1077 #ifndef __HAVE_PFNMAP_TRACKING
1079 * Interfaces that can be used by architecture code to keep track of
1080 * memory type of pfn mappings specified by the remap_pfn_range,
1085 * track_pfn_remap is called when a _new_ pfn mapping is being established
1086 * by remap_pfn_range() for physical range indicated by pfn and size.
1088 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1089 unsigned long pfn, unsigned long addr,
1096 * track_pfn_insert is called when a _new_ single pfn is established
1097 * by vmf_insert_pfn().
1099 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1105 * track_pfn_copy is called when vma that is covering the pfnmap gets
1106 * copied through copy_page_range().
1108 static inline int track_pfn_copy(struct vm_area_struct *vma)
1114 * untrack_pfn is called while unmapping a pfnmap for a region.
1115 * untrack can be called for a specific region indicated by pfn and size or
1116 * can be for the entire vma (in which case pfn, size are zero).
1118 static inline void untrack_pfn(struct vm_area_struct *vma,
1119 unsigned long pfn, unsigned long size)
1124 * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
1126 static inline void untrack_pfn_moved(struct vm_area_struct *vma)
1130 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1131 unsigned long pfn, unsigned long addr,
1132 unsigned long size);
1133 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1135 extern int track_pfn_copy(struct vm_area_struct *vma);
1136 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
1137 unsigned long size);
1138 extern void untrack_pfn_moved(struct vm_area_struct *vma);
1142 #ifdef __HAVE_COLOR_ZERO_PAGE
1143 static inline int is_zero_pfn(unsigned long pfn)
1145 extern unsigned long zero_pfn;
1146 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
1147 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
1150 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
1153 static inline int is_zero_pfn(unsigned long pfn)
1155 extern unsigned long zero_pfn;
1156 return pfn == zero_pfn;
1159 static inline unsigned long my_zero_pfn(unsigned long addr)
1161 extern unsigned long zero_pfn;
1166 static inline int is_zero_pfn(unsigned long pfn)
1171 static inline unsigned long my_zero_pfn(unsigned long addr)
1175 #endif /* CONFIG_MMU */
1179 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
1180 static inline int pmd_trans_huge(pmd_t pmd)
1185 static inline int pmd_write(pmd_t pmd)
1190 #endif /* pmd_write */
1191 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1194 static inline int pud_write(pud_t pud)
1199 #endif /* pud_write */
1201 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE)
1202 static inline int pmd_devmap(pmd_t pmd)
1206 static inline int pud_devmap(pud_t pud)
1210 static inline int pgd_devmap(pgd_t pgd)
1216 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
1217 (defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1218 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD))
1219 static inline int pud_trans_huge(pud_t pud)
1225 /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */
1226 static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud)
1228 pud_t pudval = READ_ONCE(*pud);
1230 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval))
1232 if (unlikely(pud_bad(pudval))) {
1239 /* See pmd_trans_unstable for discussion. */
1240 static inline int pud_trans_unstable(pud_t *pud)
1242 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1243 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
1244 return pud_none_or_trans_huge_or_dev_or_clear_bad(pud);
1250 #ifndef pmd_read_atomic
1251 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
1254 * Depend on compiler for an atomic pmd read. NOTE: this is
1255 * only going to work, if the pmdval_t isn't larger than
1262 #ifndef arch_needs_pgtable_deposit
1263 #define arch_needs_pgtable_deposit() (false)
1266 * This function is meant to be used by sites walking pagetables with
1267 * the mmap_lock held in read mode to protect against MADV_DONTNEED and
1268 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
1269 * into a null pmd and the transhuge page fault can convert a null pmd
1270 * into an hugepmd or into a regular pmd (if the hugepage allocation
1271 * fails). While holding the mmap_lock in read mode the pmd becomes
1272 * stable and stops changing under us only if it's not null and not a
1273 * transhuge pmd. When those races occurs and this function makes a
1274 * difference vs the standard pmd_none_or_clear_bad, the result is
1275 * undefined so behaving like if the pmd was none is safe (because it
1276 * can return none anyway). The compiler level barrier() is critically
1277 * important to compute the two checks atomically on the same pmdval.
1279 * For 32bit kernels with a 64bit large pmd_t this automatically takes
1280 * care of reading the pmd atomically to avoid SMP race conditions
1281 * against pmd_populate() when the mmap_lock is hold for reading by the
1282 * caller (a special atomic read not done by "gcc" as in the generic
1283 * version above, is also needed when THP is disabled because the page
1284 * fault can populate the pmd from under us).
1286 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
1288 pmd_t pmdval = pmd_read_atomic(pmd);
1290 * The barrier will stabilize the pmdval in a register or on
1291 * the stack so that it will stop changing under the code.
1293 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
1294 * pmd_read_atomic is allowed to return a not atomic pmdval
1295 * (for example pointing to an hugepage that has never been
1296 * mapped in the pmd). The below checks will only care about
1297 * the low part of the pmd with 32bit PAE x86 anyway, with the
1298 * exception of pmd_none(). So the important thing is that if
1299 * the low part of the pmd is found null, the high part will
1300 * be also null or the pmd_none() check below would be
1303 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1307 * !pmd_present() checks for pmd migration entries
1309 * The complete check uses is_pmd_migration_entry() in linux/swapops.h
1310 * But using that requires moving current function and pmd_trans_unstable()
1311 * to linux/swapops.h to resolve dependency, which is too much code move.
1313 * !pmd_present() is equivalent to is_pmd_migration_entry() currently,
1314 * because !pmd_present() pages can only be under migration not swapped
1317 * pmd_none() is preserved for future condition checks on pmd migration
1318 * entries and not confusing with this function name, although it is
1319 * redundant with !pmd_present().
1321 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) ||
1322 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval)))
1324 if (unlikely(pmd_bad(pmdval))) {
1332 * This is a noop if Transparent Hugepage Support is not built into
1333 * the kernel. Otherwise it is equivalent to
1334 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
1335 * places that already verified the pmd is not none and they want to
1336 * walk ptes while holding the mmap sem in read mode (write mode don't
1337 * need this). If THP is not enabled, the pmd can't go away under the
1338 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
1339 * run a pmd_trans_unstable before walking the ptes after
1340 * split_huge_pmd returns (because it may have run when the pmd become
1341 * null, but then a page fault can map in a THP and not a regular page).
1343 static inline int pmd_trans_unstable(pmd_t *pmd)
1345 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1346 return pmd_none_or_trans_huge_or_clear_bad(pmd);
1353 * the ordering of these checks is important for pmds with _page_devmap set.
1354 * if we check pmd_trans_unstable() first we will trip the bad_pmd() check
1355 * inside of pmd_none_or_trans_huge_or_clear_bad(). this will end up correctly
1356 * returning 1 but not before it spams dmesg with the pmd_clear_bad() output.
1358 static inline int pmd_devmap_trans_unstable(pmd_t *pmd)
1360 return pmd_devmap(*pmd) || pmd_trans_unstable(pmd);
1363 #ifndef CONFIG_NUMA_BALANCING
1365 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
1366 * the only case the kernel cares is for NUMA balancing and is only ever set
1367 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
1368 * _PAGE_PROTNONE so by default, implement the helper as "always no". It
1369 * is the responsibility of the caller to distinguish between PROT_NONE
1370 * protections and NUMA hinting fault protections.
1372 static inline int pte_protnone(pte_t pte)
1377 static inline int pmd_protnone(pmd_t pmd)
1381 #endif /* CONFIG_NUMA_BALANCING */
1383 #endif /* CONFIG_MMU */
1385 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
1387 #ifndef __PAGETABLE_P4D_FOLDED
1388 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
1389 int p4d_clear_huge(p4d_t *p4d);
1391 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1395 static inline int p4d_clear_huge(p4d_t *p4d)
1399 #endif /* !__PAGETABLE_P4D_FOLDED */
1401 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
1402 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
1403 int pud_clear_huge(pud_t *pud);
1404 int pmd_clear_huge(pmd_t *pmd);
1405 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr);
1406 int pud_free_pmd_page(pud_t *pud, unsigned long addr);
1407 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);
1408 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
1409 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1413 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
1417 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
1421 static inline int p4d_clear_huge(p4d_t *p4d)
1425 static inline int pud_clear_huge(pud_t *pud)
1429 static inline int pmd_clear_huge(pmd_t *pmd)
1433 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr)
1437 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr)
1441 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
1445 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
1447 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
1448 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1450 * ARCHes with special requirements for evicting THP backing TLB entries can
1451 * implement this. Otherwise also, it can help optimize normal TLB flush in
1452 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the
1453 * entire TLB if flush span is greater than a threshold, which will
1454 * likely be true for a single huge page. Thus a single THP flush will
1455 * invalidate the entire TLB which is not desirable.
1456 * e.g. see arch/arc: flush_pmd_tlb_range
1458 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1459 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1461 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
1462 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
1467 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
1468 unsigned long size, pgprot_t *vma_prot);
1470 #ifndef CONFIG_X86_ESPFIX64
1471 static inline void init_espfix_bsp(void) { }
1474 extern void __init pgtable_cache_init(void);
1476 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED
1477 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
1482 static inline bool arch_has_pfn_modify_check(void)
1486 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */
1489 * Architecture PAGE_KERNEL_* fallbacks
1491 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either
1492 * because they really don't support them, or the port needs to be updated to
1493 * reflect the required functionality. Below are a set of relatively safe
1494 * fallbacks, as best effort, which we can count on in lieu of the architectures
1495 * not defining them on their own yet.
1498 #ifndef PAGE_KERNEL_RO
1499 # define PAGE_KERNEL_RO PAGE_KERNEL
1502 #ifndef PAGE_KERNEL_EXEC
1503 # define PAGE_KERNEL_EXEC PAGE_KERNEL
1507 * Page Table Modification bits for pgtbl_mod_mask.
1509 * These are used by the p?d_alloc_track*() set of functions an in the generic
1510 * vmalloc/ioremap code to track at which page-table levels entries have been
1511 * modified. Based on that the code can better decide when vmalloc and ioremap
1512 * mapping changes need to be synchronized to other page-tables in the system.
1514 #define __PGTBL_PGD_MODIFIED 0
1515 #define __PGTBL_P4D_MODIFIED 1
1516 #define __PGTBL_PUD_MODIFIED 2
1517 #define __PGTBL_PMD_MODIFIED 3
1518 #define __PGTBL_PTE_MODIFIED 4
1520 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED)
1521 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED)
1522 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED)
1523 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED)
1524 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED)
1526 /* Page-Table Modification Mask */
1527 typedef unsigned int pgtbl_mod_mask;
1529 #endif /* !__ASSEMBLY__ */
1531 #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT)
1532 #ifdef CONFIG_PHYS_ADDR_T_64BIT
1534 * ZSMALLOC needs to know the highest PFN on 32-bit architectures
1535 * with physical address space extension, but falls back to
1536 * BITS_PER_LONG otherwise.
1538 #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition
1540 #define MAX_POSSIBLE_PHYSMEM_BITS 32
1544 #ifndef has_transparent_hugepage
1545 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1546 #define has_transparent_hugepage() 1
1548 #define has_transparent_hugepage() 0
1553 * On some architectures it depends on the mm if the p4d/pud or pmd
1554 * layer of the page table hierarchy is folded or not.
1556 #ifndef mm_p4d_folded
1557 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED)
1560 #ifndef mm_pud_folded
1561 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED)
1564 #ifndef mm_pmd_folded
1565 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED)
1568 #ifndef p4d_offset_lockless
1569 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address)
1571 #ifndef pud_offset_lockless
1572 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address)
1574 #ifndef pmd_offset_lockless
1575 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address)
1579 * p?d_leaf() - true if this entry is a final mapping to a physical address.
1580 * This differs from p?d_huge() by the fact that they are always available (if
1581 * the architecture supports large pages at the appropriate level) even
1582 * if CONFIG_HUGETLB_PAGE is not defined.
1583 * Only meaningful when called on a valid entry.
1586 #define pgd_leaf(x) 0
1589 #define p4d_leaf(x) 0
1592 #define pud_leaf(x) 0
1595 #define pmd_leaf(x) 0
1598 #ifndef pgd_leaf_size
1599 #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT)
1601 #ifndef p4d_leaf_size
1602 #define p4d_leaf_size(x) P4D_SIZE
1604 #ifndef pud_leaf_size
1605 #define pud_leaf_size(x) PUD_SIZE
1607 #ifndef pmd_leaf_size
1608 #define pmd_leaf_size(x) PMD_SIZE
1610 #ifndef pte_leaf_size
1611 #define pte_leaf_size(x) PAGE_SIZE
1615 * Some architectures have MMUs that are configurable or selectable at boot
1616 * time. These lead to variable PTRS_PER_x. For statically allocated arrays it
1617 * helps to have a static maximum value.
1620 #ifndef MAX_PTRS_PER_PTE
1621 #define MAX_PTRS_PER_PTE PTRS_PER_PTE
1624 #ifndef MAX_PTRS_PER_PMD
1625 #define MAX_PTRS_PER_PMD PTRS_PER_PMD
1628 #ifndef MAX_PTRS_PER_PUD
1629 #define MAX_PTRS_PER_PUD PTRS_PER_PUD
1632 #ifndef MAX_PTRS_PER_P4D
1633 #define MAX_PTRS_PER_P4D PTRS_PER_P4D
1636 #endif /* _LINUX_PGTABLE_H */