4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 #include <linux/mod_devicetable.h>
22 #include <linux/types.h>
23 #include <linux/init.h>
24 #include <linux/ioport.h>
25 #include <linux/list.h>
26 #include <linux/compiler.h>
27 #include <linux/errno.h>
28 #include <linux/kobject.h>
29 #include <linux/atomic.h>
30 #include <linux/device.h>
32 #include <linux/irqreturn.h>
33 #include <uapi/linux/pci.h>
35 /* Include the ID list */
36 #include <linux/pci_ids.h>
39 * The PCI interface treats multi-function devices as independent
40 * devices. The slot/function address of each device is encoded
41 * in a single byte as follows:
45 * PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() are defined uapi/linux/pci.h
46 * In the interest of not exposing interfaces to user-space unnecessarily,
47 * the following kernel only defines are being added here.
49 #define PCI_DEVID(bus, devfn) ((((u16)bus) << 8) | devfn)
50 /* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */
51 #define PCI_BUS_NUM(x) (((x) >> 8) & 0xff)
53 /* pci_slot represents a physical slot */
55 struct pci_bus *bus; /* The bus this slot is on */
56 struct list_head list; /* node in list of slots on this bus */
57 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
58 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
62 static inline const char *pci_slot_name(const struct pci_slot *slot)
64 return kobject_name(&slot->kobj);
67 /* File state for mmap()s on /proc/bus/pci/X/Y */
73 /* This defines the direction arg to the DMA mapping routines. */
74 #define PCI_DMA_BIDIRECTIONAL 0
75 #define PCI_DMA_TODEVICE 1
76 #define PCI_DMA_FROMDEVICE 2
77 #define PCI_DMA_NONE 3
80 * For PCI devices, the region numbers are assigned this way:
83 /* #0-5: standard PCI resources */
85 PCI_STD_RESOURCE_END = 5,
87 /* #6: expansion ROM resource */
90 /* device specific resources */
93 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
96 /* resources assigned to buses behind the bridge */
97 #define PCI_BRIDGE_RESOURCE_NUM 4
100 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
101 PCI_BRIDGE_RESOURCE_NUM - 1,
103 /* total resources associated with a PCI device */
106 /* preserve this for compatibility */
107 DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
110 typedef int __bitwise pci_power_t;
112 #define PCI_D0 ((pci_power_t __force) 0)
113 #define PCI_D1 ((pci_power_t __force) 1)
114 #define PCI_D2 ((pci_power_t __force) 2)
115 #define PCI_D3hot ((pci_power_t __force) 3)
116 #define PCI_D3cold ((pci_power_t __force) 4)
117 #define PCI_UNKNOWN ((pci_power_t __force) 5)
118 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
120 /* Remember to update this when the list above changes! */
121 extern const char *pci_power_names[];
123 static inline const char *pci_power_name(pci_power_t state)
125 return pci_power_names[1 + (int) state];
128 #define PCI_PM_D2_DELAY 200
129 #define PCI_PM_D3_WAIT 10
130 #define PCI_PM_D3COLD_WAIT 100
131 #define PCI_PM_BUS_WAIT 50
133 /** The pci_channel state describes connectivity between the CPU and
134 * the pci device. If some PCI bus between here and the pci device
135 * has crashed or locked up, this info is reflected here.
137 typedef unsigned int __bitwise pci_channel_state_t;
139 enum pci_channel_state {
140 /* I/O channel is in normal state */
141 pci_channel_io_normal = (__force pci_channel_state_t) 1,
143 /* I/O to channel is blocked */
144 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
146 /* PCI card is dead */
147 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
150 typedef unsigned int __bitwise pcie_reset_state_t;
152 enum pcie_reset_state {
153 /* Reset is NOT asserted (Use to deassert reset) */
154 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
156 /* Use #PERST to reset PCI-E device */
157 pcie_warm_reset = (__force pcie_reset_state_t) 2,
159 /* Use PCI-E Hot Reset to reset device */
160 pcie_hot_reset = (__force pcie_reset_state_t) 3
163 typedef unsigned short __bitwise pci_dev_flags_t;
165 /* INTX_DISABLE in PCI_COMMAND register disables MSI
168 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
169 /* Device configuration is irrevocably lost if disabled into D3 */
170 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
171 /* Provide indication device is assigned by a Virtual Machine Manager */
172 PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) 4,
175 enum pci_irq_reroute_variant {
176 INTEL_IRQ_REROUTE_VARIANT = 1,
177 MAX_IRQ_REROUTE_VARIANTS = 3
180 typedef unsigned short __bitwise pci_bus_flags_t;
182 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
183 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
186 /* These values come from the PCI Express Spec */
187 enum pcie_link_width {
188 PCIE_LNK_WIDTH_RESRV = 0x00,
196 PCIE_LNK_WIDTH_UNKNOWN = 0xFF,
199 /* Based on the PCI Hotplug Spec, but some values are made up by us */
201 PCI_SPEED_33MHz = 0x00,
202 PCI_SPEED_66MHz = 0x01,
203 PCI_SPEED_66MHz_PCIX = 0x02,
204 PCI_SPEED_100MHz_PCIX = 0x03,
205 PCI_SPEED_133MHz_PCIX = 0x04,
206 PCI_SPEED_66MHz_PCIX_ECC = 0x05,
207 PCI_SPEED_100MHz_PCIX_ECC = 0x06,
208 PCI_SPEED_133MHz_PCIX_ECC = 0x07,
209 PCI_SPEED_66MHz_PCIX_266 = 0x09,
210 PCI_SPEED_100MHz_PCIX_266 = 0x0a,
211 PCI_SPEED_133MHz_PCIX_266 = 0x0b,
217 PCI_SPEED_66MHz_PCIX_533 = 0x11,
218 PCI_SPEED_100MHz_PCIX_533 = 0x12,
219 PCI_SPEED_133MHz_PCIX_533 = 0x13,
220 PCIE_SPEED_2_5GT = 0x14,
221 PCIE_SPEED_5_0GT = 0x15,
222 PCIE_SPEED_8_0GT = 0x16,
223 PCI_SPEED_UNKNOWN = 0xff,
226 struct pci_cap_saved_data {
232 struct pci_cap_saved_state {
233 struct hlist_node next;
234 struct pci_cap_saved_data cap;
237 struct pcie_link_state;
243 * The pci_dev structure is used to describe PCI devices.
246 struct list_head bus_list; /* node in per-bus list */
247 struct pci_bus *bus; /* bus this device is on */
248 struct pci_bus *subordinate; /* bus this device bridges to */
250 void *sysdata; /* hook for sys-specific extension */
251 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
252 struct pci_slot *slot; /* Physical slot this device is in */
254 unsigned int devfn; /* encoded device & function index */
255 unsigned short vendor;
256 unsigned short device;
257 unsigned short subsystem_vendor;
258 unsigned short subsystem_device;
259 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
260 u8 revision; /* PCI revision, low byte of class word */
261 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
262 u8 pcie_cap; /* PCI-E capability offset */
263 u8 msi_cap; /* MSI capability offset */
264 u8 msix_cap; /* MSI-X capability offset */
265 u8 pcie_mpss:3; /* PCI-E Max Payload Size Supported */
266 u8 rom_base_reg; /* which config register controls the ROM */
267 u8 pin; /* which interrupt pin this device uses */
268 u16 pcie_flags_reg; /* cached PCI-E Capabilities Register */
270 struct pci_driver *driver; /* which driver has allocated this device */
271 u64 dma_mask; /* Mask of the bits of bus address this
272 device implements. Normally this is
273 0xffffffff. You only need to change
274 this if your device has broken DMA
275 or supports 64-bit transfers. */
277 struct device_dma_parameters dma_parms;
279 pci_power_t current_state; /* Current operating state. In ACPI-speak,
280 this is D0-D3, D0 being fully functional,
282 u8 pm_cap; /* PM capability offset */
283 unsigned int pme_support:5; /* Bitmask of states from which PME#
285 unsigned int pme_interrupt:1;
286 unsigned int pme_poll:1; /* Poll device's PME status bit */
287 unsigned int d1_support:1; /* Low power state D1 is supported */
288 unsigned int d2_support:1; /* Low power state D2 is supported */
289 unsigned int no_d1d2:1; /* D1 and D2 are forbidden */
290 unsigned int no_d3cold:1; /* D3cold is forbidden */
291 unsigned int d3cold_allowed:1; /* D3cold is allowed by user */
292 unsigned int mmio_always_on:1; /* disallow turning off io/mem
293 decoding during bar sizing */
294 unsigned int wakeup_prepared:1;
295 unsigned int runtime_d3cold:1; /* whether go through runtime
296 D3cold, not set for devices
297 powered on/off by the
298 corresponding bridge */
299 unsigned int d3_delay; /* D3->D0 transition time in ms */
300 unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */
302 #ifdef CONFIG_PCIEASPM
303 struct pcie_link_state *link_state; /* ASPM link state. */
306 pci_channel_state_t error_state; /* current connectivity state */
307 struct device dev; /* Generic device interface */
309 int cfg_size; /* Size of configuration space */
312 * Instead of touching interrupt line and base address registers
313 * directly, use the values stored here. They might be different!
316 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
318 bool match_driver; /* Skip attaching driver */
319 /* These fields are used by common fixups */
320 unsigned int transparent:1; /* Transparent PCI bridge */
321 unsigned int multifunction:1;/* Part of multi-function device */
322 /* keep track of device state */
323 unsigned int is_added:1;
324 unsigned int is_busmaster:1; /* device is busmaster */
325 unsigned int no_msi:1; /* device may not use msi */
326 unsigned int block_cfg_access:1; /* config space access is blocked */
327 unsigned int broken_parity_status:1; /* Device generates false positive parity */
328 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
329 unsigned int msi_enabled:1;
330 unsigned int msix_enabled:1;
331 unsigned int ari_enabled:1; /* ARI forwarding */
332 unsigned int is_managed:1;
333 unsigned int is_pcie:1; /* Obsolete. Will be removed.
334 Use pci_is_pcie() instead */
335 unsigned int needs_freset:1; /* Dev requires fundamental reset */
336 unsigned int state_saved:1;
337 unsigned int is_physfn:1;
338 unsigned int is_virtfn:1;
339 unsigned int reset_fn:1;
340 unsigned int is_hotplug_bridge:1;
341 unsigned int __aer_firmware_first_valid:1;
342 unsigned int __aer_firmware_first:1;
343 unsigned int broken_intx_masking:1;
344 unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */
345 pci_dev_flags_t dev_flags;
346 atomic_t enable_cnt; /* pci_enable_device has been called */
348 u32 saved_config_space[16]; /* config space saved at suspend time */
349 struct hlist_head saved_cap_space;
350 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
351 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
352 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
353 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
354 #ifdef CONFIG_PCI_MSI
355 struct list_head msi_list;
356 struct kset *msi_kset;
359 #ifdef CONFIG_PCI_ATS
361 struct pci_sriov *sriov; /* SR-IOV capability related */
362 struct pci_dev *physfn; /* the PF this VF is associated with */
364 struct pci_ats *ats; /* Address Translation Service */
366 phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */
367 size_t romlen; /* Length of ROM if it's not from the BAR */
370 static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
372 #ifdef CONFIG_PCI_IOV
380 struct pci_dev *pci_alloc_dev(struct pci_bus *bus);
381 struct pci_dev * __deprecated alloc_pci_dev(void);
383 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
384 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
386 static inline int pci_channel_offline(struct pci_dev *pdev)
388 return (pdev->error_state != pci_channel_io_normal);
391 extern struct resource busn_resource;
393 struct pci_host_bridge_window {
394 struct list_head list;
395 struct resource *res; /* host bridge aperture (CPU address) */
396 resource_size_t offset; /* bus address + offset = CPU address */
399 struct pci_host_bridge {
401 struct pci_bus *bus; /* root bus */
402 struct list_head windows; /* pci_host_bridge_windows */
403 void (*release_fn)(struct pci_host_bridge *);
407 #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev)
408 void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
409 void (*release_fn)(struct pci_host_bridge *),
412 int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge);
415 * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond
416 * to P2P or CardBus bridge windows) go in a table. Additional ones (for
417 * buses below host bridges or subtractive decode bridges) go in the list.
418 * Use pci_bus_for_each_resource() to iterate through all the resources.
422 * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly
423 * and there's no way to program the bridge with the details of the window.
424 * This does not apply to ACPI _CRS windows, even with the _DEC subtractive-
425 * decode bit set, because they are explicit and can be programmed with _SRS.
427 #define PCI_SUBTRACTIVE_DECODE 0x1
429 struct pci_bus_resource {
430 struct list_head list;
431 struct resource *res;
435 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
438 struct list_head node; /* node in list of buses */
439 struct pci_bus *parent; /* parent bus this bridge is on */
440 struct list_head children; /* list of child buses */
441 struct list_head devices; /* list of devices on this bus */
442 struct pci_dev *self; /* bridge device as seen by parent */
443 struct list_head slots; /* list of slots on this bus */
444 struct resource *resource[PCI_BRIDGE_RESOURCE_NUM];
445 struct list_head resources; /* address space routed to this bus */
446 struct resource busn_res; /* bus numbers routed to this bus */
448 struct pci_ops *ops; /* configuration access functions */
449 struct msi_chip *msi; /* MSI controller */
450 void *sysdata; /* hook for sys-specific extension */
451 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
453 unsigned char number; /* bus number */
454 unsigned char primary; /* number of primary bridge */
455 unsigned char max_bus_speed; /* enum pci_bus_speed */
456 unsigned char cur_bus_speed; /* enum pci_bus_speed */
460 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
461 pci_bus_flags_t bus_flags; /* Inherited by child busses */
462 struct device *bridge;
464 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
465 struct bin_attribute *legacy_mem; /* legacy mem */
466 unsigned int is_added:1;
469 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
470 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
473 * Returns true if the pci bus is root (behind host-pci bridge),
476 static inline bool pci_is_root_bus(struct pci_bus *pbus)
478 return !(pbus->parent);
481 #ifdef CONFIG_PCI_MSI
482 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
484 return pci_dev->msi_enabled || pci_dev->msix_enabled;
487 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
491 * Error values that may be returned by PCI functions.
493 #define PCIBIOS_SUCCESSFUL 0x00
494 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
495 #define PCIBIOS_BAD_VENDOR_ID 0x83
496 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
497 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
498 #define PCIBIOS_SET_FAILED 0x88
499 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
502 * Translate above to generic errno for passing back through non-pci.
504 static inline int pcibios_err_to_errno(int err)
506 if (err <= PCIBIOS_SUCCESSFUL)
507 return err; /* Assume already errno */
510 case PCIBIOS_FUNC_NOT_SUPPORTED:
512 case PCIBIOS_BAD_VENDOR_ID:
514 case PCIBIOS_DEVICE_NOT_FOUND:
516 case PCIBIOS_BAD_REGISTER_NUMBER:
518 case PCIBIOS_SET_FAILED:
520 case PCIBIOS_BUFFER_TOO_SMALL:
527 /* Low-level architecture-dependent routines */
530 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
531 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
535 * ACPI needs to be able to access PCI config space before we've done a
536 * PCI bus scan and created pci_bus structures.
538 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
539 int reg, int len, u32 *val);
540 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
541 int reg, int len, u32 val);
543 struct pci_bus_region {
544 resource_size_t start;
549 spinlock_t lock; /* protects list, index */
550 struct list_head list; /* for IDs added at runtime */
553 /* ---------------------------------------------------------------- */
554 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
555 * a set of callbacks in struct pci_error_handlers, then that device driver
556 * will be notified of PCI bus errors, and will be driven to recovery
557 * when an error occurs.
560 typedef unsigned int __bitwise pci_ers_result_t;
562 enum pci_ers_result {
563 /* no result/none/not supported in device driver */
564 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
566 /* Device driver can recover without slot reset */
567 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
569 /* Device driver wants slot to be reset. */
570 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
572 /* Device has completely failed, is unrecoverable */
573 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
575 /* Device driver is fully recovered and operational */
576 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
578 /* No AER capabilities registered for the driver */
579 PCI_ERS_RESULT_NO_AER_DRIVER = (__force pci_ers_result_t) 6,
582 /* PCI bus error event callbacks */
583 struct pci_error_handlers {
584 /* PCI bus error detected on this device */
585 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
586 enum pci_channel_state error);
588 /* MMIO has been re-enabled, but not DMA */
589 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
591 /* PCI Express link has been reset */
592 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
594 /* PCI slot has been reset */
595 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
597 /* Device driver may resume normal operations */
598 void (*resume)(struct pci_dev *dev);
601 /* ---------------------------------------------------------------- */
605 struct list_head node;
607 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
608 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
609 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
610 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
611 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
612 int (*resume_early) (struct pci_dev *dev);
613 int (*resume) (struct pci_dev *dev); /* Device woken up */
614 void (*shutdown) (struct pci_dev *dev);
615 int (*sriov_configure) (struct pci_dev *dev, int num_vfs); /* PF pdev */
616 const struct pci_error_handlers *err_handler;
617 struct device_driver driver;
618 struct pci_dynids dynids;
621 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
624 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
625 * @_table: device table name
627 * This macro is used to create a struct pci_device_id array (a device table)
628 * in a generic manner.
630 #define DEFINE_PCI_DEVICE_TABLE(_table) \
631 const struct pci_device_id _table[]
634 * PCI_DEVICE - macro used to describe a specific pci device
635 * @vend: the 16 bit PCI Vendor ID
636 * @dev: the 16 bit PCI Device ID
638 * This macro is used to create a struct pci_device_id that matches a
639 * specific device. The subvendor and subdevice fields will be set to
642 #define PCI_DEVICE(vend,dev) \
643 .vendor = (vend), .device = (dev), \
644 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
647 * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem
648 * @vend: the 16 bit PCI Vendor ID
649 * @dev: the 16 bit PCI Device ID
650 * @subvend: the 16 bit PCI Subvendor ID
651 * @subdev: the 16 bit PCI Subdevice ID
653 * This macro is used to create a struct pci_device_id that matches a
654 * specific device with subsystem information.
656 #define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \
657 .vendor = (vend), .device = (dev), \
658 .subvendor = (subvend), .subdevice = (subdev)
661 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
662 * @dev_class: the class, subclass, prog-if triple for this device
663 * @dev_class_mask: the class mask for this device
665 * This macro is used to create a struct pci_device_id that matches a
666 * specific PCI class. The vendor, device, subvendor, and subdevice
667 * fields will be set to PCI_ANY_ID.
669 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
670 .class = (dev_class), .class_mask = (dev_class_mask), \
671 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
672 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
675 * PCI_VDEVICE - macro used to describe a specific pci device in short form
676 * @vendor: the vendor name
677 * @device: the 16 bit PCI Device ID
679 * This macro is used to create a struct pci_device_id that matches a
680 * specific PCI device. The subvendor, and subdevice fields will be set
681 * to PCI_ANY_ID. The macro allows the next field to follow as the device
685 #define PCI_VDEVICE(vendor, device) \
686 PCI_VENDOR_ID_##vendor, (device), \
687 PCI_ANY_ID, PCI_ANY_ID, 0, 0
689 /* these external functions are only available when PCI support is enabled */
692 void pcie_bus_configure_settings(struct pci_bus *bus);
694 enum pcie_bus_config_types {
697 PCIE_BUS_PERFORMANCE,
701 extern enum pcie_bus_config_types pcie_bus_config;
703 extern struct bus_type pci_bus_type;
705 /* Do NOT directly access these two variables, unless you are arch specific pci
706 * code, or pci core code. */
707 extern struct list_head pci_root_buses; /* list of all known PCI buses */
708 /* Some device drivers need know if pci is initiated */
709 int no_pci_devices(void);
711 void pcibios_resource_survey_bus(struct pci_bus *bus);
712 void pcibios_add_bus(struct pci_bus *bus);
713 void pcibios_remove_bus(struct pci_bus *bus);
714 void pcibios_fixup_bus(struct pci_bus *);
715 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
716 /* Architecture specific versions may override this (weak) */
717 char *pcibios_setup(char *str);
719 /* Used only when drivers/pci/setup.c is used */
720 resource_size_t pcibios_align_resource(void *, const struct resource *,
723 void pcibios_update_irq(struct pci_dev *, int irq);
725 /* Weak but can be overriden by arch */
726 void pci_fixup_cardbus(struct pci_bus *);
728 /* Generic PCI functions used internally */
730 void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
731 struct resource *res);
732 void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
733 struct pci_bus_region *region);
734 void pcibios_scan_specific_bus(int busn);
735 struct pci_bus *pci_find_bus(int domain, int busnr);
736 void pci_bus_add_devices(const struct pci_bus *bus);
737 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
738 struct pci_ops *ops, void *sysdata);
739 struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata);
740 struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
741 struct pci_ops *ops, void *sysdata,
742 struct list_head *resources);
743 int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax);
744 int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax);
745 void pci_bus_release_busn_res(struct pci_bus *b);
746 struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
747 struct pci_ops *ops, void *sysdata,
748 struct list_head *resources);
749 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
751 void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
752 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
754 struct hotplug_slot *hotplug);
755 void pci_destroy_slot(struct pci_slot *slot);
756 void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
757 int pci_scan_slot(struct pci_bus *bus, int devfn);
758 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
759 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
760 unsigned int pci_scan_child_bus(struct pci_bus *bus);
761 int __must_check pci_bus_add_device(struct pci_dev *dev);
762 void pci_read_bridge_bases(struct pci_bus *child);
763 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
764 struct resource *res);
765 u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin);
766 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
767 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
768 struct pci_dev *pci_dev_get(struct pci_dev *dev);
769 void pci_dev_put(struct pci_dev *dev);
770 void pci_remove_bus(struct pci_bus *b);
771 void pci_stop_and_remove_bus_device(struct pci_dev *dev);
772 void pci_stop_root_bus(struct pci_bus *bus);
773 void pci_remove_root_bus(struct pci_bus *bus);
774 void pci_setup_cardbus(struct pci_bus *bus);
775 void pci_sort_breadthfirst(void);
776 #define dev_is_pci(d) ((d)->bus == &pci_bus_type)
777 #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false))
778 #define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0))
780 /* Generic PCI functions exported to card drivers */
782 enum pci_lost_interrupt_reason {
783 PCI_LOST_IRQ_NO_INFORMATION = 0,
784 PCI_LOST_IRQ_DISABLE_MSI,
785 PCI_LOST_IRQ_DISABLE_MSIX,
786 PCI_LOST_IRQ_DISABLE_ACPI,
788 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
789 int pci_find_capability(struct pci_dev *dev, int cap);
790 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
791 int pci_find_ext_capability(struct pci_dev *dev, int cap);
792 int pci_find_next_ext_capability(struct pci_dev *dev, int pos, int cap);
793 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
794 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
795 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
797 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
798 struct pci_dev *from);
799 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
800 unsigned int ss_vendor, unsigned int ss_device,
801 struct pci_dev *from);
802 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
803 struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus,
805 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
808 return pci_get_domain_bus_and_slot(0, bus, devfn);
810 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
811 int pci_dev_present(const struct pci_device_id *ids);
813 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
815 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
816 int where, u16 *val);
817 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
818 int where, u32 *val);
819 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
821 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
823 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
825 struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
827 static inline int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val)
829 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
831 static inline int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val)
833 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
835 static inline int pci_read_config_dword(const struct pci_dev *dev, int where,
838 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
840 static inline int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val)
842 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
844 static inline int pci_write_config_word(const struct pci_dev *dev, int where, u16 val)
846 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
848 static inline int pci_write_config_dword(const struct pci_dev *dev, int where,
851 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
854 int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val);
855 int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val);
856 int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val);
857 int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val);
858 int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos,
860 int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos,
863 static inline int pcie_capability_set_word(struct pci_dev *dev, int pos,
866 return pcie_capability_clear_and_set_word(dev, pos, 0, set);
869 static inline int pcie_capability_set_dword(struct pci_dev *dev, int pos,
872 return pcie_capability_clear_and_set_dword(dev, pos, 0, set);
875 static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos,
878 return pcie_capability_clear_and_set_word(dev, pos, clear, 0);
881 static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos,
884 return pcie_capability_clear_and_set_dword(dev, pos, clear, 0);
887 /* user-space driven config access */
888 int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
889 int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
890 int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
891 int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
892 int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
893 int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
895 int __must_check pci_enable_device(struct pci_dev *dev);
896 int __must_check pci_enable_device_io(struct pci_dev *dev);
897 int __must_check pci_enable_device_mem(struct pci_dev *dev);
898 int __must_check pci_reenable_device(struct pci_dev *);
899 int __must_check pcim_enable_device(struct pci_dev *pdev);
900 void pcim_pin_device(struct pci_dev *pdev);
902 static inline int pci_is_enabled(struct pci_dev *pdev)
904 return (atomic_read(&pdev->enable_cnt) > 0);
907 static inline int pci_is_managed(struct pci_dev *pdev)
909 return pdev->is_managed;
912 void pci_disable_device(struct pci_dev *dev);
914 extern unsigned int pcibios_max_latency;
915 void pci_set_master(struct pci_dev *dev);
916 void pci_clear_master(struct pci_dev *dev);
918 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
919 int pci_set_cacheline_size(struct pci_dev *dev);
920 #define HAVE_PCI_SET_MWI
921 int __must_check pci_set_mwi(struct pci_dev *dev);
922 int pci_try_set_mwi(struct pci_dev *dev);
923 void pci_clear_mwi(struct pci_dev *dev);
924 void pci_intx(struct pci_dev *dev, int enable);
925 bool pci_intx_mask_supported(struct pci_dev *dev);
926 bool pci_check_and_mask_intx(struct pci_dev *dev);
927 bool pci_check_and_unmask_intx(struct pci_dev *dev);
928 void pci_msi_off(struct pci_dev *dev);
929 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
930 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
931 int pci_wait_for_pending_transaction(struct pci_dev *dev);
932 int pcix_get_max_mmrbc(struct pci_dev *dev);
933 int pcix_get_mmrbc(struct pci_dev *dev);
934 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
935 int pcie_get_readrq(struct pci_dev *dev);
936 int pcie_set_readrq(struct pci_dev *dev, int rq);
937 int pcie_get_mps(struct pci_dev *dev);
938 int pcie_set_mps(struct pci_dev *dev, int mps);
939 int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed,
940 enum pcie_link_width *width);
941 int __pci_reset_function(struct pci_dev *dev);
942 int __pci_reset_function_locked(struct pci_dev *dev);
943 int pci_reset_function(struct pci_dev *dev);
944 int pci_probe_reset_slot(struct pci_slot *slot);
945 int pci_reset_slot(struct pci_slot *slot);
946 int pci_probe_reset_bus(struct pci_bus *bus);
947 int pci_reset_bus(struct pci_bus *bus);
948 void pci_reset_bridge_secondary_bus(struct pci_dev *dev);
949 void pci_update_resource(struct pci_dev *dev, int resno);
950 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
951 int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align);
952 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
954 /* ROM control related routines */
955 int pci_enable_rom(struct pci_dev *pdev);
956 void pci_disable_rom(struct pci_dev *pdev);
957 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
958 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
959 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
960 void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size);
962 /* Power management related routines */
963 int pci_save_state(struct pci_dev *dev);
964 void pci_restore_state(struct pci_dev *dev);
965 struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev);
966 int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state);
967 int pci_load_and_free_saved_state(struct pci_dev *dev,
968 struct pci_saved_state **state);
969 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
970 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
971 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
972 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
973 void pci_pme_active(struct pci_dev *dev, bool enable);
974 int __pci_enable_wake(struct pci_dev *dev, pci_power_t state,
975 bool runtime, bool enable);
976 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
977 pci_power_t pci_target_state(struct pci_dev *dev);
978 int pci_prepare_to_sleep(struct pci_dev *dev);
979 int pci_back_from_sleep(struct pci_dev *dev);
980 bool pci_dev_run_wake(struct pci_dev *dev);
981 bool pci_check_pme_status(struct pci_dev *dev);
982 void pci_pme_wakeup_bus(struct pci_bus *bus);
984 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
987 return __pci_enable_wake(dev, state, false, enable);
990 #define PCI_EXP_IDO_REQUEST (1<<0)
991 #define PCI_EXP_IDO_COMPLETION (1<<1)
992 void pci_enable_ido(struct pci_dev *dev, unsigned long type);
993 void pci_disable_ido(struct pci_dev *dev, unsigned long type);
995 enum pci_obff_signal_type {
996 PCI_EXP_OBFF_SIGNAL_L0 = 0,
997 PCI_EXP_OBFF_SIGNAL_ALWAYS = 1,
999 int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type);
1000 void pci_disable_obff(struct pci_dev *dev);
1002 int pci_enable_ltr(struct pci_dev *dev);
1003 void pci_disable_ltr(struct pci_dev *dev);
1004 int pci_set_ltr(struct pci_dev *dev, int snoop_lat_ns, int nosnoop_lat_ns);
1006 /* For use by arch with custom probe code */
1007 void set_pcie_port_type(struct pci_dev *pdev);
1008 void set_pcie_hotplug_bridge(struct pci_dev *pdev);
1010 /* Functions for PCI Hotplug drivers to use */
1011 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
1012 unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge);
1013 unsigned int pci_rescan_bus(struct pci_bus *bus);
1015 /* Vital product data routines */
1016 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
1017 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
1018 int pci_vpd_truncate(struct pci_dev *dev, size_t size);
1020 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
1021 resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx);
1022 void pci_bus_assign_resources(const struct pci_bus *bus);
1023 void pci_bus_size_bridges(struct pci_bus *bus);
1024 int pci_claim_resource(struct pci_dev *, int);
1025 void pci_assign_unassigned_resources(void);
1026 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge);
1027 void pci_assign_unassigned_bus_resources(struct pci_bus *bus);
1028 void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus);
1029 void pdev_enable_device(struct pci_dev *);
1030 int pci_enable_resources(struct pci_dev *, int mask);
1031 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
1032 int (*)(const struct pci_dev *, u8, u8));
1033 #define HAVE_PCI_REQ_REGIONS 2
1034 int __must_check pci_request_regions(struct pci_dev *, const char *);
1035 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
1036 void pci_release_regions(struct pci_dev *);
1037 int __must_check pci_request_region(struct pci_dev *, int, const char *);
1038 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
1039 void pci_release_region(struct pci_dev *, int);
1040 int pci_request_selected_regions(struct pci_dev *, int, const char *);
1041 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
1042 void pci_release_selected_regions(struct pci_dev *, int);
1044 /* drivers/pci/bus.c */
1045 struct pci_bus *pci_bus_get(struct pci_bus *bus);
1046 void pci_bus_put(struct pci_bus *bus);
1047 void pci_add_resource(struct list_head *resources, struct resource *res);
1048 void pci_add_resource_offset(struct list_head *resources, struct resource *res,
1049 resource_size_t offset);
1050 void pci_free_resource_list(struct list_head *resources);
1051 void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags);
1052 struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n);
1053 void pci_bus_remove_resources(struct pci_bus *bus);
1055 #define pci_bus_for_each_resource(bus, res, i) \
1057 (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \
1060 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
1061 struct resource *res, resource_size_t size,
1062 resource_size_t align, resource_size_t min,
1063 unsigned int type_mask,
1064 resource_size_t (*alignf)(void *,
1065 const struct resource *,
1070 /* Proper probing supporting hot-pluggable devices */
1071 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
1072 const char *mod_name);
1075 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
1077 #define pci_register_driver(driver) \
1078 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
1080 void pci_unregister_driver(struct pci_driver *dev);
1083 * module_pci_driver() - Helper macro for registering a PCI driver
1084 * @__pci_driver: pci_driver struct
1086 * Helper macro for PCI drivers which do not do anything special in module
1087 * init/exit. This eliminates a lot of boilerplate. Each module may only
1088 * use this macro once, and calling it replaces module_init() and module_exit()
1090 #define module_pci_driver(__pci_driver) \
1091 module_driver(__pci_driver, pci_register_driver, \
1092 pci_unregister_driver)
1094 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
1095 int pci_add_dynid(struct pci_driver *drv,
1096 unsigned int vendor, unsigned int device,
1097 unsigned int subvendor, unsigned int subdevice,
1098 unsigned int class, unsigned int class_mask,
1099 unsigned long driver_data);
1100 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
1101 struct pci_dev *dev);
1102 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
1105 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
1107 int pci_cfg_space_size_ext(struct pci_dev *dev);
1108 int pci_cfg_space_size(struct pci_dev *dev);
1109 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
1110 void pci_setup_bridge(struct pci_bus *bus);
1111 resource_size_t pcibios_window_alignment(struct pci_bus *bus,
1112 unsigned long type);
1114 #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0)
1115 #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1)
1117 int pci_set_vga_state(struct pci_dev *pdev, bool decode,
1118 unsigned int command_bits, u32 flags);
1119 /* kmem_cache style wrapper around pci_alloc_consistent() */
1121 #include <linux/pci-dma.h>
1122 #include <linux/dmapool.h>
1124 #define pci_pool dma_pool
1125 #define pci_pool_create(name, pdev, size, align, allocation) \
1126 dma_pool_create(name, &pdev->dev, size, align, allocation)
1127 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
1128 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
1129 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
1131 enum pci_dma_burst_strategy {
1132 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
1133 strategy_parameter is N/A */
1134 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
1136 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
1137 strategy_parameter byte boundaries */
1141 u32 vector; /* kernel uses to write allocated vector */
1142 u16 entry; /* driver uses to specify entry, OS writes */
1146 #ifndef CONFIG_PCI_MSI
1147 static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
1153 pci_enable_msi_block_auto(struct pci_dev *dev, unsigned int *maxvec)
1158 static inline void pci_msi_shutdown(struct pci_dev *dev)
1160 static inline void pci_disable_msi(struct pci_dev *dev)
1163 static inline int pci_msix_table_size(struct pci_dev *dev)
1167 static inline int pci_enable_msix(struct pci_dev *dev,
1168 struct msix_entry *entries, int nvec)
1173 static inline void pci_msix_shutdown(struct pci_dev *dev)
1175 static inline void pci_disable_msix(struct pci_dev *dev)
1178 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
1181 static inline void pci_restore_msi_state(struct pci_dev *dev)
1183 static inline int pci_msi_enabled(void)
1188 int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec);
1189 int pci_enable_msi_block_auto(struct pci_dev *dev, unsigned int *maxvec);
1190 void pci_msi_shutdown(struct pci_dev *dev);
1191 void pci_disable_msi(struct pci_dev *dev);
1192 int pci_msix_table_size(struct pci_dev *dev);
1193 int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec);
1194 void pci_msix_shutdown(struct pci_dev *dev);
1195 void pci_disable_msix(struct pci_dev *dev);
1196 void msi_remove_pci_irq_vectors(struct pci_dev *dev);
1197 void pci_restore_msi_state(struct pci_dev *dev);
1198 int pci_msi_enabled(void);
1201 #ifdef CONFIG_PCIEPORTBUS
1202 extern bool pcie_ports_disabled;
1203 extern bool pcie_ports_auto;
1205 #define pcie_ports_disabled true
1206 #define pcie_ports_auto false
1209 #ifndef CONFIG_PCIEASPM
1210 static inline int pcie_aspm_enabled(void) { return 0; }
1211 static inline bool pcie_aspm_support_enabled(void) { return false; }
1213 int pcie_aspm_enabled(void);
1214 bool pcie_aspm_support_enabled(void);
1217 #ifdef CONFIG_PCIEAER
1218 void pci_no_aer(void);
1219 bool pci_aer_available(void);
1221 static inline void pci_no_aer(void) { }
1222 static inline bool pci_aer_available(void) { return false; }
1225 #ifndef CONFIG_PCIE_ECRC
1226 static inline void pcie_set_ecrc_checking(struct pci_dev *dev)
1230 static inline void pcie_ecrc_get_policy(char *str) {};
1232 void pcie_set_ecrc_checking(struct pci_dev *dev);
1233 void pcie_ecrc_get_policy(char *str);
1236 #define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
1238 #ifdef CONFIG_HT_IRQ
1239 /* The functions a driver should call */
1240 int ht_create_irq(struct pci_dev *dev, int idx);
1241 void ht_destroy_irq(unsigned int irq);
1242 #endif /* CONFIG_HT_IRQ */
1244 void pci_cfg_access_lock(struct pci_dev *dev);
1245 bool pci_cfg_access_trylock(struct pci_dev *dev);
1246 void pci_cfg_access_unlock(struct pci_dev *dev);
1249 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
1250 * a PCI domain is defined to be a set of PCI busses which share
1251 * configuration space.
1253 #ifdef CONFIG_PCI_DOMAINS
1254 extern int pci_domains_supported;
1256 enum { pci_domains_supported = 0 };
1257 static inline int pci_domain_nr(struct pci_bus *bus)
1262 static inline int pci_proc_domain(struct pci_bus *bus)
1266 #endif /* CONFIG_PCI_DOMAINS */
1268 /* some architectures require additional setup to direct VGA traffic */
1269 typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode,
1270 unsigned int command_bits, u32 flags);
1271 void pci_register_set_vga_state(arch_set_vga_state_t func);
1273 #else /* CONFIG_PCI is not enabled */
1276 * If the system does not have PCI, clearly these return errors. Define
1277 * these as simple inline functions to avoid hair in drivers.
1280 #define _PCI_NOP(o, s, t) \
1281 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
1283 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
1285 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
1286 _PCI_NOP(o, word, u16 x) \
1287 _PCI_NOP(o, dword, u32 x)
1288 _PCI_NOP_ALL(read, *)
1289 _PCI_NOP_ALL(write,)
1291 static inline struct pci_dev *pci_get_device(unsigned int vendor,
1292 unsigned int device,
1293 struct pci_dev *from)
1298 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
1299 unsigned int device,
1300 unsigned int ss_vendor,
1301 unsigned int ss_device,
1302 struct pci_dev *from)
1307 static inline struct pci_dev *pci_get_class(unsigned int class,
1308 struct pci_dev *from)
1313 #define pci_dev_present(ids) (0)
1314 #define no_pci_devices() (1)
1315 #define pci_dev_put(dev) do { } while (0)
1317 static inline void pci_set_master(struct pci_dev *dev)
1320 static inline int pci_enable_device(struct pci_dev *dev)
1325 static inline void pci_disable_device(struct pci_dev *dev)
1328 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
1333 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
1338 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
1344 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
1350 static inline int pci_assign_resource(struct pci_dev *dev, int i)
1355 static inline int __pci_register_driver(struct pci_driver *drv,
1356 struct module *owner)
1361 static inline int pci_register_driver(struct pci_driver *drv)
1366 static inline void pci_unregister_driver(struct pci_driver *drv)
1369 static inline int pci_find_capability(struct pci_dev *dev, int cap)
1374 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1380 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1385 /* Power management related routines */
1386 static inline int pci_save_state(struct pci_dev *dev)
1391 static inline void pci_restore_state(struct pci_dev *dev)
1394 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1399 static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable)
1404 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1410 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1416 static inline void pci_enable_ido(struct pci_dev *dev, unsigned long type)
1420 static inline void pci_disable_ido(struct pci_dev *dev, unsigned long type)
1424 static inline int pci_enable_obff(struct pci_dev *dev, unsigned long type)
1429 static inline void pci_disable_obff(struct pci_dev *dev)
1433 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1438 static inline void pci_release_regions(struct pci_dev *dev)
1441 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1443 static inline void pci_block_cfg_access(struct pci_dev *dev)
1446 static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev)
1449 static inline void pci_unblock_cfg_access(struct pci_dev *dev)
1452 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1455 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1459 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1463 static inline int pci_domain_nr(struct pci_bus *bus)
1466 static inline struct pci_dev *pci_dev_get(struct pci_dev *dev)
1469 #define dev_is_pci(d) (false)
1470 #define dev_is_pf(d) (false)
1471 #define dev_num_vf(d) (0)
1472 #endif /* CONFIG_PCI */
1474 /* Include architecture-dependent settings and functions */
1476 #include <asm/pci.h>
1478 #ifndef PCIBIOS_MAX_MEM_32
1479 #define PCIBIOS_MAX_MEM_32 (-1)
1482 /* these helpers provide future and backwards compatibility
1483 * for accessing popular PCI BAR info */
1484 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1485 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1486 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1487 #define pci_resource_len(dev,bar) \
1488 ((pci_resource_start((dev), (bar)) == 0 && \
1489 pci_resource_end((dev), (bar)) == \
1490 pci_resource_start((dev), (bar))) ? 0 : \
1492 (pci_resource_end((dev), (bar)) - \
1493 pci_resource_start((dev), (bar)) + 1))
1495 /* Similar to the helpers above, these manipulate per-pci_dev
1496 * driver-specific data. They are really just a wrapper around
1497 * the generic device structure functions of these calls.
1499 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1501 return dev_get_drvdata(&pdev->dev);
1504 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1506 dev_set_drvdata(&pdev->dev, data);
1509 /* If you want to know what to call your pci_dev, ask this function.
1510 * Again, it's a wrapper around the generic device.
1512 static inline const char *pci_name(const struct pci_dev *pdev)
1514 return dev_name(&pdev->dev);
1518 /* Some archs don't want to expose struct resource to userland as-is
1519 * in sysfs and /proc
1521 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1522 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1523 const struct resource *rsrc, resource_size_t *start,
1524 resource_size_t *end)
1526 *start = rsrc->start;
1529 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1533 * The world is not perfect and supplies us with broken PCI devices.
1534 * For at least a part of these bugs we need a work-around, so both
1535 * generic (drivers/pci/quirks.c) and per-architecture code can define
1536 * fixup hooks to be called for particular buggy devices.
1540 u16 vendor; /* You can use PCI_ANY_ID here of course */
1541 u16 device; /* You can use PCI_ANY_ID here of course */
1542 u32 class; /* You can use PCI_ANY_ID here too */
1543 unsigned int class_shift; /* should be 0, 8, 16 */
1544 void (*hook)(struct pci_dev *dev);
1547 enum pci_fixup_pass {
1548 pci_fixup_early, /* Before probing BARs */
1549 pci_fixup_header, /* After reading configuration header */
1550 pci_fixup_final, /* Final phase of device fixups */
1551 pci_fixup_enable, /* pci_enable_device() time */
1552 pci_fixup_resume, /* pci_device_resume() */
1553 pci_fixup_suspend, /* pci_device_suspend */
1554 pci_fixup_resume_early, /* pci_device_resume_early() */
1557 /* Anonymous variables would be nice... */
1558 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class, \
1559 class_shift, hook) \
1560 static const struct pci_fixup __pci_fixup_##name __used \
1561 __attribute__((__section__(#section), aligned((sizeof(void *))))) \
1562 = { vendor, device, class, class_shift, hook };
1564 #define DECLARE_PCI_FIXUP_CLASS_EARLY(vendor, device, class, \
1565 class_shift, hook) \
1566 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1567 vendor##device##hook, vendor, device, class, class_shift, hook)
1568 #define DECLARE_PCI_FIXUP_CLASS_HEADER(vendor, device, class, \
1569 class_shift, hook) \
1570 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1571 vendor##device##hook, vendor, device, class, class_shift, hook)
1572 #define DECLARE_PCI_FIXUP_CLASS_FINAL(vendor, device, class, \
1573 class_shift, hook) \
1574 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1575 vendor##device##hook, vendor, device, class, class_shift, hook)
1576 #define DECLARE_PCI_FIXUP_CLASS_ENABLE(vendor, device, class, \
1577 class_shift, hook) \
1578 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1579 vendor##device##hook, vendor, device, class, class_shift, hook)
1580 #define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class, \
1581 class_shift, hook) \
1582 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1583 resume##vendor##device##hook, vendor, device, class, \
1585 #define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class, \
1586 class_shift, hook) \
1587 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1588 resume_early##vendor##device##hook, vendor, device, \
1589 class, class_shift, hook)
1590 #define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class, \
1591 class_shift, hook) \
1592 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1593 suspend##vendor##device##hook, vendor, device, class, \
1596 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1597 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1598 vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
1599 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1600 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1601 vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
1602 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1603 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1604 vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
1605 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1606 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1607 vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
1608 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1609 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1610 resume##vendor##device##hook, vendor, device, \
1611 PCI_ANY_ID, 0, hook)
1612 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1613 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1614 resume_early##vendor##device##hook, vendor, device, \
1615 PCI_ANY_ID, 0, hook)
1616 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1617 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1618 suspend##vendor##device##hook, vendor, device, \
1619 PCI_ANY_ID, 0, hook)
1621 #ifdef CONFIG_PCI_QUIRKS
1622 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1623 struct pci_dev *pci_get_dma_source(struct pci_dev *dev);
1624 int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags);
1626 static inline void pci_fixup_device(enum pci_fixup_pass pass,
1627 struct pci_dev *dev) {}
1628 static inline struct pci_dev *pci_get_dma_source(struct pci_dev *dev)
1630 return pci_dev_get(dev);
1632 static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev,
1639 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1640 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1641 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1642 int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name);
1643 int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask,
1645 void pcim_iounmap_regions(struct pci_dev *pdev, int mask);
1647 extern int pci_pci_problems;
1648 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1649 #define PCIPCI_TRITON 2
1650 #define PCIPCI_NATOMA 4
1651 #define PCIPCI_VIAETBF 8
1652 #define PCIPCI_VSFX 16
1653 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1654 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1656 extern unsigned long pci_cardbus_io_size;
1657 extern unsigned long pci_cardbus_mem_size;
1658 extern u8 pci_dfl_cache_line_size;
1659 extern u8 pci_cache_line_size;
1661 extern unsigned long pci_hotplug_io_size;
1662 extern unsigned long pci_hotplug_mem_size;
1664 /* Architecture specific versions may override these (weak) */
1665 int pcibios_add_platform_entries(struct pci_dev *dev);
1666 void pcibios_disable_device(struct pci_dev *dev);
1667 void pcibios_set_master(struct pci_dev *dev);
1668 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1669 enum pcie_reset_state state);
1670 int pcibios_add_device(struct pci_dev *dev);
1671 void pcibios_release_device(struct pci_dev *dev);
1673 #ifdef CONFIG_HIBERNATE_CALLBACKS
1674 extern struct dev_pm_ops pcibios_pm_ops;
1677 #ifdef CONFIG_PCI_MMCONFIG
1678 void __init pci_mmcfg_early_init(void);
1679 void __init pci_mmcfg_late_init(void);
1681 static inline void pci_mmcfg_early_init(void) { }
1682 static inline void pci_mmcfg_late_init(void) { }
1685 int pci_ext_cfg_avail(void);
1687 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1689 #ifdef CONFIG_PCI_IOV
1690 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
1691 void pci_disable_sriov(struct pci_dev *dev);
1692 irqreturn_t pci_sriov_migration(struct pci_dev *dev);
1693 int pci_num_vf(struct pci_dev *dev);
1694 int pci_vfs_assigned(struct pci_dev *dev);
1695 int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs);
1696 int pci_sriov_get_totalvfs(struct pci_dev *dev);
1698 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1702 static inline void pci_disable_sriov(struct pci_dev *dev)
1705 static inline irqreturn_t pci_sriov_migration(struct pci_dev *dev)
1709 static inline int pci_num_vf(struct pci_dev *dev)
1713 static inline int pci_vfs_assigned(struct pci_dev *dev)
1717 static inline int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
1721 static inline int pci_sriov_get_totalvfs(struct pci_dev *dev)
1727 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
1728 void pci_hp_create_module_link(struct pci_slot *pci_slot);
1729 void pci_hp_remove_module_link(struct pci_slot *pci_slot);
1733 * pci_pcie_cap - get the saved PCIe capability offset
1736 * PCIe capability offset is calculated at PCI device initialization
1737 * time and saved in the data structure. This function returns saved
1738 * PCIe capability offset. Using this instead of pci_find_capability()
1739 * reduces unnecessary search in the PCI configuration space. If you
1740 * need to calculate PCIe capability offset from raw device for some
1741 * reasons, please use pci_find_capability() instead.
1743 static inline int pci_pcie_cap(struct pci_dev *dev)
1745 return dev->pcie_cap;
1749 * pci_is_pcie - check if the PCI device is PCI Express capable
1752 * Retrun true if the PCI device is PCI Express capable, false otherwise.
1754 static inline bool pci_is_pcie(struct pci_dev *dev)
1756 return !!pci_pcie_cap(dev);
1760 * pcie_caps_reg - get the PCIe Capabilities Register
1763 static inline u16 pcie_caps_reg(const struct pci_dev *dev)
1765 return dev->pcie_flags_reg;
1769 * pci_pcie_type - get the PCIe device/port type
1772 static inline int pci_pcie_type(const struct pci_dev *dev)
1774 return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4;
1777 void pci_request_acs(void);
1778 bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags);
1779 bool pci_acs_path_enabled(struct pci_dev *start,
1780 struct pci_dev *end, u16 acs_flags);
1782 #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */
1783 #define PCI_VPD_LRDT_ID(x) (x | PCI_VPD_LRDT)
1785 /* Large Resource Data Type Tag Item Names */
1786 #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */
1787 #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */
1788 #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */
1790 #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING)
1791 #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA)
1792 #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA)
1794 /* Small Resource Data Type Tag Item Names */
1795 #define PCI_VPD_STIN_END 0x78 /* End */
1797 #define PCI_VPD_SRDT_END PCI_VPD_STIN_END
1799 #define PCI_VPD_SRDT_TIN_MASK 0x78
1800 #define PCI_VPD_SRDT_LEN_MASK 0x07
1802 #define PCI_VPD_LRDT_TAG_SIZE 3
1803 #define PCI_VPD_SRDT_TAG_SIZE 1
1805 #define PCI_VPD_INFO_FLD_HDR_SIZE 3
1807 #define PCI_VPD_RO_KEYWORD_PARTNO "PN"
1808 #define PCI_VPD_RO_KEYWORD_MFR_ID "MN"
1809 #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0"
1810 #define PCI_VPD_RO_KEYWORD_CHKSUM "RV"
1813 * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length
1814 * @lrdt: Pointer to the beginning of the Large Resource Data Type tag
1816 * Returns the extracted Large Resource Data Type length.
1818 static inline u16 pci_vpd_lrdt_size(const u8 *lrdt)
1820 return (u16)lrdt[1] + ((u16)lrdt[2] << 8);
1824 * pci_vpd_srdt_size - Extracts the Small Resource Data Type length
1825 * @lrdt: Pointer to the beginning of the Small Resource Data Type tag
1827 * Returns the extracted Small Resource Data Type length.
1829 static inline u8 pci_vpd_srdt_size(const u8 *srdt)
1831 return (*srdt) & PCI_VPD_SRDT_LEN_MASK;
1835 * pci_vpd_info_field_size - Extracts the information field length
1836 * @lrdt: Pointer to the beginning of an information field header
1838 * Returns the extracted information field length.
1840 static inline u8 pci_vpd_info_field_size(const u8 *info_field)
1842 return info_field[2];
1846 * pci_vpd_find_tag - Locates the Resource Data Type tag provided
1847 * @buf: Pointer to buffered vpd data
1848 * @off: The offset into the buffer at which to begin the search
1849 * @len: The length of the vpd buffer
1850 * @rdt: The Resource Data Type to search for
1852 * Returns the index where the Resource Data Type was found or
1853 * -ENOENT otherwise.
1855 int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt);
1858 * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD
1859 * @buf: Pointer to buffered vpd data
1860 * @off: The offset into the buffer at which to begin the search
1861 * @len: The length of the buffer area, relative to off, in which to search
1862 * @kw: The keyword to search for
1864 * Returns the index where the information field keyword was found or
1865 * -ENOENT otherwise.
1867 int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
1868 unsigned int len, const char *kw);
1870 /* PCI <-> OF binding helpers */
1873 void pci_set_of_node(struct pci_dev *dev);
1874 void pci_release_of_node(struct pci_dev *dev);
1875 void pci_set_bus_of_node(struct pci_bus *bus);
1876 void pci_release_bus_of_node(struct pci_bus *bus);
1878 /* Arch may override this (weak) */
1879 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus);
1881 static inline struct device_node *
1882 pci_device_to_OF_node(const struct pci_dev *pdev)
1884 return pdev ? pdev->dev.of_node : NULL;
1887 static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
1889 return bus ? bus->dev.of_node : NULL;
1892 #else /* CONFIG_OF */
1893 static inline void pci_set_of_node(struct pci_dev *dev) { }
1894 static inline void pci_release_of_node(struct pci_dev *dev) { }
1895 static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
1896 static inline void pci_release_bus_of_node(struct pci_bus *bus) { }
1897 #endif /* CONFIG_OF */
1900 static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev)
1902 return pdev->dev.archdata.edev;
1907 * pci_find_upstream_pcie_bridge - find upstream PCIe-to-PCI bridge of a device
1908 * @pdev: the PCI device
1910 * if the device is PCIE, return NULL
1911 * if the device isn't connected to a PCIe bridge (that is its parent is a
1912 * legacy PCI bridge and the bridge is directly connected to bus 0), return its
1915 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev);
1917 #endif /* LINUX_PCI_H */