1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/kobject.h>
6 #include <linux/list.h>
9 u32 address_lo; /* low 32 bits of msi message address */
10 u32 address_hi; /* high 32 bits of msi message address */
11 u32 data; /* 16 bits of msi message data */
14 extern int pci_msi_ignore_mask;
15 /* Helper functions */
19 struct platform_msi_priv_data;
20 void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
21 #ifdef CONFIG_GENERIC_MSI_IRQ
22 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
24 static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
29 typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
33 * platform_msi_desc - Platform device specific msi descriptor data
34 * @msi_priv_data: Pointer to platform private data
35 * @msi_index: The index of the MSI descriptor for multi MSI
37 struct platform_msi_desc {
38 struct platform_msi_priv_data *msi_priv_data;
43 * fsl_mc_msi_desc - FSL-MC device specific msi descriptor data
44 * @msi_index: The index of the MSI descriptor
46 struct fsl_mc_msi_desc {
51 * ti_sci_inta_msi_desc - TISCI based INTA specific msi descriptor data
52 * @dev_index: TISCI device index
54 struct ti_sci_inta_msi_desc {
59 * struct msi_desc - Descriptor structure for MSI based interrupts
60 * @list: List head for management
61 * @irq: The base interrupt number
62 * @nvec_used: The number of vectors used
63 * @dev: Pointer to the device which uses this descriptor
64 * @msg: The last set MSI message cached for reuse
65 * @affinity: Optional pointer to a cpu affinity mask for this descriptor
67 * @masked: [PCI MSI/X] Mask bits
68 * @is_msix: [PCI MSI/X] True if MSI-X
69 * @multiple: [PCI MSI/X] log2 num of messages allocated
70 * @multi_cap: [PCI MSI/X] log2 num of messages supported
71 * @maskbit: [PCI MSI/X] Mask-Pending bit supported?
72 * @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
73 * @entry_nr: [PCI MSI/X] Entry which is described by this descriptor
74 * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
75 * @mask_pos: [PCI MSI] Mask register position
76 * @mask_base: [PCI MSI-X] Mask register base address
77 * @platform: [platform] Platform device specific msi descriptor data
78 * @fsl_mc: [fsl-mc] FSL MC device specific msi descriptor data
79 * @inta: [INTA] TISCI based INTA specific msi descriptor data
82 /* Shared device/bus type independent data */
83 struct list_head list;
85 unsigned int nvec_used;
88 struct irq_affinity_desc *affinity;
91 /* PCI MSI/X specific data */
101 unsigned default_irq;
105 void __iomem *mask_base;
110 * Non PCI variants add their data structure here. New
111 * entries need to use a named structure. We want
112 * proper name spaces for this. The PCI part is
113 * anonymous for now as it would require an immediate
116 struct platform_msi_desc platform;
117 struct fsl_mc_msi_desc fsl_mc;
118 struct ti_sci_inta_msi_desc inta;
122 /* Helpers to hide struct msi_desc implementation details */
123 #define msi_desc_to_dev(desc) ((desc)->dev)
124 #define dev_to_msi_list(dev) (&(dev)->msi_list)
125 #define first_msi_entry(dev) \
126 list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
127 #define for_each_msi_entry(desc, dev) \
128 list_for_each_entry((desc), dev_to_msi_list((dev)), list)
129 #define for_each_msi_entry_safe(desc, tmp, dev) \
130 list_for_each_entry_safe((desc), (tmp), dev_to_msi_list((dev)), list)
132 #ifdef CONFIG_PCI_MSI
133 #define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev)
134 #define for_each_pci_msi_entry(desc, pdev) \
135 for_each_msi_entry((desc), &(pdev)->dev)
137 struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
138 void *msi_desc_to_pci_sysdata(struct msi_desc *desc);
139 void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
140 #else /* CONFIG_PCI_MSI */
141 static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
145 static inline void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
148 #endif /* CONFIG_PCI_MSI */
150 struct msi_desc *alloc_msi_entry(struct device *dev, int nvec,
151 const struct irq_affinity_desc *affinity);
152 void free_msi_entry(struct msi_desc *entry);
153 void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
154 void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
156 u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
157 u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
158 void pci_msi_mask_irq(struct irq_data *data);
159 void pci_msi_unmask_irq(struct irq_data *data);
161 /* Conversion helpers. Should be removed after merging */
162 static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
164 __pci_write_msi_msg(entry, msg);
166 static inline void write_msi_msg(int irq, struct msi_msg *msg)
168 pci_write_msi_msg(irq, msg);
170 static inline void mask_msi_irq(struct irq_data *data)
172 pci_msi_mask_irq(data);
174 static inline void unmask_msi_irq(struct irq_data *data)
176 pci_msi_unmask_irq(data);
180 * The arch hooks to setup up msi irqs. Those functions are
181 * implemented as weak symbols so that they /can/ be overriden by
182 * architecture specific code if needed.
184 int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
185 void arch_teardown_msi_irq(unsigned int irq);
186 int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
187 void arch_teardown_msi_irqs(struct pci_dev *dev);
188 void arch_restore_msi_irqs(struct pci_dev *dev);
190 void default_teardown_msi_irqs(struct pci_dev *dev);
191 void default_restore_msi_irqs(struct pci_dev *dev);
193 struct msi_controller {
194 struct module *owner;
196 struct device_node *of_node;
197 struct list_head list;
199 int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
200 struct msi_desc *desc);
201 int (*setup_irqs)(struct msi_controller *chip, struct pci_dev *dev,
203 void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
206 #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
208 #include <linux/irqhandler.h>
212 struct irq_domain_ops;
215 struct fwnode_handle;
216 struct msi_domain_info;
219 * struct msi_domain_ops - MSI interrupt domain callbacks
220 * @get_hwirq: Retrieve the resulting hw irq number
221 * @msi_init: Domain specific init function for MSI interrupts
222 * @msi_free: Domain specific function to free a MSI interrupts
223 * @msi_check: Callback for verification of the domain/info/dev data
224 * @msi_prepare: Prepare the allocation of the interrupts in the domain
225 * @msi_finish: Optional callback to finalize the allocation
226 * @set_desc: Set the msi descriptor for an interrupt
227 * @handle_error: Optional error handler if the allocation fails
229 * @get_hwirq, @msi_init and @msi_free are callbacks used by
230 * msi_create_irq_domain() and related interfaces
232 * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error
233 * are callbacks used by msi_domain_alloc_irqs() and related
234 * interfaces which are based on msi_desc.
236 struct msi_domain_ops {
237 irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info,
238 msi_alloc_info_t *arg);
239 int (*msi_init)(struct irq_domain *domain,
240 struct msi_domain_info *info,
241 unsigned int virq, irq_hw_number_t hwirq,
242 msi_alloc_info_t *arg);
243 void (*msi_free)(struct irq_domain *domain,
244 struct msi_domain_info *info,
246 int (*msi_check)(struct irq_domain *domain,
247 struct msi_domain_info *info,
249 int (*msi_prepare)(struct irq_domain *domain,
250 struct device *dev, int nvec,
251 msi_alloc_info_t *arg);
252 void (*msi_finish)(msi_alloc_info_t *arg, int retval);
253 void (*set_desc)(msi_alloc_info_t *arg,
254 struct msi_desc *desc);
255 int (*handle_error)(struct irq_domain *domain,
256 struct msi_desc *desc, int error);
260 * struct msi_domain_info - MSI interrupt domain data
261 * @flags: Flags to decribe features and capabilities
262 * @ops: The callback data structure
263 * @chip: Optional: associated interrupt chip
264 * @chip_data: Optional: associated interrupt chip data
265 * @handler: Optional: associated interrupt flow handler
266 * @handler_data: Optional: associated interrupt flow handler data
267 * @handler_name: Optional: associated interrupt flow handler name
268 * @data: Optional: domain specific data
270 struct msi_domain_info {
272 struct msi_domain_ops *ops;
273 struct irq_chip *chip;
275 irq_flow_handler_t handler;
277 const char *handler_name;
281 /* Flags for msi_domain_info */
284 * Init non implemented ops callbacks with default MSI domain
287 MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0),
289 * Init non implemented chip callbacks with default MSI chip
292 MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1),
293 /* Support multiple PCI MSI interrupts */
294 MSI_FLAG_MULTI_PCI_MSI = (1 << 2),
295 /* Support PCI MSIX interrupts */
296 MSI_FLAG_PCI_MSIX = (1 << 3),
297 /* Needs early activate, required for PCI */
298 MSI_FLAG_ACTIVATE_EARLY = (1 << 4),
300 * Must reactivate when irq is started even when
301 * MSI_FLAG_ACTIVATE_EARLY has been set.
303 MSI_FLAG_MUST_REACTIVATE = (1 << 5),
304 /* Is level-triggered capable, using two messages */
305 MSI_FLAG_LEVEL_CAPABLE = (1 << 6),
308 int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
311 struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
312 struct msi_domain_info *info,
313 struct irq_domain *parent);
314 int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
316 void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
317 struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
319 struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode,
320 struct msi_domain_info *info,
321 struct irq_domain *parent);
322 int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
323 irq_write_msi_msg_t write_msi_msg);
324 void platform_msi_domain_free_irqs(struct device *dev);
326 /* When an MSI domain is used as an intermediate domain */
327 int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
328 int nvec, msi_alloc_info_t *args);
329 int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
330 int virq, int nvec, msi_alloc_info_t *args);
332 __platform_msi_create_device_domain(struct device *dev,
335 irq_write_msi_msg_t write_msi_msg,
336 const struct irq_domain_ops *ops,
339 #define platform_msi_create_device_domain(dev, nvec, write, ops, data) \
340 __platform_msi_create_device_domain(dev, nvec, false, write, ops, data)
341 #define platform_msi_create_device_tree_domain(dev, nvec, write, ops, data) \
342 __platform_msi_create_device_domain(dev, nvec, true, write, ops, data)
344 int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
345 unsigned int nr_irqs);
346 void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq,
348 void *platform_msi_get_host_data(struct irq_domain *domain);
349 #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
351 #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
352 void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg);
353 struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
354 struct msi_domain_info *info,
355 struct irq_domain *parent);
356 irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
357 struct msi_desc *desc);
358 int pci_msi_domain_check_cap(struct irq_domain *domain,
359 struct msi_domain_info *info, struct device *dev);
360 u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
361 struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);
363 static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
367 #endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
369 #endif /* LINUX_MSI_H */