1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2022, Linaro Ltd.
9 #include <linux/dma-direction.h>
10 #include <linux/mhi.h>
12 #define MHI_EP_DEFAULT_MTU 0x8000
15 * struct mhi_ep_channel_config - Channel configuration structure for controller
16 * @name: The name of this channel
17 * @num: The number assigned to this channel
18 * @num_elements: The number of elements that can be queued to this channel
19 * @dir: Direction that data may flow on this channel
21 struct mhi_ep_channel_config {
25 enum dma_data_direction dir;
29 * struct mhi_ep_cntrl_config - MHI Endpoint controller configuration
30 * @mhi_version: MHI spec version supported by the controller
31 * @max_channels: Maximum number of channels supported
32 * @num_channels: Number of channels defined in @ch_cfg
33 * @ch_cfg: Array of defined channels
35 struct mhi_ep_cntrl_config {
39 const struct mhi_ep_channel_config *ch_cfg;
43 * struct mhi_ep_db_info - MHI Endpoint doorbell info
44 * @mask: Mask of the doorbell interrupt
45 * @status: Status of the doorbell interrupt
47 struct mhi_ep_db_info {
53 * struct mhi_ep_buf_info - MHI Endpoint transfer buffer info
54 * @dev_addr: Address of the buffer in endpoint
55 * @host_addr: Address of the bufffer in host
56 * @size: Size of the buffer
58 struct mhi_ep_buf_info {
65 * struct mhi_ep_cntrl - MHI Endpoint controller structure
66 * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI
68 * @mhi_dev: MHI Endpoint device instance for the controller
69 * @mmio: MMIO region containing the MHI registers
70 * @mhi_chan: Points to the channel configuration table
71 * @mhi_event: Points to the event ring configurations table
72 * @mhi_cmd: Points to the command ring configurations table
73 * @sm: MHI Endpoint state machine
74 * @ch_ctx_cache: Cache of host channel context data structure
75 * @ev_ctx_cache: Cache of host event context data structure
76 * @cmd_ctx_cache: Cache of host command context data structure
77 * @ch_ctx_host_pa: Physical address of host channel context data structure
78 * @ev_ctx_host_pa: Physical address of host event context data structure
79 * @cmd_ctx_host_pa: Physical address of host command context data structure
80 * @ch_ctx_cache_phys: Physical address of the host channel context cache
81 * @ev_ctx_cache_phys: Physical address of the host event context cache
82 * @cmd_ctx_cache_phys: Physical address of the host command context cache
83 * @chdb: Array of channel doorbell interrupt info
84 * @event_lock: Lock for protecting event rings
85 * @state_lock: Lock for protecting state transitions
86 * @list_lock: Lock for protecting state transition and channel doorbell lists
87 * @st_transition_list: List of state transitions
88 * @ch_db_list: List of queued channel doorbells
89 * @wq: Dedicated workqueue for handling rings and state changes
90 * @state_work: State transition worker
91 * @reset_work: Worker for MHI Endpoint reset
92 * @cmd_ring_work: Worker for processing command rings
93 * @ch_ring_work: Worker for processing channel rings
94 * @raise_irq: CB function for raising IRQ to the host
95 * @alloc_map: CB function for allocating memory in endpoint for storing host context and mapping it
96 * @unmap_free: CB function to unmap and free the allocated memory in endpoint for storing host context
97 * @read_from_host: CB function for reading from host memory from endpoint
98 * @write_to_host: CB function for writing to host memory from endpoint
99 * @mhi_state: MHI Endpoint state
100 * @max_chan: Maximum channels supported by the endpoint controller
101 * @mru: MRU (Maximum Receive Unit) value of the endpoint controller
102 * @event_rings: Number of event rings supported by the endpoint controller
103 * @hw_event_rings: Number of hardware event rings supported by the endpoint controller
104 * @chdb_offset: Channel doorbell offset set by the host
105 * @erdb_offset: Event ring doorbell offset set by the host
106 * @index: MHI Endpoint controller index
107 * @irq: IRQ used by the endpoint controller
108 * @enabled: Check if the endpoint controller is enabled or not
110 struct mhi_ep_cntrl {
111 struct device *cntrl_dev;
112 struct mhi_ep_device *mhi_dev;
115 struct mhi_ep_chan *mhi_chan;
116 struct mhi_ep_event *mhi_event;
117 struct mhi_ep_cmd *mhi_cmd;
118 struct mhi_ep_sm *sm;
120 struct mhi_chan_ctxt *ch_ctx_cache;
121 struct mhi_event_ctxt *ev_ctx_cache;
122 struct mhi_cmd_ctxt *cmd_ctx_cache;
126 phys_addr_t ch_ctx_cache_phys;
127 phys_addr_t ev_ctx_cache_phys;
128 phys_addr_t cmd_ctx_cache_phys;
130 struct mhi_ep_db_info chdb[4];
131 struct mutex event_lock;
132 struct mutex state_lock;
133 spinlock_t list_lock;
135 struct list_head st_transition_list;
136 struct list_head ch_db_list;
138 struct workqueue_struct *wq;
139 struct work_struct state_work;
140 struct work_struct reset_work;
141 struct work_struct cmd_ring_work;
142 struct work_struct ch_ring_work;
143 struct kmem_cache *ring_item_cache;
144 struct kmem_cache *ev_ring_el_cache;
145 struct kmem_cache *tre_buf_cache;
147 void (*raise_irq)(struct mhi_ep_cntrl *mhi_cntrl, u32 vector);
148 int (*alloc_map)(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, phys_addr_t *phys_ptr,
149 void __iomem **virt, size_t size);
150 void (*unmap_free)(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, phys_addr_t phys,
151 void __iomem *virt, size_t size);
152 int (*read_from_host)(struct mhi_ep_cntrl *mhi_cntrl, struct mhi_ep_buf_info *buf_info);
153 int (*write_to_host)(struct mhi_ep_cntrl *mhi_cntrl, struct mhi_ep_buf_info *buf_info);
155 enum mhi_state mhi_state;
169 * struct mhi_ep_device - Structure representing an MHI Endpoint device that binds
170 * to channels or is associated with controllers
171 * @dev: Driver model device node for the MHI Endpoint device
172 * @mhi_cntrl: Controller the device belongs to
173 * @id: Pointer to MHI Endpoint device ID struct
174 * @name: Name of the associated MHI Endpoint device
175 * @ul_chan: UL (from host to endpoint) channel for the device
176 * @dl_chan: DL (from endpoint to host) channel for the device
177 * @dev_type: MHI device type
179 struct mhi_ep_device {
181 struct mhi_ep_cntrl *mhi_cntrl;
182 const struct mhi_device_id *id;
184 struct mhi_ep_chan *ul_chan;
185 struct mhi_ep_chan *dl_chan;
186 enum mhi_device_type dev_type;
190 * struct mhi_ep_driver - Structure representing a MHI Endpoint client driver
191 * @id_table: Pointer to MHI Endpoint device ID table
192 * @driver: Device driver model driver
193 * @probe: CB function for client driver probe function
194 * @remove: CB function for client driver remove function
195 * @ul_xfer_cb: CB function for UL (from host to endpoint) data transfer
196 * @dl_xfer_cb: CB function for DL (from endpoint to host) data transfer
198 struct mhi_ep_driver {
199 const struct mhi_device_id *id_table;
200 struct device_driver driver;
201 int (*probe)(struct mhi_ep_device *mhi_ep,
202 const struct mhi_device_id *id);
203 void (*remove)(struct mhi_ep_device *mhi_ep);
204 void (*ul_xfer_cb)(struct mhi_ep_device *mhi_dev,
205 struct mhi_result *result);
206 void (*dl_xfer_cb)(struct mhi_ep_device *mhi_dev,
207 struct mhi_result *result);
210 #define to_mhi_ep_device(dev) container_of(dev, struct mhi_ep_device, dev)
211 #define to_mhi_ep_driver(drv) container_of(drv, struct mhi_ep_driver, driver)
214 * module_mhi_ep_driver() - Helper macro for drivers that don't do
215 * anything special other than using default mhi_ep_driver_register() and
216 * mhi_ep_driver_unregister(). This eliminates a lot of boilerplate.
217 * Each module may only use this macro once.
219 #define module_mhi_ep_driver(mhi_drv) \
220 module_driver(mhi_drv, mhi_ep_driver_register, \
221 mhi_ep_driver_unregister)
224 * Macro to avoid include chaining to get THIS_MODULE
226 #define mhi_ep_driver_register(mhi_drv) \
227 __mhi_ep_driver_register(mhi_drv, THIS_MODULE)
230 * __mhi_ep_driver_register - Register a driver with MHI Endpoint bus
231 * @mhi_drv: Driver to be associated with the device
232 * @owner: The module owner
234 * Return: 0 if driver registrations succeeds, a negative error code otherwise.
236 int __mhi_ep_driver_register(struct mhi_ep_driver *mhi_drv, struct module *owner);
239 * mhi_ep_driver_unregister - Unregister a driver from MHI Endpoint bus
240 * @mhi_drv: Driver associated with the device
242 void mhi_ep_driver_unregister(struct mhi_ep_driver *mhi_drv);
245 * mhi_ep_register_controller - Register MHI Endpoint controller
246 * @mhi_cntrl: MHI Endpoint controller to register
247 * @config: Configuration to use for the controller
249 * Return: 0 if controller registrations succeeds, a negative error code otherwise.
251 int mhi_ep_register_controller(struct mhi_ep_cntrl *mhi_cntrl,
252 const struct mhi_ep_cntrl_config *config);
255 * mhi_ep_unregister_controller - Unregister MHI Endpoint controller
256 * @mhi_cntrl: MHI Endpoint controller to unregister
258 void mhi_ep_unregister_controller(struct mhi_ep_cntrl *mhi_cntrl);
261 * mhi_ep_power_up - Power up the MHI endpoint stack
262 * @mhi_cntrl: MHI Endpoint controller
264 * Return: 0 if power up succeeds, a negative error code otherwise.
266 int mhi_ep_power_up(struct mhi_ep_cntrl *mhi_cntrl);
269 * mhi_ep_power_down - Power down the MHI endpoint stack
270 * @mhi_cntrl: MHI controller
272 void mhi_ep_power_down(struct mhi_ep_cntrl *mhi_cntrl);
275 * mhi_ep_queue_is_empty - Determine whether the transfer queue is empty
276 * @mhi_dev: Device associated with the channels
277 * @dir: DMA direction for the channel
279 * Return: true if the queue is empty, false otherwise.
281 bool mhi_ep_queue_is_empty(struct mhi_ep_device *mhi_dev, enum dma_data_direction dir);
284 * mhi_ep_queue_skb - Send SKBs to host over MHI Endpoint
285 * @mhi_dev: Device associated with the DL channel
286 * @skb: SKBs to be queued
288 * Return: 0 if the SKBs has been sent successfully, a negative error code otherwise.
290 int mhi_ep_queue_skb(struct mhi_ep_device *mhi_dev, struct sk_buff *skb);