1 #ifndef _LINUX_DMA_MAPPING_H
2 #define _LINUX_DMA_MAPPING_H
4 #include <linux/sizes.h>
5 #include <linux/string.h>
6 #include <linux/device.h>
8 #include <linux/dma-debug.h>
9 #include <linux/dma-direction.h>
10 #include <linux/scatterlist.h>
11 #include <linux/kmemcheck.h>
12 #include <linux/bug.h>
15 * List of possible attributes associated with a DMA mapping. The semantics
16 * of each attribute should be defined in Documentation/DMA-attributes.txt.
18 * DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute
19 * forces all pending DMA writes to complete.
21 #define DMA_ATTR_WRITE_BARRIER (1UL << 0)
23 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping
24 * may be weakly ordered, that is that reads and writes may pass each other.
26 #define DMA_ATTR_WEAK_ORDERING (1UL << 1)
28 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be
29 * buffered to improve performance.
31 #define DMA_ATTR_WRITE_COMBINE (1UL << 2)
33 * DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either
34 * consistent or non-consistent memory as it sees fit.
36 #define DMA_ATTR_NON_CONSISTENT (1UL << 3)
38 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel
39 * virtual mapping for the allocated buffer.
41 #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4)
43 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of
44 * the CPU cache for the given buffer assuming that it has been already
45 * transferred to 'device' domain.
47 #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5)
49 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer
52 #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6)
54 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem
55 * that it's probably not worth the time to try to allocate memory to in a way
56 * that gives better TLB efficiency.
58 #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7)
61 * A dma_addr_t can hold any valid DMA or bus address for the platform.
62 * It can be given to a device to use as a DMA source or target. A CPU cannot
63 * reference a dma_addr_t directly because there may be translation between
64 * its physical address space and the bus address space.
67 void* (*alloc)(struct device *dev, size_t size,
68 dma_addr_t *dma_handle, gfp_t gfp,
70 void (*free)(struct device *dev, size_t size,
71 void *vaddr, dma_addr_t dma_handle,
73 int (*mmap)(struct device *, struct vm_area_struct *,
74 void *, dma_addr_t, size_t,
77 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
78 dma_addr_t, size_t, unsigned long attrs);
80 dma_addr_t (*map_page)(struct device *dev, struct page *page,
81 unsigned long offset, size_t size,
82 enum dma_data_direction dir,
84 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
85 size_t size, enum dma_data_direction dir,
88 * map_sg returns 0 on error and a value > 0 on success.
89 * It should never return a value < 0.
91 int (*map_sg)(struct device *dev, struct scatterlist *sg,
92 int nents, enum dma_data_direction dir,
94 void (*unmap_sg)(struct device *dev,
95 struct scatterlist *sg, int nents,
96 enum dma_data_direction dir,
98 void (*sync_single_for_cpu)(struct device *dev,
99 dma_addr_t dma_handle, size_t size,
100 enum dma_data_direction dir);
101 void (*sync_single_for_device)(struct device *dev,
102 dma_addr_t dma_handle, size_t size,
103 enum dma_data_direction dir);
104 void (*sync_sg_for_cpu)(struct device *dev,
105 struct scatterlist *sg, int nents,
106 enum dma_data_direction dir);
107 void (*sync_sg_for_device)(struct device *dev,
108 struct scatterlist *sg, int nents,
109 enum dma_data_direction dir);
110 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
111 int (*dma_supported)(struct device *dev, u64 mask);
112 int (*set_dma_mask)(struct device *dev, u64 mask);
113 #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
114 u64 (*get_required_mask)(struct device *dev);
119 extern struct dma_map_ops dma_noop_ops;
121 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
123 #define DMA_MASK_NONE 0x0ULL
125 static inline int valid_dma_direction(int dma_direction)
127 return ((dma_direction == DMA_BIDIRECTIONAL) ||
128 (dma_direction == DMA_TO_DEVICE) ||
129 (dma_direction == DMA_FROM_DEVICE));
132 static inline int is_device_dma_capable(struct device *dev)
134 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
137 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
139 * These three functions are only for dma allocator.
140 * Don't use them in device drivers.
142 int dma_alloc_from_coherent(struct device *dev, ssize_t size,
143 dma_addr_t *dma_handle, void **ret);
144 int dma_release_from_coherent(struct device *dev, int order, void *vaddr);
146 int dma_mmap_from_coherent(struct device *dev, struct vm_area_struct *vma,
147 void *cpu_addr, size_t size, int *ret);
149 #define dma_alloc_from_coherent(dev, size, handle, ret) (0)
150 #define dma_release_from_coherent(dev, order, vaddr) (0)
151 #define dma_mmap_from_coherent(dev, vma, vaddr, order, ret) (0)
152 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
154 #ifdef CONFIG_HAS_DMA
155 #include <asm/dma-mapping.h>
158 * Define the dma api to allow compilation but not linking of
159 * dma dependent code. Code that depends on the dma-mapping
160 * API needs to set 'depends on HAS_DMA' in its Kconfig
162 extern struct dma_map_ops bad_dma_ops;
163 static inline struct dma_map_ops *get_dma_ops(struct device *dev)
169 static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
171 enum dma_data_direction dir,
174 struct dma_map_ops *ops = get_dma_ops(dev);
177 kmemcheck_mark_initialized(ptr, size);
178 BUG_ON(!valid_dma_direction(dir));
179 addr = ops->map_page(dev, virt_to_page(ptr),
180 offset_in_page(ptr), size,
182 debug_dma_map_page(dev, virt_to_page(ptr),
183 offset_in_page(ptr), size,
188 static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
190 enum dma_data_direction dir,
193 struct dma_map_ops *ops = get_dma_ops(dev);
195 BUG_ON(!valid_dma_direction(dir));
197 ops->unmap_page(dev, addr, size, dir, attrs);
198 debug_dma_unmap_page(dev, addr, size, dir, true);
202 * dma_maps_sg_attrs returns 0 on error and > 0 on success.
203 * It should never return a value < 0.
205 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
206 int nents, enum dma_data_direction dir,
209 struct dma_map_ops *ops = get_dma_ops(dev);
211 struct scatterlist *s;
213 for_each_sg(sg, s, nents, i)
214 kmemcheck_mark_initialized(sg_virt(s), s->length);
215 BUG_ON(!valid_dma_direction(dir));
216 ents = ops->map_sg(dev, sg, nents, dir, attrs);
218 debug_dma_map_sg(dev, sg, nents, ents, dir);
223 static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
224 int nents, enum dma_data_direction dir,
227 struct dma_map_ops *ops = get_dma_ops(dev);
229 BUG_ON(!valid_dma_direction(dir));
230 debug_dma_unmap_sg(dev, sg, nents, dir);
232 ops->unmap_sg(dev, sg, nents, dir, attrs);
235 static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
236 size_t offset, size_t size,
237 enum dma_data_direction dir)
239 struct dma_map_ops *ops = get_dma_ops(dev);
242 kmemcheck_mark_initialized(page_address(page) + offset, size);
243 BUG_ON(!valid_dma_direction(dir));
244 addr = ops->map_page(dev, page, offset, size, dir, 0);
245 debug_dma_map_page(dev, page, offset, size, dir, addr, false);
250 static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
251 size_t size, enum dma_data_direction dir)
253 struct dma_map_ops *ops = get_dma_ops(dev);
255 BUG_ON(!valid_dma_direction(dir));
257 ops->unmap_page(dev, addr, size, dir, 0);
258 debug_dma_unmap_page(dev, addr, size, dir, false);
261 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
263 enum dma_data_direction dir)
265 struct dma_map_ops *ops = get_dma_ops(dev);
267 BUG_ON(!valid_dma_direction(dir));
268 if (ops->sync_single_for_cpu)
269 ops->sync_single_for_cpu(dev, addr, size, dir);
270 debug_dma_sync_single_for_cpu(dev, addr, size, dir);
273 static inline void dma_sync_single_for_device(struct device *dev,
274 dma_addr_t addr, size_t size,
275 enum dma_data_direction dir)
277 struct dma_map_ops *ops = get_dma_ops(dev);
279 BUG_ON(!valid_dma_direction(dir));
280 if (ops->sync_single_for_device)
281 ops->sync_single_for_device(dev, addr, size, dir);
282 debug_dma_sync_single_for_device(dev, addr, size, dir);
285 static inline void dma_sync_single_range_for_cpu(struct device *dev,
287 unsigned long offset,
289 enum dma_data_direction dir)
291 const struct dma_map_ops *ops = get_dma_ops(dev);
293 BUG_ON(!valid_dma_direction(dir));
294 if (ops->sync_single_for_cpu)
295 ops->sync_single_for_cpu(dev, addr + offset, size, dir);
296 debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir);
299 static inline void dma_sync_single_range_for_device(struct device *dev,
301 unsigned long offset,
303 enum dma_data_direction dir)
305 const struct dma_map_ops *ops = get_dma_ops(dev);
307 BUG_ON(!valid_dma_direction(dir));
308 if (ops->sync_single_for_device)
309 ops->sync_single_for_device(dev, addr + offset, size, dir);
310 debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir);
314 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
315 int nelems, enum dma_data_direction dir)
317 struct dma_map_ops *ops = get_dma_ops(dev);
319 BUG_ON(!valid_dma_direction(dir));
320 if (ops->sync_sg_for_cpu)
321 ops->sync_sg_for_cpu(dev, sg, nelems, dir);
322 debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
326 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
327 int nelems, enum dma_data_direction dir)
329 struct dma_map_ops *ops = get_dma_ops(dev);
331 BUG_ON(!valid_dma_direction(dir));
332 if (ops->sync_sg_for_device)
333 ops->sync_sg_for_device(dev, sg, nelems, dir);
334 debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
338 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0)
339 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0)
340 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0)
341 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0)
343 extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
344 void *cpu_addr, dma_addr_t dma_addr, size_t size);
346 void *dma_common_contiguous_remap(struct page *page, size_t size,
347 unsigned long vm_flags,
348 pgprot_t prot, const void *caller);
350 void *dma_common_pages_remap(struct page **pages, size_t size,
351 unsigned long vm_flags, pgprot_t prot,
353 void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags);
356 * dma_mmap_attrs - map a coherent DMA allocation into user space
357 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
358 * @vma: vm_area_struct describing requested user mapping
359 * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
360 * @handle: device-view address returned from dma_alloc_attrs
361 * @size: size of memory originally requested in dma_alloc_attrs
362 * @attrs: attributes of mapping properties requested in dma_alloc_attrs
364 * Map a coherent DMA buffer previously allocated by dma_alloc_attrs
365 * into user space. The coherent DMA buffer must not be freed by the
366 * driver until the user space mapping has been released.
369 dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr,
370 dma_addr_t dma_addr, size_t size, unsigned long attrs)
372 struct dma_map_ops *ops = get_dma_ops(dev);
375 return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
376 return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size);
379 #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0)
382 dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
383 void *cpu_addr, dma_addr_t dma_addr, size_t size);
386 dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr,
387 dma_addr_t dma_addr, size_t size,
390 struct dma_map_ops *ops = get_dma_ops(dev);
392 if (ops->get_sgtable)
393 return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
395 return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size);
398 #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0)
400 #ifndef arch_dma_alloc_attrs
401 #define arch_dma_alloc_attrs(dev, flag) (true)
404 static inline void *dma_alloc_attrs(struct device *dev, size_t size,
405 dma_addr_t *dma_handle, gfp_t flag,
408 struct dma_map_ops *ops = get_dma_ops(dev);
413 if (dma_alloc_from_coherent(dev, size, dma_handle, &cpu_addr))
416 if (!arch_dma_alloc_attrs(&dev, &flag))
421 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
422 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
426 static inline void dma_free_attrs(struct device *dev, size_t size,
427 void *cpu_addr, dma_addr_t dma_handle,
430 struct dma_map_ops *ops = get_dma_ops(dev);
433 WARN_ON(irqs_disabled());
435 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
438 if (!ops->free || !cpu_addr)
441 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
442 ops->free(dev, size, cpu_addr, dma_handle, attrs);
445 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
446 dma_addr_t *dma_handle, gfp_t flag)
448 return dma_alloc_attrs(dev, size, dma_handle, flag, 0);
451 static inline void dma_free_coherent(struct device *dev, size_t size,
452 void *cpu_addr, dma_addr_t dma_handle)
454 return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0);
457 static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
458 dma_addr_t *dma_handle, gfp_t gfp)
460 return dma_alloc_attrs(dev, size, dma_handle, gfp,
461 DMA_ATTR_NON_CONSISTENT);
464 static inline void dma_free_noncoherent(struct device *dev, size_t size,
465 void *cpu_addr, dma_addr_t dma_handle)
467 dma_free_attrs(dev, size, cpu_addr, dma_handle,
468 DMA_ATTR_NON_CONSISTENT);
471 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
473 debug_dma_mapping_error(dev, dma_addr);
475 if (get_dma_ops(dev)->mapping_error)
476 return get_dma_ops(dev)->mapping_error(dev, dma_addr);
478 #ifdef DMA_ERROR_CODE
479 return dma_addr == DMA_ERROR_CODE;
485 #ifndef HAVE_ARCH_DMA_SUPPORTED
486 static inline int dma_supported(struct device *dev, u64 mask)
488 struct dma_map_ops *ops = get_dma_ops(dev);
492 if (!ops->dma_supported)
494 return ops->dma_supported(dev, mask);
498 #ifndef HAVE_ARCH_DMA_SET_MASK
499 static inline int dma_set_mask(struct device *dev, u64 mask)
501 struct dma_map_ops *ops = get_dma_ops(dev);
503 if (ops->set_dma_mask)
504 return ops->set_dma_mask(dev, mask);
506 if (!dev->dma_mask || !dma_supported(dev, mask))
508 *dev->dma_mask = mask;
513 static inline u64 dma_get_mask(struct device *dev)
515 if (dev && dev->dma_mask && *dev->dma_mask)
516 return *dev->dma_mask;
517 return DMA_BIT_MASK(32);
520 #ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
521 int dma_set_coherent_mask(struct device *dev, u64 mask);
523 static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
525 if (!dma_supported(dev, mask))
527 dev->coherent_dma_mask = mask;
533 * Set both the DMA mask and the coherent DMA mask to the same thing.
534 * Note that we don't check the return value from dma_set_coherent_mask()
535 * as the DMA API guarantees that the coherent DMA mask can be set to
536 * the same or smaller than the streaming DMA mask.
538 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
540 int rc = dma_set_mask(dev, mask);
542 dma_set_coherent_mask(dev, mask);
547 * Similar to the above, except it deals with the case where the device
548 * does not have dev->dma_mask appropriately setup.
550 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
552 dev->dma_mask = &dev->coherent_dma_mask;
553 return dma_set_mask_and_coherent(dev, mask);
556 extern u64 dma_get_required_mask(struct device *dev);
558 #ifndef arch_setup_dma_ops
559 static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
560 u64 size, const struct iommu_ops *iommu,
564 #ifndef arch_teardown_dma_ops
565 static inline void arch_teardown_dma_ops(struct device *dev) { }
568 static inline unsigned int dma_get_max_seg_size(struct device *dev)
570 if (dev->dma_parms && dev->dma_parms->max_segment_size)
571 return dev->dma_parms->max_segment_size;
575 static inline unsigned int dma_set_max_seg_size(struct device *dev,
578 if (dev->dma_parms) {
579 dev->dma_parms->max_segment_size = size;
585 static inline unsigned long dma_get_seg_boundary(struct device *dev)
587 if (dev->dma_parms && dev->dma_parms->segment_boundary_mask)
588 return dev->dma_parms->segment_boundary_mask;
589 return DMA_BIT_MASK(32);
592 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
594 if (dev->dma_parms) {
595 dev->dma_parms->segment_boundary_mask = mask;
602 static inline unsigned long dma_max_pfn(struct device *dev)
604 return *dev->dma_mask >> PAGE_SHIFT;
608 static inline void *dma_zalloc_coherent(struct device *dev, size_t size,
609 dma_addr_t *dma_handle, gfp_t flag)
611 void *ret = dma_alloc_coherent(dev, size, dma_handle,
616 #ifdef CONFIG_HAS_DMA
617 static inline int dma_get_cache_alignment(void)
619 #ifdef ARCH_DMA_MINALIGN
620 return ARCH_DMA_MINALIGN;
626 /* flags for the coherent memory api */
627 #define DMA_MEMORY_MAP 0x01
628 #define DMA_MEMORY_IO 0x02
629 #define DMA_MEMORY_INCLUDES_CHILDREN 0x04
630 #define DMA_MEMORY_EXCLUSIVE 0x08
632 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
633 int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
634 dma_addr_t device_addr, size_t size, int flags);
635 void dma_release_declared_memory(struct device *dev);
636 void *dma_mark_declared_memory_occupied(struct device *dev,
637 dma_addr_t device_addr, size_t size);
640 dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
641 dma_addr_t device_addr, size_t size, int flags)
647 dma_release_declared_memory(struct device *dev)
652 dma_mark_declared_memory_occupied(struct device *dev,
653 dma_addr_t device_addr, size_t size)
655 return ERR_PTR(-EBUSY);
657 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
662 extern void *dmam_alloc_coherent(struct device *dev, size_t size,
663 dma_addr_t *dma_handle, gfp_t gfp);
664 extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
665 dma_addr_t dma_handle);
666 extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
667 dma_addr_t *dma_handle, gfp_t gfp);
668 extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
669 dma_addr_t dma_handle);
670 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
671 extern int dmam_declare_coherent_memory(struct device *dev,
672 phys_addr_t phys_addr,
673 dma_addr_t device_addr, size_t size,
675 extern void dmam_release_declared_memory(struct device *dev);
676 #else /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
677 static inline int dmam_declare_coherent_memory(struct device *dev,
678 phys_addr_t phys_addr, dma_addr_t device_addr,
679 size_t size, gfp_t gfp)
684 static inline void dmam_release_declared_memory(struct device *dev)
687 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
689 static inline void *dma_alloc_wc(struct device *dev, size_t size,
690 dma_addr_t *dma_addr, gfp_t gfp)
692 return dma_alloc_attrs(dev, size, dma_addr, gfp,
693 DMA_ATTR_WRITE_COMBINE);
695 #ifndef dma_alloc_writecombine
696 #define dma_alloc_writecombine dma_alloc_wc
699 static inline void dma_free_wc(struct device *dev, size_t size,
700 void *cpu_addr, dma_addr_t dma_addr)
702 return dma_free_attrs(dev, size, cpu_addr, dma_addr,
703 DMA_ATTR_WRITE_COMBINE);
705 #ifndef dma_free_writecombine
706 #define dma_free_writecombine dma_free_wc
709 static inline int dma_mmap_wc(struct device *dev,
710 struct vm_area_struct *vma,
711 void *cpu_addr, dma_addr_t dma_addr,
714 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size,
715 DMA_ATTR_WRITE_COMBINE);
717 #ifndef dma_mmap_writecombine
718 #define dma_mmap_writecombine dma_mmap_wc
721 #ifdef CONFIG_NEED_DMA_MAP_STATE
722 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
723 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
724 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
725 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
726 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
727 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
729 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
730 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
731 #define dma_unmap_addr(PTR, ADDR_NAME) (0)
732 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
733 #define dma_unmap_len(PTR, LEN_NAME) (0)
734 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)