1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2015, Linaro Limited
5 #ifndef __LINUX_ARM_SMCCC_H
6 #define __LINUX_ARM_SMCCC_H
9 * This file provides common defines for ARM SMC Calling Convention as
11 * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
14 #define ARM_SMCCC_STD_CALL 0UL
15 #define ARM_SMCCC_FAST_CALL 1UL
16 #define ARM_SMCCC_TYPE_SHIFT 31
18 #define ARM_SMCCC_SMC_32 0
19 #define ARM_SMCCC_SMC_64 1
20 #define ARM_SMCCC_CALL_CONV_SHIFT 30
22 #define ARM_SMCCC_OWNER_MASK 0x3F
23 #define ARM_SMCCC_OWNER_SHIFT 24
25 #define ARM_SMCCC_FUNC_MASK 0xFFFF
27 #define ARM_SMCCC_IS_FAST_CALL(smc_val) \
28 ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
29 #define ARM_SMCCC_IS_64(smc_val) \
30 ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
31 #define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK)
32 #define ARM_SMCCC_OWNER_NUM(smc_val) \
33 (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
35 #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
36 (((type) << ARM_SMCCC_TYPE_SHIFT) | \
37 ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
38 (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
39 ((func_num) & ARM_SMCCC_FUNC_MASK))
41 #define ARM_SMCCC_OWNER_ARCH 0
42 #define ARM_SMCCC_OWNER_CPU 1
43 #define ARM_SMCCC_OWNER_SIP 2
44 #define ARM_SMCCC_OWNER_OEM 3
45 #define ARM_SMCCC_OWNER_STANDARD 4
46 #define ARM_SMCCC_OWNER_TRUSTED_APP 48
47 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
48 #define ARM_SMCCC_OWNER_TRUSTED_OS 50
49 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63
51 #define ARM_SMCCC_QUIRK_NONE 0
52 #define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */
54 #define ARM_SMCCC_ARCH_FEATURES 0x80000001
56 #define ARM_SMCCC_RET_NOT_SUPPORTED ((unsigned long)-1)
60 #include <linux/linkage.h>
61 #include <linux/types.h>
63 * struct arm_smccc_res - Result from SMC/HVC call
64 * @a0-a3 result values from registers 0 to 3
66 struct arm_smccc_res {
74 * struct arm_smccc_quirk - Contains quirk information
75 * @id: quirk identification
76 * @state: quirk specific information
77 * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
79 struct arm_smccc_quirk {
87 * struct arm_smccc_feature - Driver registration data for discoverable feature
88 * @driver_name: name of the driver relate to the SMCCC feature
89 * @is_supported: callback to test if SMCCC feature is supported
91 struct arm_smccc_feature {
92 const char *driver_name;
93 bool (*is_supported)(void (*invoke_fn)(unsigned long a0, unsigned long a1, unsigned long a2,
94 unsigned long a3, unsigned long a4, unsigned long a5,
95 unsigned long a6, unsigned long a7,
96 struct arm_smccc_res *res));
99 #define ARM_SMCCC_FEATURE_DRIVER(__name) \
100 ll_entry_declare(struct arm_smccc_feature, __name, arm_smccc_feature)
103 * __arm_smccc_smc() - make SMC calls
104 * @a0-a7: arguments passed in registers 0 to 7
105 * @res: result values from registers 0 to 3
106 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
108 * This function is used to make SMC calls following SMC Calling Convention.
109 * The content of the supplied param are copied to registers 0 to 7 prior
110 * to the SMC instruction. The return values are updated with the content
111 * from register 0 to 3 on return from the SMC instruction. An optional
112 * quirk structure provides vendor specific behavior.
114 asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
115 unsigned long a2, unsigned long a3, unsigned long a4,
116 unsigned long a5, unsigned long a6, unsigned long a7,
117 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
120 * __arm_smccc_hvc() - make HVC calls
121 * @a0-a7: arguments passed in registers 0 to 7
122 * @res: result values from registers 0 to 3
123 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
125 * This function is used to make HVC calls following SMC Calling
126 * Convention. The content of the supplied param are copied to registers 0
127 * to 7 prior to the HVC instruction. The return values are updated with
128 * the content from register 0 to 3 on return from the HVC instruction. An
129 * optional quirk structure provides vendor specific behavior.
131 asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
132 unsigned long a2, unsigned long a3, unsigned long a4,
133 unsigned long a5, unsigned long a6, unsigned long a7,
134 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
136 #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
138 #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
140 #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL)
142 #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__)
144 #endif /*__ASSEMBLY__*/
145 #endif /*__LINUX_ARM_SMCCC_H*/