2 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
4 * Changes for multibus/multiadapter I2C support.
7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
9 * SPDX-License-Identifier: GPL-2.0+
11 * The original I2C interface was
12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
13 * AIRVENT SAM s.p.a - RIMINI(ITALY)
14 * but has been changed substantially.
21 * For now there are essentially two parts to this file - driver model
22 * here at the top, and the older code below (with CONFIG_SYS_I2C being
23 * most recent). The plan is to migrate everything to driver model.
24 * The driver model structures and API are separate as they are different
25 * enough as to be incompatible for compilation purposes.
28 enum dm_i2c_chip_flags {
29 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
30 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
31 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
36 * struct dm_i2c_chip - information about an i2c chip
38 * An I2C chip is a device on the I2C bus. It sits at a particular address
39 * and normally supports 7-bit or 10-bit addressing.
41 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
42 * the chip to examine.
44 * @chip_addr: Chip address on bus
45 * @offset_len: Length of offset in bytes. A single byte offset can
46 * represent up to 256 bytes. A value larger than 1 may be
47 * needed for larger devices.
48 * @flags: Flags for this chip (dm_i2c_chip_flags)
49 * @emul: Emulator for this chip address (only used for emulation)
61 * struct dm_i2c_bus- information about an i2c bus
63 * An I2C bus contains 0 or more chips on it, each at its own address. The
64 * bus can operate at different speeds (measured in Hz, typically 100KHz
67 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
70 * @speed_hz: Bus speed in hertz (typically 100000)
77 * dm_i2c_read() - read bytes from an I2C chip
79 * To obtain an I2C device (called a 'chip') given the I2C bus address you
80 * can use i2c_get_chip(). To obtain a bus by bus number use
81 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
83 * To set the address length of a devce use i2c_set_addr_len(). It
86 * @dev: Chip to read from
87 * @offset: Offset within chip to start reading
88 * @buffer: Place to put data
89 * @len: Number of bytes to read
91 * @return 0 on success, -ve on failure
93 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
96 * dm_i2c_write() - write bytes to an I2C chip
98 * See notes for dm_i2c_read() above.
100 * @dev: Chip to write to
101 * @offset: Offset within chip to start writing
102 * @buffer: Buffer containing data to write
103 * @len: Number of bytes to write
105 * @return 0 on success, -ve on failure
107 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
111 * dm_i2c_probe() - probe a particular chip address
113 * This can be useful to check for the existence of a chip on the bus.
114 * It is typically implemented by writing the chip address to the bus
115 * and checking that the chip replies with an ACK.
118 * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
119 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
120 * @devp: Returns the device found, or NULL if none
121 * @return 0 if a chip was found at that address, -ve if not
123 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
124 struct udevice **devp);
127 * dm_i2c_reg_read() - Read a value from an I2C register
129 * This reads a single value from the given address in an I2C chip
131 * @addr: Address to read from
132 * @return value read, or -ve on error
134 int dm_i2c_reg_read(struct udevice *dev, uint offset);
137 * dm_i2c_reg_write() - Write a value to an I2C register
139 * This writes a single value to the given address in an I2C chip
141 * @addr: Address to write to
142 * @val: Value to write (normally a byte)
143 * @return 0 on success, -ve on error
145 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
148 * dm_i2c_set_bus_speed() - set the speed of a bus
150 * @bus: Bus to adjust
151 * @speed: Requested speed in Hz
152 * @return 0 if OK, -EINVAL for invalid values
154 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
157 * dm_i2c_get_bus_speed() - get the speed of a bus
160 * @return speed of selected I2C bus in Hz, -ve on error
162 int dm_i2c_get_bus_speed(struct udevice *bus);
165 * i2c_set_chip_flags() - set flags for a chip
167 * Typically addresses are 7 bits, but for 10-bit addresses you should set
168 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
170 * @dev: Chip to adjust
172 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
174 int i2c_set_chip_flags(struct udevice *dev, uint flags);
177 * i2c_get_chip_flags() - get flags for a chip
179 * @dev: Chip to check
180 * @flagsp: Place to put flags
181 * @return 0 if OK, other -ve value on error
183 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
186 * i2c_set_offset_len() - set the offset length for a chip
188 * The offset used to access a chip may be up to 4 bytes long. Typically it
189 * is only 1 byte, which is enough for chips with 256 bytes of memory or
190 * registers. The default value is 1, but you can call this function to
193 * @offset_len: New offset length value (typically 1 or 2)
196 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
198 * i2c_deblock() - recover a bus that is in an unknown state
200 * See the deblock() method in 'struct dm_i2c_ops' for full information
202 * @bus: Bus to recover
203 * @return 0 if OK, -ve on error
205 int i2c_deblock(struct udevice *bus);
207 #ifdef CONFIG_DM_I2C_COMPAT
209 * i2c_probe() - Compatibility function for driver model
211 * Calls dm_i2c_probe() on the current bus
213 int i2c_probe(uint8_t chip_addr);
216 * i2c_read() - Compatibility function for driver model
218 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
219 * set to @addr. @alen must match the current setting for the device.
221 int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
225 * i2c_write() - Compatibility function for driver model
227 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
228 * set to @addr. @alen must match the current setting for the device.
230 int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
234 * i2c_get_bus_num_fdt() - Compatibility function for driver model
236 * @return the bus number associated with the given device tree node
238 int i2c_get_bus_num_fdt(int node);
241 * i2c_get_bus_num() - Compatibility function for driver model
243 * @return the 'current' bus number
245 unsigned int i2c_get_bus_num(void);
248 * i2c_set_bus_num() - Compatibility function for driver model
250 * Sets the 'current' bus
252 int i2c_set_bus_num(unsigned int bus);
254 static inline void I2C_SET_BUS(unsigned int bus)
256 i2c_set_bus_num(bus);
259 static inline unsigned int I2C_GET_BUS(void)
261 return i2c_get_bus_num();
265 * i2c_init() - Compatibility function for driver model
267 * This function does nothing.
269 void i2c_init(int speed, int slaveaddr);
272 * board_i2c_init() - Compatibility function for driver model
274 * @param blob Device tree blbo
275 * @return the number of I2C bus
277 void board_i2c_init(const void *blob);
282 * Not all of these flags are implemented in the U-Boot API
284 enum dm_i2c_msg_flags {
285 I2C_M_TEN = 0x0010, /* ten-bit chip address */
286 I2C_M_RD = 0x0001, /* read data, from slave to master */
287 I2C_M_STOP = 0x8000, /* send stop after this message */
288 I2C_M_NOSTART = 0x4000, /* no start before this message */
289 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
290 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
291 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
292 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
296 * struct i2c_msg - an I2C message
298 * @addr: Slave address
299 * @flags: Flags (see enum dm_i2c_msg_flags)
300 * @len: Length of buffer in bytes, may be 0 for a probe
301 * @buf: Buffer to send/receive, or NULL if no data
311 * struct i2c_msg_list - a list of I2C messages
313 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
314 * appropriate in U-Boot.
316 * @msg: Pointer to i2c_msg array
317 * @nmsgs: Number of elements in the array
319 struct i2c_msg_list {
320 struct i2c_msg *msgs;
325 * struct dm_i2c_ops - driver operations for I2C uclass
327 * Drivers should support these operations unless otherwise noted. These
328 * operations are intended to be used by uclass code, not directly from
333 * xfer() - transfer a list of I2C messages
335 * @bus: Bus to read from
336 * @msg: List of messages to transfer
337 * @nmsgs: Number of messages in the list
338 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
339 * -ECOMM if the speed cannot be supported, -EPROTO if the chip
340 * flags cannot be supported, other -ve value on some other error
342 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
345 * probe_chip() - probe for the presense of a chip address
347 * This function is optional. If omitted, the uclass will send a zero
348 * length message instead.
351 * @chip_addr: Chip address to probe
352 * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
353 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
354 * to default probem other -ve value on error
356 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
359 * set_bus_speed() - set the speed of a bus (optional)
361 * The bus speed value will be updated by the uclass if this function
362 * does not return an error. This method is optional - if it is not
363 * provided then the driver can read the speed from
364 * dev_get_uclass_priv(bus)->speed_hz
366 * @bus: Bus to adjust
367 * @speed: Requested speed in Hz
368 * @return 0 if OK, -EINVAL for invalid values
370 int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
373 * get_bus_speed() - get the speed of a bus (optional)
375 * Normally this can be provided by the uclass, but if you want your
376 * driver to check the bus speed by looking at the hardware, you can
377 * implement that here. This method is optional. This method would
378 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
381 * @return speed of selected I2C bus in Hz, -ve on error
383 int (*get_bus_speed)(struct udevice *bus);
386 * set_flags() - set the flags for a chip (optional)
388 * This is generally implemented by the uclass, but drivers can
389 * check the value to ensure that unsupported options are not used.
390 * This method is optional. If provided, this method will always be
391 * called when the flags change.
393 * @dev: Chip to adjust
394 * @flags: New flags value
395 * @return 0 if OK, -EINVAL if value is unsupported
397 int (*set_flags)(struct udevice *dev, uint flags);
400 * deblock() - recover a bus that is in an unknown state
402 * I2C is a synchronous protocol and resets of the processor in the
403 * middle of an access can block the I2C Bus until a powerdown of
404 * the full unit is done. This is because slaves can be stuck
405 * waiting for addition bus transitions for a transaction that will
406 * never complete. Resetting the I2C master does not help. The only
407 * way is to force the bus through a series of transitions to make
408 * sure that all slaves are done with the transaction. This method
409 * performs this 'deblocking' if support by the driver.
411 * This method is optional.
413 int (*deblock)(struct udevice *bus);
416 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
419 * i2c_get_chip() - get a device to use to access a chip on a bus
421 * This returns the device for the given chip address. The device can then
422 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
424 * @bus: Bus to examine
425 * @chip_addr: Chip address for the new device
426 * @offset_len: Length of a register offset in bytes (normally 1)
427 * @devp: Returns pointer to new device if found or -ENODEV if not
430 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
431 struct udevice **devp);
434 * i2c_get_chip() - get a device to use to access a chip on a bus number
436 * This returns the device for the given chip address on a particular bus
439 * @busnum: Bus number to examine
440 * @chip_addr: Chip address for the new device
441 * @offset_len: Length of a register offset in bytes (normally 1)
442 * @devp: Returns pointer to new device if found or -ENODEV if not
445 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
446 struct udevice **devp);
449 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
451 * This decodes the chip address from a device tree node and puts it into
452 * its dm_i2c_chip structure. This should be called in your driver's
453 * ofdata_to_platdata() method.
455 * @blob: Device tree blob
456 * @node: Node offset to read from
457 * @spi: Place to put the decoded information
459 int i2c_chip_ofdata_to_platdata(const void *blob, int node,
460 struct dm_i2c_chip *chip);
462 #ifndef CONFIG_DM_I2C
465 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
467 * The implementation MUST NOT use static or global variables if the
468 * I2C routines are used to read SDRAM configuration information
469 * because this is done before the memories are initialized. Limited
470 * use of stack-based variables are OK (the initial stack size is
473 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
477 * Configuration items.
479 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
481 #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
482 /* no muxes used bus = i2c adapters */
483 #define CONFIG_SYS_I2C_DIRECT_BUS 1
484 #define CONFIG_SYS_I2C_MAX_HOPS 0
485 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
487 /* we use i2c muxes */
488 #undef CONFIG_SYS_I2C_DIRECT_BUS
491 /* define the I2C bus number for RTC and DTT if not already done */
492 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
493 #define CONFIG_SYS_RTC_BUS_NUM 0
495 #if !defined(CONFIG_SYS_DTT_BUS_NUM)
496 #define CONFIG_SYS_DTT_BUS_NUM 0
498 #if !defined(CONFIG_SYS_SPD_BUS_NUM)
499 #define CONFIG_SYS_SPD_BUS_NUM 0
503 void (*init)(struct i2c_adapter *adap, int speed,
505 int (*probe)(struct i2c_adapter *adap, uint8_t chip);
506 int (*read)(struct i2c_adapter *adap, uint8_t chip,
507 uint addr, int alen, uint8_t *buffer,
509 int (*write)(struct i2c_adapter *adap, uint8_t chip,
510 uint addr, int alen, uint8_t *buffer,
512 uint (*set_bus_speed)(struct i2c_adapter *adap,
522 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
523 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
529 .set_bus_speed = _set_speed, \
531 .slaveaddr = _slaveaddr, \
533 .hwadapnr = _hwadapnr, \
537 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
538 _set_speed, _speed, _slaveaddr, _hwadapnr) \
539 ll_entry_declare(struct i2c_adapter, _name, i2c) = \
540 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
541 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
543 struct i2c_adapter *i2c_get_adapter(int index);
545 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
551 struct i2c_next_hop {
557 struct i2c_bus_hose {
559 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
561 #define I2C_NULL_HOP {{-1, ""}, 0, 0}
562 extern struct i2c_bus_hose i2c_bus[];
564 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
566 #define I2C_ADAPTER(bus) bus
568 #define I2C_BUS gd->cur_i2c_bus
570 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
571 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
572 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
574 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
575 #define I2C_MUX_PCA9540_ID 1
576 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
577 #define I2C_MUX_PCA9542_ID 2
578 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
579 #define I2C_MUX_PCA9544_ID 3
580 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
581 #define I2C_MUX_PCA9547_ID 4
582 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
583 #define I2C_MUX_PCA9548_ID 5
584 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
587 #ifndef I2C_SOFT_DECLARATIONS
588 # if defined(CONFIG_MPC8260)
589 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
590 # elif defined(CONFIG_8xx)
591 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
593 # elif (defined(CONFIG_AT91RM9200) || \
594 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
595 defined(CONFIG_AT91SAM9263))
596 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
598 # define I2C_SOFT_DECLARATIONS
603 /* Set default value for the I2C bus speed on 8xx. In the
604 * future, we'll define these in all 8xx board config files.
606 #ifndef CONFIG_SYS_I2C_SPEED
607 #define CONFIG_SYS_I2C_SPEED 50000
612 * Many boards/controllers/drivers don't support an I2C slave interface so
613 * provide a default slave address for them for use in common code. A real
614 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
615 * support a slave interface.
617 #ifndef CONFIG_SYS_I2C_SLAVE
618 #define CONFIG_SYS_I2C_SLAVE 0xfe
622 * Initialization, must be called once on start up, may be called
623 * repeatedly to change the speed and slave addresses.
625 void i2c_init(int speed, int slaveaddr);
626 void i2c_init_board(void);
627 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
628 void i2c_board_late_init(void);
631 #ifdef CONFIG_SYS_I2C
635 * Returns index of currently active I2C bus. Zero-based.
637 unsigned int i2c_get_bus_num(void);
642 * Change the active I2C bus. Subsequent read/write calls will
645 * bus - bus index, zero based
647 * Returns: 0 on success, not 0 on failure
650 int i2c_set_bus_num(unsigned int bus);
655 * Initializes all I2C adapters in the system. All i2c_adap structures must
656 * be initialized beforehead with function pointers and data, including
657 * speed and slaveaddr. Returns 0 on success, non-0 on failure.
659 void i2c_init_all(void);
662 * Probe the given I2C chip address. Returns 0 if a chip responded,
665 int i2c_probe(uint8_t chip);
668 * Read/Write interface:
669 * chip: I2C chip address, range 0..127
670 * addr: Memory (register) address within the chip
671 * alen: Number of bytes to use for addr (typically 1, 2 for larger
672 * memories, 0 for register type devices with only one
674 * buffer: Where to read/write the data
675 * len: How many bytes to read/write
677 * Returns: 0 on success, not 0 on failure
679 int i2c_read(uint8_t chip, unsigned int addr, int alen,
680 uint8_t *buffer, int len);
682 int i2c_write(uint8_t chip, unsigned int addr, int alen,
683 uint8_t *buffer, int len);
686 * Utility routines to read/write registers.
688 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
690 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
695 * Change the speed of the active I2C bus
697 * speed - bus speed in Hz
699 * Returns: new bus speed
702 unsigned int i2c_set_bus_speed(unsigned int speed);
707 * Returns speed of currently active I2C bus in Hz
710 unsigned int i2c_get_bus_speed(void);
715 * Adjusts I2C pointers after U-Boot is relocated to DRAM
717 void i2c_reloc_fixup(void);
718 #if defined(CONFIG_SYS_I2C_SOFT)
719 void i2c_soft_init(void);
720 void i2c_soft_active(void);
721 void i2c_soft_tristate(void);
722 int i2c_soft_read(void);
723 void i2c_soft_sda(int bit);
724 void i2c_soft_scl(int bit);
725 void i2c_soft_delay(void);
730 * Probe the given I2C chip address. Returns 0 if a chip responded,
733 int i2c_probe(uchar chip);
736 * Read/Write interface:
737 * chip: I2C chip address, range 0..127
738 * addr: Memory (register) address within the chip
739 * alen: Number of bytes to use for addr (typically 1, 2 for larger
740 * memories, 0 for register type devices with only one
742 * buffer: Where to read/write the data
743 * len: How many bytes to read/write
745 * Returns: 0 on success, not 0 on failure
747 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
748 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
751 * Utility routines to read/write registers.
753 static inline u8 i2c_reg_read(u8 addr, u8 reg)
758 /* MPC8xx needs this. Maybe one day we can get rid of it. */
759 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
763 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
766 i2c_read(addr, reg, 1, &buf, 1);
771 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
774 /* MPC8xx needs this. Maybe one day we can get rid of it. */
775 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
779 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
780 __func__, addr, reg, val);
783 i2c_write(addr, reg, 1, &val, 1);
787 * Functions for setting the current I2C bus and its speed
793 * Change the active I2C bus. Subsequent read/write calls will
796 * bus - bus index, zero based
798 * Returns: 0 on success, not 0 on failure
801 int i2c_set_bus_num(unsigned int bus);
806 * Returns index of currently active I2C bus. Zero-based.
809 unsigned int i2c_get_bus_num(void);
814 * Change the speed of the active I2C bus
816 * speed - bus speed in Hz
818 * Returns: 0 on success, not 0 on failure
821 int i2c_set_bus_speed(unsigned int);
826 * Returns speed of currently active I2C bus in Hz
829 unsigned int i2c_get_bus_speed(void);
830 #endif /* CONFIG_SYS_I2C */
833 * only for backwardcompatibility, should go away if we switched
834 * completely to new multibus support.
836 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
837 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
838 # define CONFIG_SYS_MAX_I2C_BUS 2
840 # define I2C_MULTI_BUS 1
842 # define CONFIG_SYS_MAX_I2C_BUS 1
843 # define I2C_MULTI_BUS 0
846 /* NOTE: These two functions MUST be always_inline to avoid code growth! */
847 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
848 static inline unsigned int I2C_GET_BUS(void)
850 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
853 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
854 static inline void I2C_SET_BUS(unsigned int bus)
857 i2c_set_bus_num(bus);
860 /* Multi I2C definitions */
862 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
863 I2C_8, I2C_9, I2C_10,
866 /* Multi I2C busses handling */
867 #ifdef CONFIG_SOFT_I2C_MULTI_BUS
868 extern int get_multi_scl_pin(void);
869 extern int get_multi_sda_pin(void);
870 extern int multi_i2c_init(void);
874 * Get FDT values for i2c bus.
876 * @param blob Device tree blbo
877 * @return the number of I2C bus
879 void board_i2c_init(const void *blob);
882 * Find the I2C bus number by given a FDT I2C node.
884 * @param blob Device tree blbo
885 * @param node FDT I2C node to find
886 * @return the number of I2C bus (zero based), or -1 on error
888 int i2c_get_bus_num_fdt(int node);
891 * Reset the I2C bus represented by the given a FDT I2C node.
893 * @param blob Device tree blbo
894 * @param node FDT I2C node to find
895 * @return 0 if port was reset, -1 if not found
897 int i2c_reset_port_fdt(const void *blob, int node);
899 #endif /* !CONFIG_DM_I2C */