1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
4 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
5 * Changes for multibus/multiadapter I2C support.
8 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
10 * The original I2C interface was
11 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
12 * AIRVENT SAM s.p.a - RIMINI(ITALY)
13 * but has been changed substantially.
20 * For now there are essentially two parts to this file - driver model
21 * here at the top, and the older code below (with CONFIG_SYS_I2C being
22 * most recent). The plan is to migrate everything to driver model.
23 * The driver model structures and API are separate as they are different
24 * enough as to be incompatible for compilation purposes.
27 enum dm_i2c_chip_flags {
28 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
29 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
30 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
33 /** enum i2c_speed_mode - standard I2C speed modes */
35 IC_SPEED_MODE_STANDARD,
37 IC_SPEED_MODE_FAST_PLUS,
39 IC_SPEED_MODE_FAST_ULTRA,
44 /** enum i2c_speed_rate - standard I2C speeds in Hz */
46 I2C_SPEED_STANDARD_RATE = 100000,
47 I2C_SPEED_FAST_RATE = 400000,
48 I2C_SPEED_FAST_PLUS_RATE = 1000000,
49 I2C_SPEED_HIGH_RATE = 3400000,
50 I2C_SPEED_FAST_ULTRA_RATE = 5000000,
53 /** enum i2c_address_mode - available address modes */
54 enum i2c_address_mode {
61 * struct dm_i2c_chip - information about an i2c chip
63 * An I2C chip is a device on the I2C bus. It sits at a particular address
64 * and normally supports 7-bit or 10-bit addressing.
66 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
67 * the chip to examine.
69 * @chip_addr: Chip address on bus
70 * @offset_len: Length of offset in bytes. A single byte offset can
71 * represent up to 256 bytes. A value larger than 1 may be
72 * needed for larger devices.
73 * @flags: Flags for this chip (dm_i2c_chip_flags)
74 * @chip_addr_offset_mask: Mask of offset bits within chip_addr. Used for
75 * devices which steal addresses as part of offset.
76 * If offset_len is zero, then the offset is encoded
77 * completely within the chip address itself.
78 * e.g. a devce with chip address of 0x2c with 512
79 * registers might use the bottom bit of the address
80 * to indicate which half of the address space is being
81 * accessed while still only using 1 byte offset.
82 * This means it will respond to chip address 0x2c and
84 * A real world example is the Atmel AT24C04. It's
85 * datasheet explains it's usage of this addressing
87 * @emul: Emulator for this chip address (only used for emulation)
93 uint chip_addr_offset_mask;
101 * struct dm_i2c_bus- information about an i2c bus
103 * An I2C bus contains 0 or more chips on it, each at its own address. The
104 * bus can operate at different speeds (measured in Hz, typically 100KHz
107 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
110 * @speed_hz: Bus speed in hertz (typically 100000)
111 * @max_transaction_bytes: Maximal size of single I2C transfer
115 int max_transaction_bytes;
119 * Not all of these flags are implemented in the U-Boot API
121 enum dm_i2c_msg_flags {
122 I2C_M_TEN = 0x0010, /* ten-bit chip address */
123 I2C_M_RD = 0x0001, /* read data, from slave to master */
124 I2C_M_STOP = 0x8000, /* send stop after this message */
125 I2C_M_NOSTART = 0x4000, /* no start before this message */
126 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
127 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
128 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
129 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
133 * struct i2c_msg - an I2C message
135 * @addr: Slave address
136 * @flags: Flags (see enum dm_i2c_msg_flags)
137 * @len: Length of buffer in bytes, may be 0 for a probe
138 * @buf: Buffer to send/receive, or NULL if no data
148 * struct i2c_msg_list - a list of I2C messages
150 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
151 * appropriate in U-Boot.
153 * @msg: Pointer to i2c_msg array
154 * @nmsgs: Number of elements in the array
156 struct i2c_msg_list {
157 struct i2c_msg *msgs;
162 * dm_i2c_read() - read bytes from an I2C chip
164 * To obtain an I2C device (called a 'chip') given the I2C bus address you
165 * can use i2c_get_chip(). To obtain a bus by bus number use
166 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
168 * To set the address length of a devce use i2c_set_addr_len(). It
171 * @dev: Chip to read from
172 * @offset: Offset within chip to start reading
173 * @buffer: Place to put data
174 * @len: Number of bytes to read
176 * @return 0 on success, -ve on failure
178 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
181 * dm_i2c_write() - write bytes to an I2C chip
183 * See notes for dm_i2c_read() above.
185 * @dev: Chip to write to
186 * @offset: Offset within chip to start writing
187 * @buffer: Buffer containing data to write
188 * @len: Number of bytes to write
190 * @return 0 on success, -ve on failure
192 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
196 * dm_i2c_probe() - probe a particular chip address
198 * This can be useful to check for the existence of a chip on the bus.
199 * It is typically implemented by writing the chip address to the bus
200 * and checking that the chip replies with an ACK.
203 * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
204 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
205 * @devp: Returns the device found, or NULL if none
206 * @return 0 if a chip was found at that address, -ve if not
208 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
209 struct udevice **devp);
212 * dm_i2c_reg_read() - Read a value from an I2C register
214 * This reads a single value from the given address in an I2C chip
216 * @dev: Device to use for transfer
217 * @addr: Address to read from
218 * @return value read, or -ve on error
220 int dm_i2c_reg_read(struct udevice *dev, uint offset);
223 * dm_i2c_reg_write() - Write a value to an I2C register
225 * This writes a single value to the given address in an I2C chip
227 * @dev: Device to use for transfer
228 * @addr: Address to write to
229 * @val: Value to write (normally a byte)
230 * @return 0 on success, -ve on error
232 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
235 * dm_i2c_xfer() - Transfer messages over I2C
237 * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
240 * @dev: Device to use for transfer
241 * @msg: List of messages to transfer
242 * @nmsgs: Number of messages to transfer
243 * @return 0 on success, -ve on error
245 int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
248 * dm_i2c_set_bus_speed() - set the speed of a bus
250 * @bus: Bus to adjust
251 * @speed: Requested speed in Hz
252 * @return 0 if OK, -EINVAL for invalid values
254 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
257 * dm_i2c_get_bus_speed() - get the speed of a bus
260 * @return speed of selected I2C bus in Hz, -ve on error
262 int dm_i2c_get_bus_speed(struct udevice *bus);
265 * i2c_set_chip_flags() - set flags for a chip
267 * Typically addresses are 7 bits, but for 10-bit addresses you should set
268 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
270 * @dev: Chip to adjust
272 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
274 int i2c_set_chip_flags(struct udevice *dev, uint flags);
277 * i2c_get_chip_flags() - get flags for a chip
279 * @dev: Chip to check
280 * @flagsp: Place to put flags
281 * @return 0 if OK, other -ve value on error
283 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
286 * i2c_set_offset_len() - set the offset length for a chip
288 * The offset used to access a chip may be up to 4 bytes long. Typically it
289 * is only 1 byte, which is enough for chips with 256 bytes of memory or
290 * registers. The default value is 1, but you can call this function to
293 * @offset_len: New offset length value (typically 1 or 2)
295 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
298 * i2c_get_offset_len() - get the offset length for a chip
300 * @return: Current offset length value (typically 1 or 2)
302 int i2c_get_chip_offset_len(struct udevice *dev);
305 * i2c_set_chip_addr_offset_mask() - set mask of address bits usable by offset
307 * Some devices listen on multiple chip addresses to achieve larger offsets
308 * than their single or multiple byte offsets would allow for. You can use this
309 * function to set the bits that are valid to be used for offset overflow.
311 * @mask: The mask to be used for high offset bits within address
312 * @return 0 if OK, other -ve value on error
314 int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask);
317 * i2c_get_chip_addr_offset_mask() - get mask of address bits usable by offset
319 * @return current chip addr offset mask
321 uint i2c_get_chip_addr_offset_mask(struct udevice *dev);
324 * i2c_deblock() - recover a bus that is in an unknown state
326 * See the deblock() method in 'struct dm_i2c_ops' for full information
328 * @bus: Bus to recover
329 * @return 0 if OK, -ve on error
331 int i2c_deblock(struct udevice *bus);
334 * i2c_deblock_gpio_loop() - recover a bus from an unknown state by toggling SDA/SCL
336 * This is the inner logic used for toggling I2C SDA/SCL lines as GPIOs
337 * for deblocking the I2C bus.
341 * @scl_count: Number of SCL clock cycles generated to deblock SDA
342 * @delay: Delay between SCL clock line changes
343 * @return 0 if OK, -ve on error
346 int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin, struct gpio_desc *scl_pin,
347 unsigned int scl_count, unsigned int delay);
350 * struct dm_i2c_ops - driver operations for I2C uclass
352 * Drivers should support these operations unless otherwise noted. These
353 * operations are intended to be used by uclass code, not directly from
358 * xfer() - transfer a list of I2C messages
360 * @bus: Bus to read from
361 * @msg: List of messages to transfer
362 * @nmsgs: Number of messages in the list
363 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
364 * -ECOMM if the speed cannot be supported, -EPROTO if the chip
365 * flags cannot be supported, other -ve value on some other error
367 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
370 * probe_chip() - probe for the presense of a chip address
372 * This function is optional. If omitted, the uclass will send a zero
373 * length message instead.
376 * @chip_addr: Chip address to probe
377 * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
378 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
379 * to default probem other -ve value on error
381 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
384 * set_bus_speed() - set the speed of a bus (optional)
386 * The bus speed value will be updated by the uclass if this function
387 * does not return an error. This method is optional - if it is not
388 * provided then the driver can read the speed from
389 * dev_get_uclass_priv(bus)->speed_hz
391 * @bus: Bus to adjust
392 * @speed: Requested speed in Hz
393 * @return 0 if OK, -EINVAL for invalid values
395 int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
398 * get_bus_speed() - get the speed of a bus (optional)
400 * Normally this can be provided by the uclass, but if you want your
401 * driver to check the bus speed by looking at the hardware, you can
402 * implement that here. This method is optional. This method would
403 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
406 * @return speed of selected I2C bus in Hz, -ve on error
408 int (*get_bus_speed)(struct udevice *bus);
411 * set_flags() - set the flags for a chip (optional)
413 * This is generally implemented by the uclass, but drivers can
414 * check the value to ensure that unsupported options are not used.
415 * This method is optional. If provided, this method will always be
416 * called when the flags change.
418 * @dev: Chip to adjust
419 * @flags: New flags value
420 * @return 0 if OK, -EINVAL if value is unsupported
422 int (*set_flags)(struct udevice *dev, uint flags);
425 * deblock() - recover a bus that is in an unknown state
427 * I2C is a synchronous protocol and resets of the processor in the
428 * middle of an access can block the I2C Bus until a powerdown of
429 * the full unit is done. This is because slaves can be stuck
430 * waiting for addition bus transitions for a transaction that will
431 * never complete. Resetting the I2C master does not help. The only
432 * way is to force the bus through a series of transitions to make
433 * sure that all slaves are done with the transaction. This method
434 * performs this 'deblocking' if support by the driver.
436 * This method is optional.
438 int (*deblock)(struct udevice *bus);
441 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
444 * struct i2c_mux_ops - operations for an I2C mux
446 * The current mux state is expected to be stored in the mux itself since
447 * it is the only thing that knows how to make things work. The mux can
448 * record the current state and then avoid switching unless it is necessary.
449 * So select() can be skipped if the mux is already in the correct state.
450 * Also deselect() can be made a nop if required.
454 * select() - select one of of I2C buses attached to a mux
456 * This will be called when there is no bus currently selected by the
457 * mux. This method does not need to deselect the old bus since
458 * deselect() will be already have been called if necessary.
461 * @bus: I2C bus to select
462 * @channel: Channel number correponding to the bus to select
463 * @return 0 if OK, -ve on error
465 int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
468 * deselect() - select one of of I2C buses attached to a mux
470 * This is used to deselect the currently selected I2C bus.
473 * @bus: I2C bus to deselect
474 * @channel: Channel number correponding to the bus to deselect
475 * @return 0 if OK, -ve on error
477 int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
480 #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
483 * i2c_get_chip() - get a device to use to access a chip on a bus
485 * This returns the device for the given chip address. The device can then
486 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
488 * @bus: Bus to examine
489 * @chip_addr: Chip address for the new device
490 * @offset_len: Length of a register offset in bytes (normally 1)
491 * @devp: Returns pointer to new device if found or -ENODEV if not
494 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
495 struct udevice **devp);
498 * i2c_get_chip_for_busnum() - get a device to use to access a chip on
501 * This returns the device for the given chip address on a particular bus
504 * @busnum: Bus number to examine
505 * @chip_addr: Chip address for the new device
506 * @offset_len: Length of a register offset in bytes (normally 1)
507 * @devp: Returns pointer to new device if found or -ENODEV if not
510 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
511 struct udevice **devp);
514 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
516 * This decodes the chip address from a device tree node and puts it into
517 * its dm_i2c_chip structure. This should be called in your driver's
518 * ofdata_to_platdata() method.
520 * @blob: Device tree blob
521 * @node: Node offset to read from
522 * @spi: Place to put the decoded information
524 int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip);
527 * i2c_dump_msgs() - Dump a list of I2C messages
529 * This may be useful for debugging.
531 * @msg: Message list to dump
532 * @nmsgs: Number of messages
534 void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
537 * i2c_emul_find() - Find an emulator for an i2c sandbox device
539 * This looks at the device's 'emul' phandle
541 * @dev: Device to find an emulator for
542 * @emulp: Returns the associated emulator, if found *
543 * @return 0 if OK, -ENOENT or -ENODEV if not found
545 int i2c_emul_find(struct udevice *dev, struct udevice **emulp);
548 * i2c_emul_get_device() - Find the device being emulated
550 * Given an emulator this returns the associated device
552 * @emul: Emulator for the device
553 * @return device that @emul is emulating
555 struct udevice *i2c_emul_get_device(struct udevice *emul);
557 #ifndef CONFIG_DM_I2C
560 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
562 * The implementation MUST NOT use static or global variables if the
563 * I2C routines are used to read SDRAM configuration information
564 * because this is done before the memories are initialized. Limited
565 * use of stack-based variables are OK (the initial stack size is
568 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
572 * Configuration items.
574 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
576 #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
577 /* no muxes used bus = i2c adapters */
578 #define CONFIG_SYS_I2C_DIRECT_BUS 1
579 #define CONFIG_SYS_I2C_MAX_HOPS 0
580 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
582 /* we use i2c muxes */
583 #undef CONFIG_SYS_I2C_DIRECT_BUS
586 /* define the I2C bus number for RTC and DTT if not already done */
587 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
588 #define CONFIG_SYS_RTC_BUS_NUM 0
590 #if !defined(CONFIG_SYS_SPD_BUS_NUM)
591 #define CONFIG_SYS_SPD_BUS_NUM 0
595 void (*init)(struct i2c_adapter *adap, int speed,
597 int (*probe)(struct i2c_adapter *adap, uint8_t chip);
598 int (*read)(struct i2c_adapter *adap, uint8_t chip,
599 uint addr, int alen, uint8_t *buffer,
601 int (*write)(struct i2c_adapter *adap, uint8_t chip,
602 uint addr, int alen, uint8_t *buffer,
604 uint (*set_bus_speed)(struct i2c_adapter *adap,
614 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
615 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
621 .set_bus_speed = _set_speed, \
623 .slaveaddr = _slaveaddr, \
625 .hwadapnr = _hwadapnr, \
629 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
630 _set_speed, _speed, _slaveaddr, _hwadapnr) \
631 ll_entry_declare(struct i2c_adapter, _name, i2c) = \
632 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
633 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
635 struct i2c_adapter *i2c_get_adapter(int index);
637 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
643 struct i2c_next_hop {
649 struct i2c_bus_hose {
651 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
653 #define I2C_NULL_HOP {{-1, ""}, 0, 0}
654 extern struct i2c_bus_hose i2c_bus[];
656 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
658 #define I2C_ADAPTER(bus) bus
660 #define I2C_BUS gd->cur_i2c_bus
662 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
663 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
664 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
666 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
667 #define I2C_MUX_PCA9540_ID 1
668 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
669 #define I2C_MUX_PCA9542_ID 2
670 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
671 #define I2C_MUX_PCA9544_ID 3
672 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
673 #define I2C_MUX_PCA9547_ID 4
674 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
675 #define I2C_MUX_PCA9548_ID 5
676 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
679 #ifndef I2C_SOFT_DECLARATIONS
680 # if (defined(CONFIG_AT91RM9200) || \
681 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
682 defined(CONFIG_AT91SAM9263))
683 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
685 # define I2C_SOFT_DECLARATIONS
690 * Many boards/controllers/drivers don't support an I2C slave interface so
691 * provide a default slave address for them for use in common code. A real
692 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
693 * support a slave interface.
695 #ifndef CONFIG_SYS_I2C_SLAVE
696 #define CONFIG_SYS_I2C_SLAVE 0xfe
700 * Initialization, must be called once on start up, may be called
701 * repeatedly to change the speed and slave addresses.
703 #ifdef CONFIG_SYS_I2C_EARLY_INIT
704 void i2c_early_init_f(void);
706 void i2c_init(int speed, int slaveaddr);
707 void i2c_init_board(void);
709 #ifdef CONFIG_SYS_I2C
713 * Returns index of currently active I2C bus. Zero-based.
715 unsigned int i2c_get_bus_num(void);
720 * Change the active I2C bus. Subsequent read/write calls will
723 * bus - bus index, zero based
725 * Returns: 0 on success, not 0 on failure
728 int i2c_set_bus_num(unsigned int bus);
733 * Initializes all I2C adapters in the system. All i2c_adap structures must
734 * be initialized beforehead with function pointers and data, including
735 * speed and slaveaddr. Returns 0 on success, non-0 on failure.
737 void i2c_init_all(void);
740 * Probe the given I2C chip address. Returns 0 if a chip responded,
743 int i2c_probe(uint8_t chip);
746 * Read/Write interface:
747 * chip: I2C chip address, range 0..127
748 * addr: Memory (register) address within the chip
749 * alen: Number of bytes to use for addr (typically 1, 2 for larger
750 * memories, 0 for register type devices with only one
752 * buffer: Where to read/write the data
753 * len: How many bytes to read/write
755 * Returns: 0 on success, not 0 on failure
757 int i2c_read(uint8_t chip, unsigned int addr, int alen,
758 uint8_t *buffer, int len);
760 int i2c_write(uint8_t chip, unsigned int addr, int alen,
761 uint8_t *buffer, int len);
764 * Utility routines to read/write registers.
766 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
768 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
773 * Change the speed of the active I2C bus
775 * speed - bus speed in Hz
777 * Returns: new bus speed
780 unsigned int i2c_set_bus_speed(unsigned int speed);
785 * Returns speed of currently active I2C bus in Hz
788 unsigned int i2c_get_bus_speed(void);
793 * Probe the given I2C chip address. Returns 0 if a chip responded,
796 int i2c_probe(uchar chip);
799 * Read/Write interface:
800 * chip: I2C chip address, range 0..127
801 * addr: Memory (register) address within the chip
802 * alen: Number of bytes to use for addr (typically 1, 2 for larger
803 * memories, 0 for register type devices with only one
805 * buffer: Where to read/write the data
806 * len: How many bytes to read/write
808 * Returns: 0 on success, not 0 on failure
810 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
811 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
814 * Utility routines to read/write registers.
816 static inline u8 i2c_reg_read(u8 addr, u8 reg)
821 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
824 i2c_read(addr, reg, 1, &buf, 1);
829 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
832 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
833 __func__, addr, reg, val);
836 i2c_write(addr, reg, 1, &val, 1);
840 * Functions for setting the current I2C bus and its speed
846 * Change the active I2C bus. Subsequent read/write calls will
849 * bus - bus index, zero based
851 * Returns: 0 on success, not 0 on failure
854 int i2c_set_bus_num(unsigned int bus);
859 * Returns index of currently active I2C bus. Zero-based.
862 unsigned int i2c_get_bus_num(void);
867 * Change the speed of the active I2C bus
869 * speed - bus speed in Hz
871 * Returns: 0 on success, not 0 on failure
874 int i2c_set_bus_speed(unsigned int);
879 * Returns speed of currently active I2C bus in Hz
882 unsigned int i2c_get_bus_speed(void);
883 #endif /* CONFIG_SYS_I2C */
886 * only for backwardcompatibility, should go away if we switched
887 * completely to new multibus support.
889 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
890 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
891 # define CONFIG_SYS_MAX_I2C_BUS 2
893 # define I2C_MULTI_BUS 1
895 # define CONFIG_SYS_MAX_I2C_BUS 1
896 # define I2C_MULTI_BUS 0
899 /* NOTE: These two functions MUST be always_inline to avoid code growth! */
900 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
901 static inline unsigned int I2C_GET_BUS(void)
903 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
906 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
907 static inline void I2C_SET_BUS(unsigned int bus)
910 i2c_set_bus_num(bus);
913 /* Multi I2C definitions */
915 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
916 I2C_8, I2C_9, I2C_10,
920 * Get FDT values for i2c bus.
922 * @param blob Device tree blbo
923 * @return the number of I2C bus
925 void board_i2c_init(const void *blob);
928 * Find the I2C bus number by given a FDT I2C node.
930 * @param blob Device tree blbo
931 * @param node FDT I2C node to find
932 * @return the number of I2C bus (zero based), or -1 on error
934 int i2c_get_bus_num_fdt(int node);
937 * Reset the I2C bus represented by the given a FDT I2C node.
939 * @param blob Device tree blbo
940 * @param node FDT I2C node to find
941 * @return 0 if port was reset, -1 if not found
943 int i2c_reset_port_fdt(const void *blob, int node);
945 #endif /* !CONFIG_DM_I2C */