1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2015 Freescale Semiconductor, Inc.
13 #ifdef CONFIG_SYS_FSL_SRK_LE
14 #define srk_in32(a) in_le32(a)
16 #define srk_in32(a) in_be32(a)
19 #ifdef CONFIG_SYS_FSL_SFP_LE
20 #define sfp_in32(a) in_le32(a)
21 #define sfp_out32(a, v) out_le32(a, v)
22 #define sfp_in16(a) in_le16(a)
23 #elif defined(CONFIG_SYS_FSL_SFP_BE)
24 #define sfp_in32(a) in_be32(a)
25 #define sfp_out32(a, v) out_be32(a, v)
26 #define sfp_in16(a) in_be16(a)
29 /* Number of SRKH registers */
30 #define NUM_SRKH_REGS 8
32 #if defined(CONFIG_SYS_FSL_SFP_VER_3_2) || \
33 defined(CONFIG_SYS_FSL_SFP_VER_3_4)
34 struct ccsr_sfp_regs {
36 u32 ospr1; /* 0x204 */
38 u32 fswpr; /* 0x218 FSL Section Write Protect */
39 u32 fsl_uid; /* 0x21c FSL UID 0 */
40 u32 fsl_uid_1; /* 0x220 FSL UID 0 */
42 u32 srk_hash[8]; /* 0x254 Super Root Key Hash */
43 u32 oem_uid; /* 0x274 OEM UID 0*/
44 u32 oem_uid_1; /* 0x278 OEM UID 1*/
45 u32 oem_uid_2; /* 0x27c OEM UID 2*/
46 u32 oem_uid_3; /* 0x280 OEM UID 3*/
47 u32 oem_uid_4; /* 0x284 OEM UID 4*/
50 #elif defined(CONFIG_SYS_FSL_SFP_VER_3_0)
51 struct ccsr_sfp_regs {
54 u32 srk_hash[NUM_SRKH_REGS]; /* 0x23c Super Root Key Hash */
55 u32 oem_uid; /* 0x9c OEM Unique ID */
57 u32 ovpr; /* 0xA4 Intent To Secure */
59 u32 fsl_uid; /* 0xB0 FSL Unique ID */
61 u32 fsl_spfr0; /* Scratch Pad Fuse Register 0 */
62 u32 fsl_spfr1; /* Scratch Pad Fuse Register 1 */
66 struct ccsr_sfp_regs {
68 u32 ospr; /* 0x40 OEM Security Policy Register */
70 u32 srk_hash[8]; /* 0x7c Super Root Key Hash */
71 u32 oem_uid; /* 0x9c OEM Unique ID */
73 u32 ovpr; /* 0xA4 OEM Validation Policy Register */
75 u32 fsl_uid; /* 0xB0 FSL Unique ID */
79 #define ITS_MASK 0x00000004
82 #if defined(CONFIG_SYS_FSL_SFP_VER_3_4)
83 #define OSPR_KEY_REVOC_SHIFT 9
84 #define OSPR_KEY_REVOC_MASK 0x0000fe00
86 #define OSPR_KEY_REVOC_SHIFT 13
87 #define OSPR_KEY_REVOC_MASK 0x0000e000
88 #endif /* CONFIG_SYS_FSL_SFP_VER_3_4 */