1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2016 Freescale Semiconductor, Inc.
7 #if defined(CONFIG_ARCH_MX7ULP) || defined(CONFIG_ARCH_IMX8) || \
8 defined(CONFIG_ARCH_IMXRT) || defined(CONFIG_ARCH_IMX8ULP) || defined(CONFIG_ARCH_IMX9)
9 struct lpuart_fsl_reg32 {
24 struct lpuart_fsl_reg32 {
63 /* Used on i.MX7ULP */
64 #define LPUART_BAUD_BOTHEDGE_MASK (0x20000)
65 #define LPUART_BAUD_OSR_MASK (0x1F000000)
66 #define LPUART_BAUD_OSR_SHIFT (24)
67 #define LPUART_BAUD_OSR(x) ((((uint32_t)(x)) << 24) & 0x1F000000)
68 #define LPUART_BAUD_SBR_MASK (0x1FFF)
69 #define LPUART_BAUD_SBR_SHIFT (0U)
70 #define LPUART_BAUD_SBR(x) (((uint32_t)(x)) & 0x1FFF)
71 #define LPUART_BAUD_M10_MASK (0x20000000U)
72 #define LPUART_BAUD_SBNS_MASK (0x2000U)