2 * Copyright (C) 2014 Freescale Semiconductor
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef _FSL_QBMAN_BASE_H
8 #define _FSL_QBMAN_BASE_H
10 /* Descriptor for a QBMan instance on the SoC. On partitions/targets that do not
11 * control this QBMan instance, these values may simply be place-holders. The
12 * idea is simply that we be able to distinguish between them, eg. so that SWP
13 * descriptors can identify which QBMan instance they belong to. */
14 struct qbman_block_desc {
15 void *ccsr_reg_bar; /* CCSR register map */
16 int irq_rerr; /* Recoverable error interrupt line */
17 int irq_nrerr; /* Non-recoverable error interrupt line */
20 /* Descriptor for a QBMan software portal, expressed in terms that make sense to
21 * the user context. Ie. on MC, this information is likely to be true-physical,
22 * and instantiated statically at compile-time. On GPP, this information is
23 * likely to be obtained via "discovery" over a partition's "layerscape bus"
24 * (ie. in response to a MC portal command), and would take into account any
25 * virtualisation of the GPP user's address space and/or interrupt numbering. */
26 struct qbman_swp_desc {
27 const struct qbman_block_desc *block; /* The QBMan instance */
28 void *cena_bar; /* Cache-enabled portal register map */
29 void *cinh_bar; /* Cache-inhibited portal register map */
32 /* Driver object for managing a QBMan portal */
35 /* Place-holder for FDs, we represent it via the simplest form that we need for
36 * now. Different overlays may be needed to support different options, etc. (It
37 * is impractical to define One True Struct, because the resulting encoding
38 * routines (lots of read-modify-writes) would be worst-case performance whether
39 * or not circumstances required them.)
41 * Note, as with all data-structures exchanged between software and hardware (be
42 * they located in the portal register map or DMA'd to and from main-memory),
43 * the driver ensures that the caller of the driver API sees the data-structures
44 * in host-endianness. "struct qbman_fd" is no exception. The 32-bit words
45 * contained within this structure are represented in host-endianness, even if
46 * hardware always treats them as little-endian. As such, if any of these fields
47 * are interpreted in a binary (rather than numerical) fashion by hardware
48 * blocks (eg. accelerators), then the user should be careful. We illustrate
51 * Suppose the desired behaviour of an accelerator is controlled by the "frc"
52 * field of the FDs that are sent to it. Suppose also that the behaviour desired
53 * by the user corresponds to an "frc" value which is expressed as the literal
54 * sequence of bytes 0xfe, 0xed, 0xab, and 0xba. So "frc" should be the 32-bit
55 * value in which 0xfe is the first byte and 0xba is the last byte, and as
56 * hardware is little-endian, this amounts to a 32-bit "value" of 0xbaabedfe. If
57 * the software is little-endian also, this can simply be achieved by setting
58 * frc=0xbaabedfe. On the other hand, if software is big-endian, it should set
59 * frc=0xfeedabba! The best away of avoiding trouble with this sort of thing is
60 * to treat the 32-bit words as numerical values, in which the offset of a field
61 * from the beginning of the first byte (as required or generated by hardware)
62 * is numerically encoded by a left-shift (ie. by raising the field to a
63 * corresponding power of 2). Ie. in the current example, software could set
64 * "frc" in the following way, and it would work correctly on both little-endian
65 * and big-endian operation;
66 * fd.frc = (0xfe << 0) | (0xed << 8) | (0xab << 16) | (0xba << 24);
71 struct qbman_fd_simple {
75 /* offset in the MS 16 bits, BPID in the LS 16 bits */
77 uint32_t frc; /* frame context */
78 /* "err", "va", "cbmt", "asal", [...] */
87 #endif /* !_FSL_QBMAN_BASE_H */