include/fpga.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2002
   4  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
   5  */
   6
   7 #include <linux/types.h>               /* for ulong typedef */
   8
   9 #ifndef _FPGA_H_
  10 #define _FPGA_H_
  11
  12 #ifndef CONFIG_MAX_FPGA_DEVICES
  13 #define CONFIG_MAX_FPGA_DEVICES         5
  14 #endif
  15
  16 /* fpga_xxxx function return value definitions */
  17 #define FPGA_SUCCESS            0
  18 #define FPGA_FAIL               1
  19
  20 /* device numbers must be non-negative */
  21 #define FPGA_INVALID_DEVICE     -1
  22
  23 #define FPGA_ENC_DEV_KEY        0
  24 #define FPGA_ENC_USR_KEY        1
  25 #define FPGA_NO_ENC_OR_NO_AUTH  2
  26
  27 /* root data type defintions */
  28 typedef enum {                  /* typedef fpga_type */
  29         fpga_min_type,          /* range check value */
  30         fpga_xilinx,            /* Xilinx Family) */
  31         fpga_altera,            /* unimplemented */
  32         fpga_lattice,           /* Lattice family */
  33         fpga_undefined          /* invalid range check value */
  34 } fpga_type;                    /* end, typedef fpga_type */
  35
  36 typedef struct {                /* typedef fpga_desc */
  37         fpga_type devtype;      /* switch value to select sub-functions */
  38         void *devdesc;          /* real device descriptor */
  39 } fpga_desc;                    /* end, typedef fpga_desc */
  40
  41 typedef struct {                /* typedef fpga_desc */
  42         unsigned int blocksize;
  43         char *interface;
  44         char *dev_part;
  45         const char *filename;
  46         int fstype;
  47 } fpga_fs_info;
  48
  49 struct fpga_secure_info {
  50         u8 *userkey_addr;
  51         u8 authflag;
  52         u8 encflag;
  53 };
  54
  55 typedef enum {
  56         BIT_FULL = 0,
  57         BIT_PARTIAL,
  58         BIT_NONE = 0xFF,
  59 } bitstream_type;
  60
  61 /* root function definitions */
  62 void fpga_init(void);
  63 int fpga_add(fpga_type devtype, void *desc);
  64 int fpga_count(void);
  65 const fpga_desc *const fpga_get_desc(int devnum);
  66 int fpga_is_partial_data(int devnum, size_t img_len);
  67 int fpga_load(int devnum, const void *buf, size_t bsize,
  68               bitstream_type bstype, int flags);
  69 int fpga_fsload(int devnum, const void *buf, size_t size,
  70                 fpga_fs_info *fpga_fsinfo);
  71 int fpga_loads(int devnum, const void *buf, size_t size,
  72                struct fpga_secure_info *fpga_sec_info);
  73 int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
  74                        bitstream_type bstype);
  75 int fpga_dump(int devnum, const void *buf, size_t bsize);
  76 int fpga_info(int devnum);
  77 const fpga_desc *const fpga_validate(int devnum, const void *buf,
  78                                      size_t bsize, char *fn);
  79 int fpga_compatible2flag(int devnum, const char *compatible);
  80
  81 #endif  /* _FPGA_H_ */