1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Faraday FTPCI100 PCI Bridge Controller Device Driver Implementation
5 * Copyright (C) 2010 Andes Technology Corporation
6 * Gavin Guo, Andes Technology Corporation <gavinguo@andestech.com>
7 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
13 /* AHB Control Registers */
14 #include <linux/bitops.h>
15 struct ftpci100_ahbc {
16 unsigned int iosize; /* 0x00 - I/O Space Size Signal */
17 unsigned int prot; /* 0x04 - AHB Protection */
18 unsigned int rsved[8]; /* 0x08-0x24 - Reserved */
19 unsigned int conf; /* 0x28 - PCI Configuration */
20 unsigned int data; /* 0x2c - PCI Configuration DATA */
24 * FTPCI100_IOSIZE_REG's constant definitions
26 #define FTPCI100_BASE_IO_SIZE(x) (ffs(x) - 1) /* 1M - 2048M */
29 * PCI Configuration Register
31 #define PCI_INT_MASK 0x4c
32 #define PCI_MEM_BASE_SIZE1 0x50
33 #define PCI_MEM_BASE_SIZE2 0x54
34 #define PCI_MEM_BASE_SIZE3 0x58
37 * PCI_INT_MASK's bit definitions
39 #define PCI_INTA_ENABLE (1 << 22)
40 #define PCI_INTB_ENABLE (1 << 23)
41 #define PCI_INTC_ENABLE (1 << 24)
42 #define PCI_INTD_ENABLE (1 << 25)
45 * PCI_MEM_BASE_SIZE1's constant definitions
47 #define FTPCI100_BASE_ADR_SIZE(x) ((ffs(x) - 1) << 16) /* 1M - 2048M */
49 #define FTPCI100_MAX_FUNCTIONS 20
50 #define PCI_IRQ_LINES 4
52 #define MAX_BUS_NUM 256
53 #define MAX_DEV_NUM 32
56 #define PCI_MAX_BAR_PER_FUNC 6
61 #define FTPCI100_MEM_SIZE(x) (ffs(x) << 24)
63 /* This definition is used by pci_ftpci_init() */
64 #define FTPCI100_BRIDGE_VENDORID 0x159b
65 #define FTPCI100_BRIDGE_DEVICEID 0x4321
67 void pci_ftpci_init(void);
76 unsigned int dev; /* device */
79 unsigned short v_id; /* vendor id */
80 unsigned short d_id; /* device id */
81 struct pcibar bar[PCI_MAX_BAR_PER_FUNC + 1];