microblaze: Unify of setting for SPL_NOR/XIP support
[platform/kernel/u-boot.git] / include / dwc3-sti-glue.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4  * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
5  */
6
7 #ifndef __DWC3_STI_UBOOT_H_
8 #define __DWC3_STI_UBOOT_H_
9
10 /* glue registers */
11 #include <linux/bitops.h>
12 #define CLKRST_CTRL             0x00
13 #define AUX_CLK_EN              BIT(0)
14 #define SW_PIPEW_RESET_N        BIT(4)
15 #define EXT_CFG_RESET_N         BIT(8)
16
17 #define XHCI_REVISION           BIT(12)
18
19 #define USB2_VBUS_MNGMNT_SEL1   0x2C
20 #define USB2_VBUS_UTMIOTG       0x1
21
22 #define SEL_OVERRIDE_VBUSVALID(n)       ((n) << 0)
23 #define SEL_OVERRIDE_POWERPRESENT(n)    ((n) << 4)
24 #define SEL_OVERRIDE_BVALID(n)          ((n) << 8)
25
26 /* Static DRD configuration */
27 #define USB3_CONTROL_MASK               0xf77
28
29 #define USB3_DEVICE_NOT_HOST            BIT(0)
30 #define USB3_FORCE_VBUSVALID            BIT(1)
31 #define USB3_DELAY_VBUSVALID            BIT(2)
32 #define USB3_SEL_FORCE_OPMODE           BIT(4)
33 #define USB3_FORCE_OPMODE(n)            ((n) << 5)
34 #define USB3_SEL_FORCE_DPPULLDOWN2      BIT(8)
35 #define USB3_FORCE_DPPULLDOWN2          BIT(9)
36 #define USB3_SEL_FORCE_DMPULLDOWN2      BIT(10)
37 #define USB3_FORCE_DMPULLDOWN2          BIT(11)
38
39 int sti_dwc3_init(enum usb_dr_mode mode);
40
41 #endif /* __DWC3_STI_UBOOT_H_ */