clk: mtmips: add clock driver for MediaTek MT7621 SoC
[platform/kernel/u-boot.git] / include / dt-bindings / power-domain / bcm6362-power-domain.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
4  */
5
6 #ifndef __DT_BINDINGS_POWER_DOMAIN_BCM6362_H
7 #define __DT_BINDINGS_POWER_DOMAIN_BCM6362_H
8
9 #define BCM6362_PWR_SAR         0
10 #define BCM6362_PWR_IPSEC       1
11 #define BCM6362_PWR_MIPS        2
12 #define BCM6362_PWR_DECT        3
13 #define BCM6362_PWR_USBH        4
14 #define BCM6362_PWR_USBD        5
15 #define BCM6362_PWR_ROBOSW      6
16 #define BCM6362_PWR_PCM         7
17 #define BCM6362_PWR_PERIPH      8
18 #define BCM6362_PWR_ADSL_PHY    9
19 #define BCM6362_PWR_GMII_PADS   10
20 #define BCM6362_PWR_FAP         11
21 #define BCM6362_PWR_PCIE        12
22 #define BCM6362_PWR_WLAN_PADS   13
23
24 #endif /* __DT_BINDINGS_POWER_DOMAIN_BCM6362_H */