clk: mtmips: add clock driver for MediaTek MT7621 SoC
[platform/kernel/u-boot.git] / include / dt-bindings / power-domain / bcm6328-power-domain.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
4  */
5
6 #ifndef __DT_BINDINGS_POWER_DOMAIN_BCM6328_H
7 #define __DT_BINDINGS_POWER_DOMAIN_BCM6328_H
8
9 #define BCM6328_PWR_ADSL2_MIPS  0
10 #define BCM6328_PWR_ADSL2_PHY   1
11 #define BCM6328_PWR_ADSL2_AFE   2
12 #define BCM6328_PWR_SAR         3
13 #define BCM6328_PWR_PCM         4
14 #define BCM6328_PWR_USBD        5
15 #define BCM6328_PWR_USBH        6
16 #define BCM6328_PWR_PCIE        7
17 #define BCM6328_PWR_ROBOSW      8
18 #define BCM6328_PWR_EPHY        9
19
20 #endif /* __DT_BINDINGS_POWER_DOMAIN_BCM6328_H */