1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
4 #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H
5 #define _DT_BINDINGS_POWER_QCOM_RPMPD_H
7 /* SA8775P Power Domain Indexes */
9 #define SA8775P_CX_AO 1
15 #define SA8775P_MMCX 7
16 #define SA8775P_MMCX_AO 8
19 #define SA8775P_MX_AO 11
20 #define SA8775P_MXC 12
21 #define SA8775P_MXC_AO 13
22 #define SA8775P_NSP0 14
23 #define SA8775P_NSP1 15
26 /* SDM670 Power Domain Indexes */
28 #define SDM670_MX_AO 1
30 #define SDM670_CX_AO 3
36 /* SDM845 Power Domain Indexes */
39 #define SDM845_MX_AO 2
41 #define SDM845_CX_AO 4
47 /* SDX55 Power Domain Indexes */
52 /* SDX65 Power Domain Indexes */
60 /* SM6350 Power Domain Indexes */
68 /* SM6350 Power Domain Indexes */
69 #define SM6375_VDDCX 0
70 #define SM6375_VDDCX_AO 1
71 #define SM6375_VDDCX_VFL 2
72 #define SM6375_VDDMX 3
73 #define SM6375_VDDMX_AO 4
74 #define SM6375_VDDMX_VFL 5
75 #define SM6375_VDDGX 6
76 #define SM6375_VDDGX_AO 7
77 #define SM6375_VDD_LPI_CX 8
78 #define SM6375_VDD_LPI_MX 9
80 /* SM8150 Power Domain Indexes */
87 #define SM8150_MX_AO 6
89 #define SM8150_CX_AO 8
91 #define SM8150_MMCX_AO 10
93 /* SA8155P is a special case, kept for backwards compatibility */
94 #define SA8155P_CX SM8150_CX
95 #define SA8155P_CX_AO SM8150_CX_AO
96 #define SA8155P_EBI SM8150_EBI
97 #define SA8155P_GFX SM8150_GFX
98 #define SA8155P_MSS SM8150_MSS
99 #define SA8155P_MX SM8150_MX
100 #define SA8155P_MX_AO SM8150_MX_AO
102 /* SM8250 Power Domain Indexes */
104 #define SM8250_CX_AO 1
109 #define SM8250_MMCX 6
110 #define SM8250_MMCX_AO 7
112 #define SM8250_MX_AO 9
114 /* SM8350 Power Domain Indexes */
116 #define SM8350_CX_AO 1
121 #define SM8350_MMCX 6
122 #define SM8350_MMCX_AO 7
124 #define SM8350_MX_AO 9
125 #define SM8350_MXC 10
126 #define SM8350_MXC_AO 11
127 #define SM8350_MSS 12
129 /* SM8450 Power Domain Indexes */
131 #define SM8450_CX_AO 1
136 #define SM8450_MMCX 6
137 #define SM8450_MMCX_AO 7
139 #define SM8450_MX_AO 9
140 #define SM8450_MXC 10
141 #define SM8450_MXC_AO 11
142 #define SM8450_MSS 12
144 /* SM8550 Power Domain Indexes */
146 #define SM8550_CX_AO 1
151 #define SM8550_MMCX 6
152 #define SM8550_MMCX_AO 7
154 #define SM8550_MX_AO 9
155 #define SM8550_MXC 10
156 #define SM8550_MXC_AO 11
157 #define SM8550_MSS 12
158 #define SM8550_NSP 13
160 /* QDU1000/QRU1000 Power Domain Indexes */
161 #define QDU1000_EBI 0
162 #define QDU1000_MSS 1
166 /* SC7180 Power Domain Indexes */
168 #define SC7180_CX_AO 1
171 #define SC7180_MX_AO 4
176 /* SC7280 Power Domain Indexes */
178 #define SC7280_CX_AO 1
182 #define SC7280_MX_AO 5
187 /* SC8180X Power Domain Indexes */
189 #define SC8180X_CX_AO 1
190 #define SC8180X_EBI 2
191 #define SC8180X_GFX 3
192 #define SC8180X_LCX 4
193 #define SC8180X_LMX 5
194 #define SC8180X_MMCX 6
195 #define SC8180X_MMCX_AO 7
196 #define SC8180X_MSS 8
198 #define SC8180X_MX_AO 10
200 /* SC8280XP Power Domain Indexes */
201 #define SC8280XP_CX 0
202 #define SC8280XP_CX_AO 1
203 #define SC8280XP_DDR 2
204 #define SC8280XP_EBI 3
205 #define SC8280XP_GFX 4
206 #define SC8280XP_LCX 5
207 #define SC8280XP_LMX 6
208 #define SC8280XP_MMCX 7
209 #define SC8280XP_MMCX_AO 8
210 #define SC8280XP_MSS 9
211 #define SC8280XP_MX 10
212 #define SC8280XP_MXC 12
213 #define SC8280XP_MX_AO 11
214 #define SC8280XP_NSP 13
215 #define SC8280XP_QPHY 14
216 #define SC8280XP_XO 15
218 /* SDM845 Power Domain performance levels */
219 #define RPMH_REGULATOR_LEVEL_RETENTION 16
220 #define RPMH_REGULATOR_LEVEL_MIN_SVS 48
221 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D2 52
222 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D1 56
223 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D0 60
224 #define RPMH_REGULATOR_LEVEL_LOW_SVS 64
225 #define RPMH_REGULATOR_LEVEL_LOW_SVS_P1 72
226 #define RPMH_REGULATOR_LEVEL_LOW_SVS_L1 80
227 #define RPMH_REGULATOR_LEVEL_LOW_SVS_L2 96
228 #define RPMH_REGULATOR_LEVEL_SVS 128
229 #define RPMH_REGULATOR_LEVEL_SVS_L0 144
230 #define RPMH_REGULATOR_LEVEL_SVS_L1 192
231 #define RPMH_REGULATOR_LEVEL_SVS_L2 224
232 #define RPMH_REGULATOR_LEVEL_NOM 256
233 #define RPMH_REGULATOR_LEVEL_NOM_L0 288
234 #define RPMH_REGULATOR_LEVEL_NOM_L1 320
235 #define RPMH_REGULATOR_LEVEL_NOM_L2 336
236 #define RPMH_REGULATOR_LEVEL_TURBO 384
237 #define RPMH_REGULATOR_LEVEL_TURBO_L0 400
238 #define RPMH_REGULATOR_LEVEL_TURBO_L1 416
239 #define RPMH_REGULATOR_LEVEL_TURBO_L2 432
240 #define RPMH_REGULATOR_LEVEL_TURBO_L3 448
241 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO 464
242 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO_NO_CPR 480
244 /* MDM9607 Power Domains */
245 #define MDM9607_VDDCX 0
246 #define MDM9607_VDDCX_AO 1
247 #define MDM9607_VDDCX_VFL 2
248 #define MDM9607_VDDMX 3
249 #define MDM9607_VDDMX_AO 4
250 #define MDM9607_VDDMX_VFL 5
252 /* MSM8226 Power Domain Indexes */
253 #define MSM8226_VDDCX 0
254 #define MSM8226_VDDCX_AO 1
255 #define MSM8226_VDDCX_VFC 2
257 /* MSM8939 Power Domains */
258 #define MSM8939_VDDMDCX 0
259 #define MSM8939_VDDMDCX_AO 1
260 #define MSM8939_VDDMDCX_VFC 2
261 #define MSM8939_VDDCX 3
262 #define MSM8939_VDDCX_AO 4
263 #define MSM8939_VDDCX_VFC 5
264 #define MSM8939_VDDMX 6
265 #define MSM8939_VDDMX_AO 7
267 /* MSM8916 Power Domain Indexes */
268 #define MSM8916_VDDCX 0
269 #define MSM8916_VDDCX_AO 1
270 #define MSM8916_VDDCX_VFC 2
271 #define MSM8916_VDDMX 3
272 #define MSM8916_VDDMX_AO 4
274 /* MSM8909 Power Domain Indexes */
275 #define MSM8909_VDDCX MSM8916_VDDCX
276 #define MSM8909_VDDCX_AO MSM8916_VDDCX_AO
277 #define MSM8909_VDDCX_VFC MSM8916_VDDCX_VFC
278 #define MSM8909_VDDMX MSM8916_VDDMX
279 #define MSM8909_VDDMX_AO MSM8916_VDDMX_AO
281 /* MSM8953 Power Domain Indexes */
282 #define MSM8953_VDDMD 0
283 #define MSM8953_VDDMD_AO 1
284 #define MSM8953_VDDCX 2
285 #define MSM8953_VDDCX_AO 3
286 #define MSM8953_VDDCX_VFL 4
287 #define MSM8953_VDDMX 5
288 #define MSM8953_VDDMX_AO 6
290 /* MSM8976 Power Domain Indexes */
291 #define MSM8976_VDDCX 0
292 #define MSM8976_VDDCX_AO 1
293 #define MSM8976_VDDCX_VFL 2
294 #define MSM8976_VDDMX 3
295 #define MSM8976_VDDMX_AO 4
296 #define MSM8976_VDDMX_VFL 5
298 /* MSM8994 Power Domain Indexes */
299 #define MSM8994_VDDCX 0
300 #define MSM8994_VDDCX_AO 1
301 #define MSM8994_VDDCX_VFC 2
302 #define MSM8994_VDDMX 3
303 #define MSM8994_VDDMX_AO 4
304 #define MSM8994_VDDGFX 5
305 #define MSM8994_VDDGFX_VFC 6
307 /* MSM8996 Power Domain Indexes */
308 #define MSM8996_VDDCX 0
309 #define MSM8996_VDDCX_AO 1
310 #define MSM8996_VDDCX_VFC 2
311 #define MSM8996_VDDMX 3
312 #define MSM8996_VDDMX_AO 4
313 #define MSM8996_VDDSSCX 5
314 #define MSM8996_VDDSSCX_VFC 6
316 /* MSM8998 Power Domain Indexes */
317 #define MSM8998_VDDCX 0
318 #define MSM8998_VDDCX_AO 1
319 #define MSM8998_VDDCX_VFL 2
320 #define MSM8998_VDDMX 3
321 #define MSM8998_VDDMX_AO 4
322 #define MSM8998_VDDMX_VFL 5
323 #define MSM8998_SSCCX 6
324 #define MSM8998_SSCCX_VFL 7
325 #define MSM8998_SSCMX 8
326 #define MSM8998_SSCMX_VFL 9
328 /* QCS404 Power Domains */
329 #define QCS404_VDDMX 0
330 #define QCS404_VDDMX_AO 1
331 #define QCS404_VDDMX_VFL 2
332 #define QCS404_LPICX 3
333 #define QCS404_LPICX_VFL 4
334 #define QCS404_LPIMX 5
335 #define QCS404_LPIMX_VFL 6
337 /* SDM660 Power Domains */
338 #define SDM660_VDDCX 0
339 #define SDM660_VDDCX_AO 1
340 #define SDM660_VDDCX_VFL 2
341 #define SDM660_VDDMX 3
342 #define SDM660_VDDMX_AO 4
343 #define SDM660_VDDMX_VFL 5
344 #define SDM660_SSCCX 6
345 #define SDM660_SSCCX_VFL 7
346 #define SDM660_SSCMX 8
347 #define SDM660_SSCMX_VFL 9
349 /* SM6115 Power Domains */
350 #define SM6115_VDDCX 0
351 #define SM6115_VDDCX_AO 1
352 #define SM6115_VDDCX_VFL 2
353 #define SM6115_VDDMX 3
354 #define SM6115_VDDMX_AO 4
355 #define SM6115_VDDMX_VFL 5
356 #define SM6115_VDD_LPI_CX 6
357 #define SM6115_VDD_LPI_MX 7
359 /* SM6125 Power Domains */
360 #define SM6125_VDDCX 0
361 #define SM6125_VDDCX_AO 1
362 #define SM6125_VDDCX_VFL 2
363 #define SM6125_VDDMX 3
364 #define SM6125_VDDMX_AO 4
365 #define SM6125_VDDMX_VFL 5
367 /* QCM2290 Power Domains */
368 #define QCM2290_VDDCX 0
369 #define QCM2290_VDDCX_AO 1
370 #define QCM2290_VDDCX_VFL 2
371 #define QCM2290_VDDMX 3
372 #define QCM2290_VDDMX_AO 4
373 #define QCM2290_VDDMX_VFL 5
374 #define QCM2290_VDD_LPI_CX 6
375 #define QCM2290_VDD_LPI_MX 7
377 /* RPM SMD Power Domain performance levels */
378 #define RPM_SMD_LEVEL_RETENTION 16
379 #define RPM_SMD_LEVEL_RETENTION_PLUS 32
380 #define RPM_SMD_LEVEL_MIN_SVS 48
381 #define RPM_SMD_LEVEL_LOW_SVS 64
382 #define RPM_SMD_LEVEL_SVS 128
383 #define RPM_SMD_LEVEL_SVS_PLUS 192
384 #define RPM_SMD_LEVEL_NOM 256
385 #define RPM_SMD_LEVEL_NOM_PLUS 320
386 #define RPM_SMD_LEVEL_TURBO 384
387 #define RPM_SMD_LEVEL_TURBO_NO_CPR 416
388 #define RPM_SMD_LEVEL_TURBO_HIGH 448
389 #define RPM_SMD_LEVEL_BINNING 512