include/dt-bindings/memory/bcm-ns3-mc.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2020 Broadcom
   4  */
   5
   6 #ifndef DT_BINDINGS_BCM_NS3_MC_H
   7 #define DT_BINDINGS_BCM_NS3_MC_H
   8
   9 /*
  10  * +--------+----------+ 0x8b000000
  11  * | NITRO CRASH DUMP  |  32MB
  12  * +--------+----------+ 0x8d000000
  13  * | SHMEM (NS)         | 16 MB
  14  * +-------------------+ 0x8e000000
  15  * |        | TEE_RAM(S)| 4MB
  16  * + TZDRAM +----------+ 0x8e400000
  17  * |        | TA_RAM(S) | 12MB
  18  * +--------+----------+ 0x8f000000
  19  * | BL31 + TMON + LPM  |
  20  * | memory             | 1MB
  21  * +-------------------+ 0x8f100000
  22  */
  23
  24 #define BCM_NS3_MEM_NITRO_CRASH_START  0x8ae00000
  25 #define BCM_NS3_MEM_NITRO_CRASH_LEN    0x21fffff
  26 #define BCM_NS3_MEM_NITRO_CRASH_SIZE   0x2200000
  27
  28 #define BCM_NS3_MEM_SHARE_START    0x8d000000
  29 #define BCM_NS3_MEM_SHARE_LEN      0x020fffff
  30
  31 /* ATF/U-boot/Linux error logs */
  32 #define BCM_NS3_MEM_ELOG_START     0x8f113000
  33 #define BCM_NS3_MEM_ELOG_LEN       0x00100000
  34
  35 /* CRMU Page table memroy */
  36 #define BCM_NS3_MEM_CRMU_PT_START  0x880000000
  37 #define BCM_NS3_MEM_CRMU_PT_LEN    0x200000
  38
  39 /* default memory starting address and length */
  40 #define BCM_NS3_MEM_START          0x80000000UL
  41 #define BCM_NS3_MEM_LEN            0x80000000UL
  42 #define BCM_NS3_MEM_END            (BCM_NS3_MEM_START + BCM_NS3_MEM_LEN)
  43
  44 /* memory starting address and length for BANK_1 */
  45 #define BCM_NS3_BANK_1_MEM_START   0x880000000UL
  46 #define BCM_NS3_BANK_1_MEM_LEN     0x180000000UL
  47
  48 /* memory layout information */
  49 #define BCM_NS3_DDR_INFO_BASE      0x8f220000
  50 #define BCM_NS3_DDR_INFO_RSVD_LEN  0x1000
  51 #define BCM_NS3_DDR_INFO_LEN       73
  52 #define BCM_NS3_DDR_INFO_SIG       0x42434d44
  53 #define BCM_NS3_MAX_NR_BANKS       4
  54
  55 #define BCM_NS3_GIC_LPI_BASE      0x8ad70000
  56 #define BCM_NS3_MEM_RSVE_START    BCM_NS3_GIC_LPI_BASE
  57 #define BCM_NS3_MEM_RSVE_END      ((BCM_NS3_MEM_ELOG_START + \
  58                                    BCM_NS3_MEM_ELOG_LEN) - \
  59                                    BCM_NS3_MEM_RSVE_START)
  60
  61 #define BCM_NS3_CRMU_PGT_START    0x880000000UL
  62 #define BCM_NS3_CRMU_PGT_SIZE     0x100000
  63 #endif