phy: marvell: cp110: add 5G XFI mode
[platform/kernel/u-boot.git] / include / dt-bindings / comphy / comphy_data.h
1 /*
2  * Copyright (C) 2015-2016 Marvell International Ltd.
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 #ifndef _COMPHY_DATA_H_
8 #define _COMPHY_DATA_H_
9
10 #define PHY_SPEED_1_25G                 0
11 #define PHY_SPEED_1_5G                  1
12 #define PHY_SPEED_2_5G                  2
13 #define PHY_SPEED_3G                    3
14 #define PHY_SPEED_3_125G                4
15 #define PHY_SPEED_5G                    5
16 #define PHY_SPEED_5_15625G              6
17 #define PHY_SPEED_6G                    7
18 #define PHY_SPEED_6_25G                 8
19 #define PHY_SPEED_10_3125G              9
20 #define PHY_SPEED_MAX                   10
21 #define PHY_SPEED_INVALID               0xff
22
23 #define PHY_TYPE_UNCONNECTED            0
24 #define PHY_TYPE_PEX0                   1
25 #define PHY_TYPE_PEX1                   2
26 #define PHY_TYPE_PEX2                   3
27 #define PHY_TYPE_PEX3                   4
28 #define PHY_TYPE_SATA0                  5
29 #define PHY_TYPE_SATA1                  6
30 #define PHY_TYPE_SATA2                  7
31 #define PHY_TYPE_SATA3                  8
32 #define PHY_TYPE_SGMII0                 9
33 #define PHY_TYPE_SGMII1                 10
34 #define PHY_TYPE_SGMII2                 11
35 #define PHY_TYPE_SGMII3                 12
36 #define PHY_TYPE_QSGMII                 13
37 #define PHY_TYPE_USB3_HOST0             14
38 #define PHY_TYPE_USB3_HOST1             15
39 #define PHY_TYPE_USB3_DEVICE            16
40 #define PHY_TYPE_XAUI0                  17
41 #define PHY_TYPE_XAUI1                  18
42 #define PHY_TYPE_XAUI2                  19
43 #define PHY_TYPE_XAUI3                  20
44 #define PHY_TYPE_RXAUI0                 21
45 #define PHY_TYPE_RXAUI1                 22
46 #define PHY_TYPE_SFI                    23
47 #define PHY_TYPE_IGNORE                 24
48 #define PHY_TYPE_MAX                    25
49 #define PHY_TYPE_INVALID                0xff
50
51 #define PHY_POLARITY_NO_INVERT          0
52 #define PHY_POLARITY_TXD_INVERT         1
53 #define PHY_POLARITY_RXD_INVERT         2
54 #define PHY_POLARITY_ALL_INVERT         \
55         (PHY_POLARITY_TXD_INVERT | PHY_POLARITY_RXD_INVERT)
56
57 #define UTMI_PHY_TO_USB3_HOST0          0
58 #define UTMI_PHY_TO_USB3_HOST1          1
59 #define UTMI_PHY_TO_USB3_DEVICE0        2
60 #define UTMI_PHY_INVALID                0xff
61
62 #endif /* _COMPHY_DATA_H_ */
63