1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2021 Raspberry Pi Ltd.
6 #define RP1_PLL_SYS_CORE 0
7 #define RP1_PLL_AUDIO_CORE 1
8 #define RP1_PLL_VIDEO_CORE 2
11 #define RP1_PLL_AUDIO 4
12 #define RP1_PLL_VIDEO 5
14 #define RP1_PLL_SYS_PRI_PH 6
15 #define RP1_PLL_SYS_SEC_PH 7
16 #define RP1_PLL_AUDIO_PRI_PH 8
18 #define RP1_PLL_SYS_SEC 9
19 #define RP1_PLL_AUDIO_SEC 10
20 #define RP1_PLL_VIDEO_SEC 11
22 #define RP1_CLK_SYS 12
23 #define RP1_CLK_SLOW_SYS 13
24 #define RP1_CLK_DMA 14
25 #define RP1_CLK_UART 15
26 #define RP1_CLK_ETH 16
27 #define RP1_CLK_PWM0 17
28 #define RP1_CLK_PWM1 18
29 #define RP1_CLK_AUDIO_IN 19
30 #define RP1_CLK_AUDIO_OUT 20
31 #define RP1_CLK_I2S 21
32 #define RP1_CLK_MIPI0_CFG 22
33 #define RP1_CLK_MIPI1_CFG 23
34 #define RP1_CLK_PCIE_AUX 24
35 #define RP1_CLK_USBH0_MICROFRAME 25
36 #define RP1_CLK_USBH1_MICROFRAME 26
37 #define RP1_CLK_USBH0_SUSPEND 27
38 #define RP1_CLK_USBH1_SUSPEND 28
39 #define RP1_CLK_ETH_TSU 29
40 #define RP1_CLK_ADC 30
41 #define RP1_CLK_SDIO_TIMER 31
42 #define RP1_CLK_SDIO_ALT_SRC 32
43 #define RP1_CLK_GP0 33
44 #define RP1_CLK_GP1 34
45 #define RP1_CLK_GP2 35
46 #define RP1_CLK_GP3 36
47 #define RP1_CLK_GP4 37
48 #define RP1_CLK_GP5 38
49 #define RP1_CLK_VEC 39
50 #define RP1_CLK_DPI 40
51 #define RP1_CLK_MIPI0_DPI 41
52 #define RP1_CLK_MIPI1_DPI 42