Linux 3.14.25
[platform/adaptation/renesas_rcar/renesas_kernel.git] / include / dt-bindings / clock / r8a7791-clock.h
1 /*
2  * Copyright 2013 Ideas On Board SPRL
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  */
9
10 #ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
11 #define __DT_BINDINGS_CLOCK_R8A7791_H__
12
13 /* CPG */
14 #define R8A7791_CLK_MAIN                0
15 #define R8A7791_CLK_PLL0                1
16 #define R8A7791_CLK_PLL1                2
17 #define R8A7791_CLK_PLL3                3
18 #define R8A7791_CLK_LB                  4
19 #define R8A7791_CLK_QSPI                5
20 #define R8A7791_CLK_SDH                 6
21 #define R8A7791_CLK_SD0                 7
22 #define R8A7791_CLK_Z                   8
23
24 /* MSTP0 */
25 #define R8A7791_CLK_MSIOF0              0
26
27 /* MSTP1 */
28 #define R8A7791_CLK_TMU1                11
29 #define R8A7791_CLK_TMU3                21
30 #define R8A7791_CLK_TMU2                22
31 #define R8A7791_CLK_CMT0                24
32 #define R8A7791_CLK_TMU0                25
33 #define R8A7791_CLK_VSP1_DU1            27
34 #define R8A7791_CLK_VSP1_DU0            28
35 #define R8A7791_CLK_VSP1_SY             31
36
37 /* MSTP2 */
38 #define R8A7791_CLK_SCIFA2              2
39 #define R8A7791_CLK_SCIFA1              3
40 #define R8A7791_CLK_SCIFA0              4
41 #define R8A7791_CLK_MSIOF2              5
42 #define R8A7791_CLK_SCIFB0              6
43 #define R8A7791_CLK_SCIFB1              7
44 #define R8A7791_CLK_MSIOF1              8
45 #define R8A7791_CLK_SCIFB2              16
46 #define R8A7791_CLK_DMAC                18
47
48 /* MSTP3 */
49 #define R8A7791_CLK_TPU0                4
50 #define R8A7791_CLK_SDHI2               11
51 #define R8A7791_CLK_SDHI1               12
52 #define R8A7791_CLK_SDHI0               14
53 #define R8A7791_CLK_MMCIF0              15
54 #define R8A7791_CLK_SSUSB               28
55 #define R8A7791_CLK_CMT1                29
56 #define R8A7791_CLK_USBDMAC0            30
57 #define R8A7791_CLK_USBDMAC1            31
58
59 /* MSTP5 */
60 #define R8A7791_CLK_THERMAL             22
61 #define R8A7791_CLK_PWM                 23
62
63 /* MSTP7 */
64 #define R8A7791_CLK_HSUSB               4
65 #define R8A7791_CLK_HSCIF2              13
66 #define R8A7791_CLK_SCIF5               14
67 #define R8A7791_CLK_SCIF4               15
68 #define R8A7791_CLK_HSCIF1              16
69 #define R8A7791_CLK_HSCIF0              17
70 #define R8A7791_CLK_SCIF3               18
71 #define R8A7791_CLK_SCIF2               19
72 #define R8A7791_CLK_SCIF1               20
73 #define R8A7791_CLK_SCIF0               21
74 #define R8A7791_CLK_DU1                 23
75 #define R8A7791_CLK_DU0                 24
76 #define R8A7791_CLK_LVDS0               26
77
78 /* MSTP8 */
79 #define R8A7791_CLK_VIN2                9
80 #define R8A7791_CLK_VIN1                10
81 #define R8A7791_CLK_VIN0                11
82 #define R8A7791_CLK_ETHER               13
83 #define R8A7791_CLK_SATA1               14
84 #define R8A7791_CLK_SATA0               15
85
86 /* MSTP9 */
87 #define R8A7791_CLK_GPIO7               4
88 #define R8A7791_CLK_GPIO6               5
89 #define R8A7791_CLK_GPIO5               7
90 #define R8A7791_CLK_GPIO4               8
91 #define R8A7791_CLK_GPIO3               9
92 #define R8A7791_CLK_GPIO2               10
93 #define R8A7791_CLK_GPIO1               11
94 #define R8A7791_CLK_GPIO0               12
95 #define R8A7791_CLK_RCAN1               15
96 #define R8A7791_CLK_RCAN0               16
97 #define R8A7791_CLK_QSPI_MOD            17
98 #define R8A7791_CLK_I2C5                25
99 #define R8A7791_CLK_IICDVFS             26
100 #define R8A7791_CLK_I2C4                27
101 #define R8A7791_CLK_I2C3                28
102 #define R8A7791_CLK_I2C2                29
103 #define R8A7791_CLK_I2C1                30
104 #define R8A7791_CLK_I2C0                31
105
106 /* MSTP11 */
107 #define R8A7791_CLK_SCIFA3              6
108 #define R8A7791_CLK_SCIFA4              7
109 #define R8A7791_CLK_SCIFA5              8
110
111 #endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */