cxl/region: fix x9 interleave typo
[platform/kernel/linux-starfive.git] / include / drm / intel-gtt.h
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Common header for intel-gtt.ko and i915.ko */
3
4 #ifndef _DRM_INTEL_GTT_H
5 #define _DRM_INTEL_GTT_H
6
7 #include <linux/types.h>
8
9 struct agp_bridge_data;
10 struct pci_dev;
11 struct sg_table;
12
13 void intel_gmch_gtt_get(u64 *gtt_total,
14                         phys_addr_t *mappable_base,
15                         resource_size_t *mappable_end);
16
17 int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
18                      struct agp_bridge_data *bridge);
19 void intel_gmch_remove(void);
20
21 bool intel_gmch_enable_gtt(void);
22
23 void intel_gmch_gtt_flush(void);
24 void intel_gmch_gtt_insert_page(dma_addr_t addr,
25                                 unsigned int pg,
26                                 unsigned int flags);
27 void intel_gmch_gtt_insert_sg_entries(struct sg_table *st,
28                                       unsigned int pg_start,
29                                       unsigned int flags);
30 void intel_gmch_gtt_clear_range(unsigned int first_entry, unsigned int num_entries);
31
32 /* Special gtt memory types */
33 #define AGP_DCACHE_MEMORY       1
34 #define AGP_PHYS_MEMORY         2
35
36 /* flag for GFDT type */
37 #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
38
39 #endif