1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2013 - 2017 Xilinx.
5 * Configuration settings for the Xilinx Zynq CSE board.
6 * See zynq-common.h for Zynq common configs
9 #ifndef __CONFIG_ZYNQ_CSE_H
10 #define __CONFIG_ZYNQ_CSE_H
12 #include <configs/zynq-common.h>
14 /* Undef unneeded configs */
15 #undef CONFIG_EXTRA_ENV_SETTINGS
17 #undef CONFIG_SYS_INIT_RAM_ADDR
18 #undef CONFIG_SYS_INIT_RAM_SIZE
19 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFDE000
20 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
22 #endif /* __CONFIG_ZYNQ_CSE_H */