1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4 * (C) Copyright 2013 - 2018 Xilinx, Inc.
6 * Common configuration options for all Zynq boards.
9 #ifndef __CONFIG_ZYNQ_COMMON_H
10 #define __CONFIG_ZYNQ_COMMON_H
13 #ifndef CONFIG_CPU_FREQ_HZ
14 # define CONFIG_CPU_FREQ_HZ 800000000
17 #define CONFIG_REMAKE_ELF
20 #define CONFIG_SYS_L2CACHE_OFF
21 #ifndef CONFIG_SYS_L2CACHE_OFF
22 # define CONFIG_SYS_L2_PL310
23 # define CONFIG_SYS_PL310_BASE 0xf8f02000
26 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
27 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR
28 #define CONFIG_SYS_TIMER_COUNTS_DOWN
29 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
32 /* The following table includes the supported baudrates */
33 #define CONFIG_SYS_BAUDRATE_TABLE \
34 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
36 #define CONFIG_ARM_DCC
39 #if defined(CONFIG_ZYNQ_GEM)
40 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
41 # define CONFIG_BOOTP_MAY_FAIL
45 #ifdef CONFIG_MTD_NOR_FLASH
46 # define CONFIG_SYS_FLASH_BASE 0xE2000000
47 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
48 # define CONFIG_SYS_MAX_FLASH_BANKS 1
49 # define CONFIG_SYS_MAX_FLASH_SECT 512
50 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000
51 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000
52 # define CONFIG_FLASH_SHOW_PROGRESS 10
53 # undef CONFIG_SYS_FLASH_EMPTY_INFO
56 #ifdef CONFIG_NAND_ZYNQ
57 #define CONFIG_SYS_MAX_NAND_DEVICE 1
58 #define CONFIG_SYS_NAND_ONFI_DETECTION
61 #ifdef CONFIG_USB_EHCI_ZYNQ
62 # define CONFIG_EHCI_IS_TDI
64 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
65 # define DFU_DEFAULT_POLL_TIMEOUT 300
66 # define CONFIG_THOR_RESET_OFF
67 # define DFU_ALT_INFO_RAM \
69 "setenv dfu_alt_info " \
70 "${kernel_image} ram 0x3000000 0x500000\\\\;" \
71 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
72 "${ramdisk_image} ram 0x2000000 0x600000\0" \
73 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
74 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
76 # if defined(CONFIG_MMC_SDHCI_ZYNQ)
77 # define DFU_ALT_INFO_MMC \
79 "setenv dfu_alt_info " \
80 "${kernel_image} fat 0 1\\\\;" \
81 "${devicetree_image} fat 0 1\\\\;" \
82 "${ramdisk_image} fat 0 1\0" \
83 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
84 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
86 # define DFU_ALT_INFO \
90 # define DFU_ALT_INFO \
95 #if !defined(DFU_ALT_INFO)
99 /* Allow to overwrite serial and ethaddr */
100 #define CONFIG_ENV_OVERWRITE
102 /* enable preboot to be loaded before CONFIG_BOOTDELAY */
104 /* Boot configuration */
105 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */
107 #ifdef CONFIG_SPL_BUILD
111 #ifdef CONFIG_CMD_MMC
112 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
114 #define BOOT_TARGET_DEVICES_MMC(func)
117 #ifdef CONFIG_CMD_USB
118 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) func(USB, usb, 1)
120 #define BOOT_TARGET_DEVICES_USB(func)
123 #if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP)
124 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
126 #define BOOT_TARGET_DEVICES_PXE(func)
129 #if defined(CONFIG_CMD_DHCP)
130 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
132 #define BOOT_TARGET_DEVICES_DHCP(func)
135 #if defined(CONFIG_ZYNQ_QSPI)
136 # define BOOT_TARGET_DEVICES_QSPI(func) func(QSPI, qspi, na)
138 # define BOOT_TARGET_DEVICES_QSPI(func)
141 #if defined(CONFIG_NAND_ZYNQ)
142 # define BOOT_TARGET_DEVICES_NAND(func) func(NAND, nand, na)
144 # define BOOT_TARGET_DEVICES_NAND(func)
147 #if defined(CONFIG_MTD_NOR_FLASH)
148 # define BOOT_TARGET_DEVICES_NOR(func) func(NOR, nor, na)
150 # define BOOT_TARGET_DEVICES_NOR(func)
153 #define BOOTENV_DEV_QSPI(devtypeu, devtypel, instance) \
154 "bootcmd_qspi=sf probe 0 0 0 && " \
155 "sf read ${scriptaddr} ${script_offset_f} ${script_size_f} && " \
156 "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
158 #define BOOTENV_DEV_NAME_QSPI(devtypeu, devtypel, instance) \
161 #define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
162 "bootcmd_nand=nand info && " \
163 "nand read ${scriptaddr} ${script_offset_f} ${script_size_f} && " \
164 "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
166 #define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
169 #define BOOTENV_DEV_NOR(devtypeu, devtypel, instance) \
170 "script_offset_nor=0xE2FC0000\0" \
171 "bootcmd_nor=cp.b ${script_offset_nor} ${scriptaddr} ${script_size_f} && " \
172 "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
174 #define BOOTENV_DEV_NAME_NOR(devtypeu, devtypel, instance) \
177 #define BOOT_TARGET_DEVICES_JTAG(func) func(JTAG, jtag, na)
179 #define BOOTENV_DEV_JTAG(devtypeu, devtypel, instance) \
180 "bootcmd_jtag=source $scriptaddr; echo SCRIPT FAILED: continuing...;\0"
182 #define BOOTENV_DEV_NAME_JTAG(devtypeu, devtypel, instance) \
185 #define BOOT_TARGET_DEVICES(func) \
186 BOOT_TARGET_DEVICES_JTAG(func) \
187 BOOT_TARGET_DEVICES_MMC(func) \
188 BOOT_TARGET_DEVICES_QSPI(func) \
189 BOOT_TARGET_DEVICES_NAND(func) \
190 BOOT_TARGET_DEVICES_NOR(func) \
191 BOOT_TARGET_DEVICES_USB(func) \
192 BOOT_TARGET_DEVICES_PXE(func) \
193 BOOT_TARGET_DEVICES_DHCP(func)
195 #include <config_distro_bootcmd.h>
196 #endif /* CONFIG_SPL_BUILD */
198 /* Default environment */
199 #ifndef CONFIG_EXTRA_ENV_SETTINGS
200 #define CONFIG_EXTRA_ENV_SETTINGS \
201 "fdt_high=0x20000000\0" \
202 "initrd_high=0x20000000\0" \
203 "scriptaddr=0x20000\0" \
204 "script_size_f=0x40000\0" \
205 "fdt_addr_r=0x1f00000\0" \
206 "pxefile_addr_r=0x2000000\0" \
207 "kernel_addr_r=0x2000000\0" \
208 "scriptaddr=0x3000000\0" \
209 "ramdisk_addr_r=0x3100000\0" \
214 /* Miscellaneous configurable options */
216 #define CONFIG_CLOCKS
217 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
218 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O Buffer Size */
220 #define CONFIG_SYS_MEMTEST_START 0
221 #define CONFIG_SYS_MEMTEST_END 0x1000
223 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
224 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000
225 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
226 CONFIG_SYS_INIT_RAM_SIZE - \
227 GENERATED_GBL_DATA_SIZE)
230 /* Extend size of kernel image for uncompression */
231 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
233 /* Boot FreeBSD/vxWorks from an ELF image */
234 #define CONFIG_SYS_MMC_MAX_DEVICE 1
237 #ifdef CONFIG_MMC_SDHCI_ZYNQ
238 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
239 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
242 /* Address in RAM where the parameters must be copied by SPL. */
243 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
245 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
246 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
248 /* Not using MMC raw mode - just for compilation purpose */
249 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
250 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
251 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
253 /* qspi mode is working fine */
254 #ifdef CONFIG_ZYNQ_QSPI
255 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
256 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
257 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \
258 CONFIG_SYS_SPI_ARGS_SIZE)
261 /* SP location before relocation, must use scratch RAM */
263 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
264 #define CONFIG_SPL_MAX_SIZE 0x30000
266 /* On the top of OCM space */
267 #define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR
268 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000
271 * SPL stack position - and stack goes down
272 * 0xfffffe00 is used for putting wfi loop.
273 * Set it up as limit for now.
275 #define CONFIG_SPL_STACK 0xfffffe00
278 #define CONFIG_SPL_BSS_START_ADDR 0x100000
279 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000
281 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000
283 #endif /* __CONFIG_ZYNQ_COMMON_H */