include/configs/zynq-common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
   4  * (C) Copyright 2013 - 2018 Xilinx, Inc.
   5  *
   6  * Common configuration options for all Zynq boards.
   7  */
   8
   9 #ifndef __CONFIG_ZYNQ_COMMON_H
  10 #define __CONFIG_ZYNQ_COMMON_H
  11
  12 /* CPU clock */
  13 #ifndef CONFIG_CPU_FREQ_HZ
  14 # define CONFIG_CPU_FREQ_HZ     800000000
  15 #endif
  16
  17 /* Cache options */
  18 #define CONFIG_SYS_L2CACHE_OFF
  19 #ifndef CONFIG_SYS_L2CACHE_OFF
  20 # define CONFIG_SYS_L2_PL310
  21 # define CONFIG_SYS_PL310_BASE          0xf8f02000
  22 #endif
  23
  24 #define ZYNQ_SCUTIMER_BASEADDR          0xF8F00600
  25 #define CONFIG_SYS_TIMERBASE            ZYNQ_SCUTIMER_BASEADDR
  26 #define CONFIG_SYS_TIMER_COUNTS_DOWN
  27 #define CONFIG_SYS_TIMER_COUNTER        (CONFIG_SYS_TIMERBASE + 0x4)
  28
  29 /* Serial drivers */
  30 /* The following table includes the supported baudrates */
  31 #define CONFIG_SYS_BAUDRATE_TABLE  \
  32         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
  33
  34 #define CONFIG_ARM_DCC
  35
  36 /* Ethernet driver */
  37 #if defined(CONFIG_ZYNQ_GEM)
  38 # define CONFIG_MII
  39 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  40 # define CONFIG_BOOTP_MAY_FAIL
  41 #endif
  42
  43 /* QSPI */
  44 #ifdef CONFIG_ZYNQ_QSPI
  45 # define CONFIG_SF_DEFAULT_SPEED        30000000
  46 # define CONFIG_SPI_FLASH_ISSI
  47 #endif
  48
  49 /* NOR */
  50 #ifdef CONFIG_MTD_NOR_FLASH
  51 # define CONFIG_SYS_FLASH_BASE          0xE2000000
  52 # define CONFIG_SYS_FLASH_SIZE          (16 * 1024 * 1024)
  53 # define CONFIG_SYS_MAX_FLASH_BANKS     1
  54 # define CONFIG_SYS_MAX_FLASH_SECT      512
  55 # define CONFIG_SYS_FLASH_ERASE_TOUT    1000
  56 # define CONFIG_SYS_FLASH_WRITE_TOUT    5000
  57 # define CONFIG_FLASH_SHOW_PROGRESS     10
  58 # define CONFIG_SYS_FLASH_CFI
  59 # undef CONFIG_SYS_FLASH_EMPTY_INFO
  60 # define CONFIG_FLASH_CFI_DRIVER
  61 # undef CONFIG_SYS_FLASH_PROTECTION
  62 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  63 #endif
  64
  65 #ifdef CONFIG_NAND_ZYNQ
  66 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  67 #define CONFIG_SYS_NAND_ONFI_DETECTION
  68 #endif
  69
  70 #ifdef CONFIG_USB_EHCI_ZYNQ
  71 # define CONFIG_EHCI_IS_TDI
  72
  73 # define CONFIG_SYS_DFU_DATA_BUF_SIZE   0x600000
  74 # define DFU_DEFAULT_POLL_TIMEOUT       300
  75 # define CONFIG_USB_CABLE_CHECK
  76 # define CONFIG_THOR_RESET_OFF
  77 # define DFU_ALT_INFO_RAM \
  78         "dfu_ram_info=" \
  79         "set dfu_alt_info " \
  80         "${kernel_image} ram 0x3000000 0x500000\\\\;" \
  81         "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
  82         "${ramdisk_image} ram 0x2000000 0x600000\0" \
  83         "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
  84         "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
  85
  86 # if defined(CONFIG_MMC_SDHCI_ZYNQ)
  87 #  define DFU_ALT_INFO_MMC \
  88         "dfu_mmc_info=" \
  89         "set dfu_alt_info " \
  90         "${kernel_image} fat 0 1\\\\;" \
  91         "${devicetree_image} fat 0 1\\\\;" \
  92         "${ramdisk_image} fat 0 1\0" \
  93         "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
  94         "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
  95
  96 #  define DFU_ALT_INFO  \
  97         DFU_ALT_INFO_RAM \
  98         DFU_ALT_INFO_MMC
  99 # else
 100 #  define DFU_ALT_INFO  \
 101         DFU_ALT_INFO_RAM
 102 # endif
 103 #endif
 104
 105 #if !defined(DFU_ALT_INFO)
 106 # define DFU_ALT_INFO
 107 #endif
 108
 109 /* I2C */
 110 #if defined(CONFIG_SYS_I2C_ZYNQ)
 111 # define CONFIG_SYS_I2C
 112 #endif
 113
 114 /* EEPROM */
 115 #ifdef CONFIG_ZYNQ_EEPROM
 116 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         1
 117 # define CONFIG_SYS_I2C_EEPROM_ADDR             0x54
 118 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS      4
 119 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  5
 120 # define CONFIG_SYS_EEPROM_SIZE                 1024 /* Bytes */
 121 #endif
 122
 123 /* Allow to overwrite serial and ethaddr */
 124 #define CONFIG_ENV_OVERWRITE
 125
 126 /* enable preboot to be loaded before CONFIG_BOOTDELAY */
 127 #define CONFIG_PREBOOT
 128
 129 /* Boot configuration */
 130 #define CONFIG_SYS_LOAD_ADDR            0 /* default? */
 131
 132 /* Distro boot enablement */
 133
 134 #ifdef CONFIG_SPL_BUILD
 135 #define BOOTENV
 136 #else
 137
 138 #ifdef CONFIG_CMD_MMC
 139 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
 140 #else
 141 #define BOOT_TARGET_DEVICES_MMC(func)
 142 #endif
 143
 144 #ifdef CONFIG_CMD_USB
 145 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
 146 #else
 147 #define BOOT_TARGET_DEVICES_USB(func)
 148 #endif
 149
 150 #if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP)
 151 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
 152 #else
 153 #define BOOT_TARGET_DEVICES_PXE(func)
 154 #endif
 155
 156 #if defined(CONFIG_CMD_DHCP)
 157 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
 158 #else
 159 #define BOOT_TARGET_DEVICES_DHCP(func)
 160 #endif
 161
 162 #define BOOT_TARGET_DEVICES(func) \
 163         BOOT_TARGET_DEVICES_MMC(func) \
 164         BOOT_TARGET_DEVICES_USB(func) \
 165         BOOT_TARGET_DEVICES_PXE(func) \
 166         BOOT_TARGET_DEVICES_DHCP(func)
 167
 168 #include <config_distro_bootcmd.h>
 169 #endif /* CONFIG_SPL_BUILD */
 170
 171 /* Default environment */
 172 #ifndef CONFIG_EXTRA_ENV_SETTINGS
 173 #define CONFIG_EXTRA_ENV_SETTINGS       \
 174         "fit_image=fit.itb\0"           \
 175         "load_addr=0x2000000\0"         \
 176         "fit_size=0x800000\0"           \
 177         "flash_off=0x100000\0"          \
 178         "nor_flash_off=0xE2100000\0"    \
 179         "fdt_high=0x20000000\0"         \
 180         "initrd_high=0x20000000\0"      \
 181         "loadbootenv_addr=0x2000000\0" \
 182         "fdt_addr_r=0x1f00000\0"        \
 183         "pxefile_addr_r=0x2000000\0"    \
 184         "kernel_addr_r=0x2000000\0"     \
 185         "scriptaddr=0x3000000\0"        \
 186         "ramdisk_addr_r=0x3100000\0"    \
 187         "bootenv=uEnv.txt\0" \
 188         "bootenv_dev=mmc\0" \
 189         "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
 190         "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
 191                 "env import -t ${loadbootenv_addr} $filesize\0" \
 192         "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
 193         "setbootenv=if env run bootenv_existence_test; then " \
 194                         "if env run loadbootenv; then " \
 195                                 "env run importbootenv; " \
 196                         "fi; " \
 197                 "fi; \0" \
 198         "sd_loadbootenv=set bootenv_dev mmc && " \
 199                         "run setbootenv \0" \
 200         "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
 201         "preboot=if test $modeboot = sdboot; then " \
 202                         "run sd_loadbootenv; " \
 203                         "echo Checking if uenvcmd is set ...; " \
 204                         "if test -n $uenvcmd; then " \
 205                                 "echo Running uenvcmd ...; " \
 206                                 "run uenvcmd; " \
 207                         "fi; " \
 208                 "fi; \0" \
 209         "norboot=echo Copying FIT from NOR flash to RAM... && " \
 210                 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
 211                 "bootm ${load_addr}\0" \
 212         "sdboot=echo Copying FIT from SD to RAM... && " \
 213                 "load mmc 0 ${load_addr} ${fit_image} && " \
 214                 "bootm ${load_addr}\0" \
 215         "jtagboot=echo TFTPing FIT to RAM... && " \
 216                 "tftpboot ${load_addr} ${fit_image} && " \
 217                 "bootm ${load_addr}\0" \
 218         "usbboot=if usb start; then " \
 219                         "echo Copying FIT from USB to RAM... && " \
 220                         "load usb 0 ${load_addr} ${fit_image} && " \
 221                         "bootm ${load_addr}; fi\0" \
 222                 DFU_ALT_INFO \
 223                 BOOTENV
 224 #endif
 225
 226 /* Miscellaneous configurable options */
 227
 228 #define CONFIG_CLOCKS
 229 #define CONFIG_SYS_MAXARGS              32 /* max number of command args */
 230
 231 #ifndef CONFIG_NR_DRAM_BANKS
 232 # define CONFIG_NR_DRAM_BANKS           1
 233 #endif
 234
 235 #define CONFIG_SYS_MEMTEST_START        0
 236 #define CONFIG_SYS_MEMTEST_END          0x1000
 237
 238 #define CONFIG_SYS_MALLOC_LEN           0x1400000
 239
 240 #define CONFIG_SYS_INIT_RAM_ADDR        0xFFFF0000
 241 #define CONFIG_SYS_INIT_RAM_SIZE        0x1000
 242 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 243                                         CONFIG_SYS_INIT_RAM_SIZE - \
 244                                         GENERATED_GBL_DATA_SIZE)
 245
 246
 247 /* Extend size of kernel image for uncompression */
 248 #define CONFIG_SYS_BOOTM_LEN    (60 * 1024 * 1024)
 249
 250 /* Boot FreeBSD/vxWorks from an ELF image */
 251 #define CONFIG_SYS_MMC_MAX_DEVICE       1
 252
 253 #define CONFIG_SYS_LDSCRIPT  "arch/arm/mach-zynq/u-boot.lds"
 254
 255 /* Commands */
 256
 257 /* SPL part */
 258
 259 /* MMC support */
 260 #ifdef CONFIG_MMC_SDHCI_ZYNQ
 261 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
 262 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot.img"
 263 #endif
 264
 265 /* Disable dcache for SPL just for sure */
 266 #ifdef CONFIG_SPL_BUILD
 267 #define CONFIG_SYS_DCACHE_OFF
 268 #endif
 269
 270 /* Address in RAM where the parameters must be copied by SPL. */
 271 #define CONFIG_SYS_SPL_ARGS_ADDR        0x10000000
 272
 273 #define CONFIG_SPL_FS_LOAD_ARGS_NAME            "system.dtb"
 274 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME          "uImage"
 275
 276 /* Not using MMC raw mode - just for compilation purpose */
 277 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR   0
 278 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS  0
 279 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
 280
 281 /* qspi mode is working fine */
 282 #ifdef CONFIG_ZYNQ_QSPI
 283 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x100000
 284 #define CONFIG_SYS_SPI_ARGS_OFFS        0x200000
 285 #define CONFIG_SYS_SPI_ARGS_SIZE        0x80000
 286 #define CONFIG_SYS_SPI_KERNEL_OFFS      (CONFIG_SYS_SPI_ARGS_OFFS + \
 287                                         CONFIG_SYS_SPI_ARGS_SIZE)
 288 #endif
 289
 290 /* for booting directly linux */
 291
 292 /* SP location before relocation, must use scratch RAM */
 293 #define CONFIG_SPL_TEXT_BASE    0x0
 294
 295 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
 296 #define CONFIG_SPL_MAX_SIZE     0x30000
 297
 298 /* On the top of OCM space */
 299 #define CONFIG_SYS_SPL_MALLOC_START     CONFIG_SPL_STACK_R_ADDR
 300 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x2000000
 301
 302 /*
 303  * SPL stack position - and stack goes down
 304  * 0xfffffe00 is used for putting wfi loop.
 305  * Set it up as limit for now.
 306  */
 307 #define CONFIG_SPL_STACK        0xfffffe00
 308
 309 /* BSS setup */
 310 #define CONFIG_SPL_BSS_START_ADDR       0x100000
 311 #define CONFIG_SPL_BSS_MAX_SIZE         0x100000
 312
 313 #define CONFIG_SYS_UBOOT_START  CONFIG_SYS_TEXT_BASE
 314
 315 #endif /* __CONFIG_ZYNQ_COMMON_H */