2 * Aeronix Zipit Z2 configuration file
4 * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * High Level Board Configuration Options
28 #define CONFIG_PXA27X 1 /* Marvell PXA270 CPU */
29 #define CONFIG_ZIPITZ2 1 /* Zipit Z2 board */
30 #define CONFIG_SYS_TEXT_BASE 0x0
32 #undef BOARD_LATE_INIT
33 #undef CONFIG_SKIP_RELOCATE_UBOOT
35 #undef CONFIG_SKIP_LOWLEVEL_INIT
38 * Environment settings
40 #define CONFIG_ENV_OVERWRITE
41 #define CONFIG_ENV_IS_IN_FLASH 1
42 #define CONFIG_ENV_ADDR 0x40000
43 #define CONFIG_ENV_SIZE 0x20000
45 #define CONFIG_SYS_MALLOC_LEN (128*1024)
46 #define CONFIG_SYS_GBL_DATA_SIZE 512
47 #define CONFIG_ARCH_CPU_INIT
49 #define CONFIG_BOOTCOMMAND \
50 "if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then " \
51 "source 0xa0000000; " \
55 #define CONFIG_BOOTARGS \
56 "console=tty0 console=ttyS2,115200 fbcon=rotate:3"
57 #define CONFIG_TIMESTAMP
58 #define CONFIG_BOOTDELAY 2 /* Autoboot delay */
59 #define CONFIG_CMDLINE_TAG
60 #define CONFIG_SETUP_MEMORY_TAGS
61 #define CONFIG_SYS_TEXT_BASE 0x0
62 #define CONFIG_LZMA /* LZMA compression support */
65 * Serial Console Configuration
66 * STUART - the lower serial port on Colibri board
68 #define CONFIG_PXA_SERIAL
69 #define CONFIG_STUART 1
70 #define CONFIG_BAUDRATE 115200
71 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
74 * Bootloader Components Configuration
76 #include <config_cmd_default.h>
79 #define CONFIG_CMD_ENV
80 #undef CONFIG_CMD_IMLS
81 #define CONFIG_CMD_MMC
82 #define CONFIG_CMD_SPI
85 * MMC Card Configuration
89 #define CONFIG_PXA_MMC
90 #define CONFIG_SYS_MMC_BASE 0xF0000000
91 #define CONFIG_CMD_FAT
92 #define CONFIG_CMD_EXT2
93 #define CONFIG_DOS_PARTITION
100 #define CONFIG_SOFT_SPI
102 #define CONFIG_LMS283GF05
103 #define CONFIG_VIDEO_LOGO
104 #define CONFIG_CMD_BMP
105 #define CONFIG_SPLASH_SCREEN
106 #define CONFIG_SPLASH_SCREEN_ALIGN
107 #define CONFIG_VIDEO_BMP_GZIP
108 #define CONFIG_VIDEO_BMP_RLE8
109 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
112 #define SPI_DELAY udelay(10)
113 #define SPI_SDA(val) zipitz2_spi_sda(val)
114 #define SPI_SCL(val) zipitz2_spi_scl(val)
115 #define SPI_READ zipitz2_spi_read()
117 void zipitz2_spi_sda(int);
118 void zipitz2_spi_scl(int);
119 unsigned char zipitz2_spi_read(void);
126 #ifdef CONFIG_CMD_KGDB
127 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
128 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
132 * HUSH Shell Configuration
134 #define CONFIG_SYS_HUSH_PARSER 1
135 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
137 #define CONFIG_SYS_LONGHELP /* undef to save memory */
138 #ifdef CONFIG_SYS_HUSH_PARSER
139 #define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */
141 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
143 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
144 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
145 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
146 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
147 #define CONFIG_SYS_DEVICE_NULLDEV 1
150 * Clock Configuration
152 #undef CONFIG_SYS_CLKS_IN_HZ
153 #define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */
154 #define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */
159 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
160 #ifdef CONFIG_USE_IRQ
161 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
162 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
168 #define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */
169 #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
170 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
172 #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
173 #define CONFIG_SYS_DRAM_SIZE 0x02000000 /* 32 MB DRAM */
175 #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
176 #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
178 #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE
180 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
181 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1 + 2048)
186 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
187 #define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
188 #define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */
189 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
191 #define CONFIG_SYS_FLASH_CFI
192 #define CONFIG_FLASH_CFI_DRIVER 1
193 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
195 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
196 #define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE
198 #define CONFIG_SYS_MAX_FLASH_BANKS 1
199 #define CONFIG_SYS_MAX_FLASH_SECT 256
201 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
203 #define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ)
204 #define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ)
205 #define CONFIG_SYS_FLASH_LOCK_TOUT (2*CONFIG_SYS_HZ)
206 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (2*CONFIG_SYS_HZ)
207 #define CONFIG_SYS_FLASH_PROTECTION
212 #define CONFIG_SYS_GAFR0_L_VAL 0x02000140
213 #define CONFIG_SYS_GAFR0_U_VAL 0x59188000
214 #define CONFIG_SYS_GAFR1_L_VAL 0x63900002
215 #define CONFIG_SYS_GAFR1_U_VAL 0xaaa03950
216 #define CONFIG_SYS_GAFR2_L_VAL 0x0aaaaaaa
217 #define CONFIG_SYS_GAFR2_U_VAL 0x29000308
218 #define CONFIG_SYS_GAFR3_L_VAL 0x54000000
219 #define CONFIG_SYS_GAFR3_U_VAL 0x000000d5
220 #define CONFIG_SYS_GPCR0_VAL 0x00000000
221 #define CONFIG_SYS_GPCR1_VAL 0x00000020
222 #define CONFIG_SYS_GPCR2_VAL 0x00000000
223 #define CONFIG_SYS_GPCR3_VAL 0x00000000
224 #define CONFIG_SYS_GPDR0_VAL 0xdafcee00
225 #define CONFIG_SYS_GPDR1_VAL 0xffa3aaab
226 #define CONFIG_SYS_GPDR2_VAL 0x8fe9ffff
227 #define CONFIG_SYS_GPDR3_VAL 0x001b1f8a
228 #define CONFIG_SYS_GPSR0_VAL 0x06080400
229 #define CONFIG_SYS_GPSR1_VAL 0x007f0000
230 #define CONFIG_SYS_GPSR2_VAL 0x032a0000
231 #define CONFIG_SYS_GPSR3_VAL 0x00000180
233 #define CONFIG_SYS_PSSR_VAL 0x30
238 #define CONFIG_SYS_CKEN 0x00511220
239 #define CONFIG_SYS_CCCR 0x00000190
244 #define CONFIG_SYS_MSC0_VAL 0x2ffc38f8
245 #define CONFIG_SYS_MSC1_VAL 0x0000ccd1
246 #define CONFIG_SYS_MSC2_VAL 0x0000b884
247 #define CONFIG_SYS_MDCNFG_VAL 0x08000ba9
248 #define CONFIG_SYS_MDREFR_VAL 0x2011a01e
249 #define CONFIG_SYS_MDMRS_VAL 0x00000000
250 #define CONFIG_SYS_FLYCNFG_VAL 0x00010001
251 #define CONFIG_SYS_SXCNFG_VAL 0x40044004
254 * PCMCIA and CF Interfaces
256 #define CONFIG_SYS_MECR_VAL 0x00000001
257 #define CONFIG_SYS_MCMEM0_VAL 0x00014307
258 #define CONFIG_SYS_MCMEM1_VAL 0x00014307
259 #define CONFIG_SYS_MCATT0_VAL 0x0001c787
260 #define CONFIG_SYS_MCATT1_VAL 0x0001c787
261 #define CONFIG_SYS_MCIO0_VAL 0x0001430f
262 #define CONFIG_SYS_MCIO1_VAL 0x0001430f
264 #endif /* __CONFIG_H */