3 * See file CREDITS for list of people who contributed to this
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 /************************************************************************
23 * yosemite.h - configuration for YOSEMITE board
24 ***********************************************************************/
28 /*-----------------------------------------------------------------------
29 * High Level Configuration Options
30 *----------------------------------------------------------------------*/
31 #define CONFIG_YOSEMITE 1 /* Board is BAMBOO */
32 #define CONFIG_440_EP 1 /* Specific PPC440EP support */
34 #define CONFIG_4xx 1 /* ... PPC4xx family */
35 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
36 #undef CFG_DRAM_TEST /* disable - takes long time! */
37 #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
39 /*-----------------------------------------------------------------------
40 * Base addresses -- Note these are effective addresses where the
41 * actual resources get mapped (not physical addresses)
42 *----------------------------------------------------------------------*/
43 #define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
44 #define CFG_FLASH_BASE 0xfe000000 /* start of FLASH */
45 #define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
46 #define CFG_PCI_MEMBASE 0xa0000000 /* mapped pci memory */
47 #define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
48 #define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000
49 #define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000
52 /*Don't change either of these*/
53 #define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals */
54 #define CFG_PCI_BASE 0xe0000000 /* internal PCI regs */
55 /*Don't change either of these*/
57 #define CFG_USB_DEVICE 0x50000000
58 #define CFG_NVRAM_BASE_ADDR 0x80000000
59 #define CFG_BCSR_BASE (CFG_NVRAM_BASE_ADDR | 0x2000)
61 /*-----------------------------------------------------------------------
62 * Initial RAM & stack pointer (placed in SDRAM)
63 *----------------------------------------------------------------------*/
64 #define CFG_INIT_RAM_ADDR 0xf0000000 /* DCache */
65 #define CFG_INIT_RAM_END 0x2000
66 #define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
67 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
68 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
70 #define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
71 #define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc*/
72 #define CFG_KBYTES_SDRAM ( 128 * 1024) /* 128MB */
73 #define CFG_SDRAM_BANKS (2)
74 /*-----------------------------------------------------------------------
76 *----------------------------------------------------------------------*/
77 #undef CONFIG_SERIAL_SOFTWARE_FIFO
78 #define CFG_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */
79 #define CONFIG_BAUDRATE 9600
80 #define CONFIG_SERIAL_MULTI 1
81 /*define this if you want console on UART1*/
82 #undef CONFIG_UART1_CONSOLE
84 #define CFG_BAUDRATE_TABLE \
85 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
87 /*-----------------------------------------------------------------------
90 * NOTE: The RTC registers are located at 0x7FFF0 - 0x7FFFF
91 * The DS1558 code assumes this condition
93 *----------------------------------------------------------------------*/
94 #define CFG_NVRAM_SIZE (0x2000 - 0x10) /* NVRAM size(8k)- RTC regs */
95 #define CONFIG_RTC_DS1556 1 /* DS1556 RTC */
97 /*-----------------------------------------------------------------------
99 *----------------------------------------------------------------------*/
100 #if 1 /* test-only */
101 #define CFG_MAX_FLASH_BANKS 1 /* number of banks */
102 #define CFG_MAX_FLASH_SECT 256 /* sectors per device */
104 #undef CFG_FLASH_CHECKSUM
105 #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
106 #define CFG_FLASH_WRITE_TOUT 120000 /* Timeout for Flash Write (in ms) */
108 #define CFG_FLASH_CFI /* The flash is CFI compatible */
109 #define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
110 #define CFG_FLASH_CFI_AMD_RESET 1 /* AMD RESET for STM 29W320DB! */
112 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
113 #define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
115 #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
116 #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
118 #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
121 /*-----------------------------------------------------------------------
123 *----------------------------------------------------------------------*/
124 #undef CONFIG_SPD_EEPROM /* Don't use SPD EEPROM for setup */
126 /*-----------------------------------------------------------------------
128 *----------------------------------------------------------------------*/
129 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
130 #undef CONFIG_SOFT_I2C /* I2C bit-banged */
131 #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
132 #define CFG_I2C_SLAVE 0x7F
135 /*-----------------------------------------------------------------------
137 *----------------------------------------------------------------------*/
138 #undef CFG_ENV_IS_IN_NVRAM /*No NVRAM on board*/
139 #undef CFG_ENV_IS_IN_FLASH /* ... not in flash */
140 #define CFG_ENV_IS_IN_EEPROM 1
142 /* Define to allow the user to overwrite serial and ethaddr */
143 #define CONFIG_ENV_OVERWRITE
145 #define CFG_I2C_MULTI_EEPROMS
146 #define CFG_ENV_SIZE 0x200 /* Size of Environment vars */
147 #define CFG_ENV_OFFSET 0x0
148 #define CFG_I2C_EEPROM_ADDR (0xa8>>1)
149 #define CFG_I2C_EEPROM_ADDR_LEN 1
150 #define CFG_EEPROM_PAGE_WRITE_ENABLE
151 #define CFG_EEPROM_PAGE_WRITE_BITS 3
152 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
154 #define CONFIG_BOOTCOMMAND "bootm 0xfe000000" /* autoboot command */
155 #define CONFIG_BOOTDELAY 3 /* disable autoboot */
157 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
158 #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
160 #define CONFIG_MII 1 /* MII PHY management */
161 #define CONFIG_NET_MULTI 1 /* required for netconsole */
162 #define CONFIG_PHY1_ADDR 3
163 #define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
164 #define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
165 #define CONFIG_NETMASK 255.255.255.0
166 #define CONFIG_IPADDR 10.0.4.251
167 #define CONFIG_ETHADDR 00:10:EC:00:12:34
168 #define CONFIG_ETH1ADDR 00:10:EC:00:12:35
170 #define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
171 #define CONFIG_SERVERIP 10.0.4.115
174 #define CONFIG_MAC_PARTITION
175 #define CONFIG_DOS_PARTITION
176 #define CONFIG_ISO_PARTITION
180 #define CONFIG_USB_OHCI
181 #define CONFIG_USB_STORAGE
183 /*Comment this out to enable USB 1.1 device*/
184 #define USB_2_0_DEVICE
185 #endif /*CONFIG_440_EP*/
188 #define CONFIG_PANIC_HANG
190 #define CONFIG_HW_WATCHDOG /* watchdog */
194 /* Need to define POST */
195 #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \
202 /* CFG_CMD_EXT2 |*/ \
207 /* CFG_CMD_KGDB |*/ \
218 #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \
225 /* CFG_CMD_EXT2 |*/ \
230 /* CFG_CMD_KGDB |*/ \
241 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
242 #include <cmd_confdefs.h>
245 * Miscellaneous configurable options
247 #define CFG_LONGHELP /* undef to save memory */
248 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
249 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
250 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
252 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
254 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
255 #define CFG_MAXARGS 16 /* max number of command args */
256 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
258 #define CFG_MEMTEST_START 0x0400000 /* memtest works on */
259 #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
261 #define CFG_LOAD_ADDR 0x100000 /* default load address */
262 #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
263 #define CONFIG_LYNXKDI 1 /* support kdi files */
265 #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
267 /*-----------------------------------------------------------------------
269 *-----------------------------------------------------------------------
272 #define CONFIG_PCI /* include pci support */
273 #undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
274 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
275 #define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
277 /* Board-specific PCI */
278 #define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
279 #define CFG_PCI_TARGET_INIT
280 #define CFG_PCI_MASTER_INIT
282 #define CFG_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
283 #define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
286 * For booting Linux, the board info and command line data
287 * have to be in the first 8 MB of memory, since this is
288 * the maximum mapped by the Linux kernel during initialization.
290 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
291 /*-----------------------------------------------------------------------
292 * Cache Configuration
294 #define CFG_DCACHE_SIZE 8192 /* For IBM 405 CPUs */
295 #define CFG_CACHELINE_SIZE 32 /* ... */
296 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
297 #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
301 * Internal Definitions
305 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
306 #define BOOTFLAG_WARM 0x02 /* Software reboot */
308 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
309 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
310 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
312 #endif /* __CONFIG_H */