1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
5 * Configuration settings for the CCV xPress board
7 #ifndef __XPRESS_CONFIG_H
8 #define __XPRESS_CONFIG_H
10 #include "mx6_common.h"
11 #include <asm/mach-imx/gpio.h>
16 /* Size of malloc() pool */
17 #define CONFIG_SYS_MALLOC_LEN (16 << 20)
19 #define CONFIG_MXC_UART
20 #define CONFIG_MXC_UART_BASE MX6UL_UART7_BASE_ADDR
23 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
24 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
27 #define CONFIG_SYS_I2C
28 #define CONFIG_SYS_I2C_MXC
29 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
30 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
31 #define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
32 #define CONFIG_SYS_I2C_SPEED 100000
34 /* Miscellaneous configurable options */
35 #define CONFIG_SYS_MEMTEST_START 0x80000000
36 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000)
38 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
39 #define CONFIG_SYS_HZ 1000
41 /* Physical Memory Map */
42 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
43 #define PHYS_SDRAM_SIZE (128 << 20)
45 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
46 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
47 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
49 #define CONFIG_SYS_INIT_SP_OFFSET \
50 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
51 #define CONFIG_SYS_INIT_SP_ADDR \
52 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
54 /* Environment is in stored in the eMMC boot partition */
55 #define CONFIG_ENV_SIZE (16 << 10)
56 #define CONFIG_ENV_OFFSET (512 << 10)
57 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */
58 #define CONFIG_SYS_MMC_ENV_PART 1 /* boot parition */
59 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC2 */
62 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
63 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
64 #define CONFIG_MXC_USB_FLAGS 0
65 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
67 #define CONFIG_FEC_MXC
68 #define CONFIG_FEC_ENET_DEV 0
69 #define IMX_FEC_BASE ENET_BASE_ADDR
70 #define CONFIG_FEC_MXC_PHYADDR 0x0
71 #define CONFIG_FEC_XCV_TYPE RMII
72 #define CONFIG_ETHPRIME "FEC"
73 #define CONFIG_PHY_SMSC
75 #define CONFIG_IMX_THERMAL
77 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
79 #define CONFIG_UBOOT_SECTOR_START 0x2
80 #define CONFIG_UBOOT_SECTOR_COUNT 0x3fe
82 #define CONFIG_EXTRA_ENV_SETTINGS \
86 "fdt_high=0xffffffff\0" \
87 "initrd_high=0xffffffff\0" \
88 "fdt_file=undefined\0" \
89 "fdt_addr=0x83000000\0" \
92 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
93 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
94 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
95 "mmcautodetect=yes\0" \
96 "mmcargs=setenv bootargs console=${console},${baudrate} " \
99 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
100 "bootscript=echo Running bootscript from mmc ...; " \
102 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
103 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
104 "mmcboot=echo Booting from mmc ...; " \
106 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
107 "if run loadfdt; then " \
108 "bootz ${loadaddr} - ${fdt_addr}; " \
110 "if test ${boot_fdt} = try; then " \
113 "echo WARN: Cannot load the DT; " \
119 "uboot=ccv/u-boot.imx\0" \
120 "uboot_start="__stringify(CONFIG_UBOOT_SECTOR_START)"\0" \
121 "uboot_size="__stringify(CONFIG_UBOOT_SECTOR_COUNT)"\0" \
122 "update_uboot=if tftp ${uboot}; then " \
123 "if itest ${filesize} > 0; then " \
125 "setexpr blkc ${filesize} / 0x200;" \
126 "setexpr blkc ${blkc} + 1;" \
127 "if itest ${blkc} <= ${uboot_size}; then " \
128 "mmc write ${loadaddr} ${uboot_start} " \
132 "setenv filesize; setenv blkc\0" \
133 "update_bootpart=mmc bootbus 0 2 1 2;mmc partconf 0 1 1 0\0"
135 #endif /* __XPRESS_CONFIG_H */