cmd: Convert CONFIG_CMD_ELF to Kconfig
[platform/kernel/u-boot.git] / include / configs / xpedite550x.h
1 /*
2  * Copyright 2010 Extreme Engineering Solutions, Inc.
3  * Copyright 2007-2008 Freescale Semiconductor, Inc.
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7
8 /*
9  * xpedite550x board configuration file
10  */
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13
14 /*
15  * High Level Configuration Options
16  */
17 #define CONFIG_BOOKE            1       /* BOOKE */
18 #define CONFIG_E500             1       /* BOOKE e500 family */
19 #define CONFIG_P2020            1
20 #define CONFIG_XPEDITE550X      1
21 #define CONFIG_SYS_BOARD_NAME   "XPedite5500"
22 #define CONFIG_SYS_FORM_PMC_XMC 1
23 #define CONFIG_PRPMC_PCI_ALIAS  "pci0"  /* Processor PMC interface on pci0 */
24 #define CONFIG_BOARD_EARLY_INIT_R       /* Call board_pre_init */
25 #define CONFIG_SYS_GENERIC_BOARD
26 #define CONFIG_DISPLAY_BOARDINFO
27
28 #ifndef CONFIG_SYS_TEXT_BASE
29 #define CONFIG_SYS_TEXT_BASE    0xfff80000
30 #endif
31
32 #define CONFIG_PCI              1       /* Enable PCI/PCIE */
33 #define CONFIG_PCI_PNP          1       /* do pci plug-and-play */
34 #define CONFIG_PCI_SCAN_SHOW    1       /* show pci devices on startup */
35 #define CONFIG_PCIE1            1       /* PCIE controler 1 (PEX8112 or XMC) */
36 #define CONFIG_FSL_PCI_INIT     1       /* Use common FSL init code */
37 #define CONFIG_PCI_INDIRECT_BRIDGE 1    /* indirect PCI bridge support */
38 #define CONFIG_SYS_PCI_64BIT    1       /* enable 64-bit PCI resources */
39 #define CONFIG_FSL_PCIE_RESET   1       /* need PCIe reset errata */
40 #define CONFIG_FSL_LAW          1       /* Use common FSL init code */
41 #define CONFIG_FSL_ELBC         1
42
43 /*
44  * Multicore config
45  */
46 #define CONFIG_MP
47 #define CONFIG_BPTR_VIRT_ADDR   0xee000000      /* virt boot page address */
48 #define CONFIG_MPC8xxx_DISABLE_BPTR             /* Don't leave BPTR enabled */
49
50 /*
51  * DDR config
52  */
53 #define CONFIG_SYS_FSL_DDR3
54 #define CONFIG_SPD_EEPROM               /* Use SPD EEPROM for DDR setup */
55 #define CONFIG_DDR_SPD
56 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
57 #define SPD_EEPROM_ADDRESS                      0x54
58 #define SPD_EEPROM_OFFSET               0x200   /* OFFSET of SPD in EEPROM */
59 #define CONFIG_NUM_DDR_CONTROLLERS      1
60 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
61 #define CONFIG_CHIP_SELECTS_PER_CTRL 2
62 #define CONFIG_DDR_ECC
63 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
64 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000 /* DDR is system memory*/
65 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
66 #define CONFIG_VERY_BIG_RAM
67
68 #ifndef __ASSEMBLY__
69 extern unsigned long get_board_sys_clk(unsigned long dummy);
70 extern unsigned long get_board_ddr_clk(unsigned long dummy);
71 #endif
72
73 #define CONFIG_SYS_CLK_FREQ     get_board_sys_clk(0) /* sysclk for MPC85xx */
74 #define CONFIG_DDR_CLK_FREQ     get_board_ddr_clk(0) /* ddrclk for MPC85xx */
75
76 /*
77  * These can be toggled for performance analysis, otherwise use default.
78  */
79 #define CONFIG_L2_CACHE                 /* toggle L2 cache */
80 #define CONFIG_BTB                      /* toggle branch predition */
81 #define CONFIG_ENABLE_36BIT_PHYS        1
82
83 #define CONFIG_SYS_CCSRBAR              0xef000000
84 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
85
86 /*
87  * Diagnostics
88  */
89 #define CONFIG_SYS_ALT_MEMTEST
90 #define CONFIG_SYS_MEMTEST_START        0x10000000
91 #define CONFIG_SYS_MEMTEST_END          0x20000000
92 #define CONFIG_POST                     (CONFIG_SYS_POST_MEMORY | \
93                                          CONFIG_SYS_POST_I2C)
94 #define I2C_ADDR_LIST                   {CONFIG_SYS_I2C_EEPROM_ADDR,    \
95                                          CONFIG_SYS_I2C_LM75_ADDR,      \
96                                          CONFIG_SYS_I2C_LM90_ADDR,      \
97                                          CONFIG_SYS_I2C_PCA953X_ADDR0,  \
98                                          CONFIG_SYS_I2C_PCA953X_ADDR2,  \
99                                          CONFIG_SYS_I2C_PCA953X_ADDR3,  \
100                                          CONFIG_SYS_I2C_RTC_ADDR}
101
102 /*
103  * Memory map
104  * 0x0000_0000 0x7fff_ffff      DDR                     2G Cacheable
105  * 0x8000_0000 0xbfff_ffff      PCIe1 Mem               1G non-cacheable
106  * 0xe000_0000 0xe7ff_ffff      SRAM/SSRAM/L1 Cache     128M non-cacheable
107  * 0xe800_0000 0xe87f_ffff      PCIe1 IO                8M non-cacheable
108  * 0xee00_0000 0xee00_ffff      Boot page translation   4K non-cacheable
109  * 0xef00_0000 0xef0f_ffff      CCSR/IMMR               1M non-cacheable
110  * 0xef80_0000 0xef8f_ffff      NAND Flash              1M non-cacheable
111  * 0xf000_0000 0xf7ff_ffff      NOR Flash 2             128M non-cacheable
112  * 0xf800_0000 0xffff_ffff      NOR Flash 1             128M non-cacheable
113  */
114
115 #define CONFIG_SYS_LBC_LCRR     (LCRR_CLKDIV_8 | LCRR_EADC_3)
116
117 /*
118  * NAND flash configuration
119  */
120 #define CONFIG_SYS_NAND_BASE            0xef800000
121 #define CONFIG_SYS_NAND_BASE2           0xef840000 /* Unused at this time */
122 #define CONFIG_SYS_NAND_BASE_LIST       {CONFIG_SYS_NAND_BASE, \
123                                          CONFIG_SYS_NAND_BASE2}
124 #define CONFIG_SYS_MAX_NAND_DEVICE      2
125 #define CONFIG_NAND_FSL_ELBC
126
127 /*
128  * NOR flash configuration
129  */
130 #define CONFIG_SYS_FLASH_BASE           0xf8000000
131 #define CONFIG_SYS_FLASH_BASE2          0xf0000000
132 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2}
133 #define CONFIG_SYS_MAX_FLASH_BANKS      2               /* number of banks */
134 #define CONFIG_SYS_MAX_FLASH_SECT       1024            /* sectors per device */
135 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000           /* Flash Erase Timeout (ms) */
136 #define CONFIG_SYS_FLASH_WRITE_TOUT     500             /* Flash Write Timeout (ms) */
137 #define CONFIG_FLASH_CFI_DRIVER
138 #define CONFIG_SYS_FLASH_CFI
139 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
140 #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST       { {0xfff40000, 0xc0000}, \
141                                                   {0xf7f40000, 0xc0000} }
142 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
143
144 /*
145  * Chip select configuration
146  */
147 /* NOR Flash 0 on CS0 */
148 #define CONFIG_SYS_BR0_PRELIM   (CONFIG_SYS_FLASH_BASE  | \
149                                  BR_PS_16               | \
150                                  BR_V)
151 #define CONFIG_SYS_OR0_PRELIM   (OR_AM_128MB            | \
152                                  OR_GPCM_CSNT           | \
153                                  OR_GPCM_XACS           | \
154                                  OR_GPCM_ACS_DIV2       | \
155                                  OR_GPCM_SCY_8          | \
156                                  OR_GPCM_TRLX           | \
157                                  OR_GPCM_EHTR           | \
158                                  OR_GPCM_EAD)
159
160 /* NOR Flash 1 on CS1 */
161 #define CONFIG_SYS_BR1_PRELIM   (CONFIG_SYS_FLASH_BASE2 | \
162                                  BR_PS_16               | \
163                                  BR_V)
164 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_OR0_PRELIM
165
166 /* NAND flash on CS2 */
167 #define CONFIG_SYS_BR2_PRELIM   (CONFIG_SYS_NAND_BASE   | \
168                                  (2<<BR_DECC_SHIFT)     | \
169                                  BR_PS_8                | \
170                                  BR_MS_FCM              | \
171                                  BR_V)
172
173 /* NAND flash on CS2 */
174 #define CONFIG_SYS_OR2_PRELIM   (OR_AM_256KB    | \
175                                  OR_FCM_PGS     | \
176                                  OR_FCM_CSCT    | \
177                                  OR_FCM_CST     | \
178                                  OR_FCM_CHT     | \
179                                  OR_FCM_SCY_1   | \
180                                  OR_FCM_TRLX    | \
181                                  OR_FCM_EHTR)
182
183 /* NAND flash on CS3 */
184 #define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_NAND_BASE2  | \
185                                  (2<<BR_DECC_SHIFT)     | \
186                                  BR_PS_8                | \
187                                  BR_MS_FCM              | \
188                                  BR_V)
189 #define CONFIG_SYS_OR3_PRELIM   CONFIG_SYS_OR2_PRELIM
190
191 /*
192  * Use L1 as initial stack
193  */
194 #define CONFIG_SYS_INIT_RAM_LOCK        1
195 #define CONFIG_SYS_INIT_RAM_ADDR        0xe0000000
196 #define CONFIG_SYS_INIT_RAM_SIZE                0x00004000
197
198 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
199 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
200
201 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)    /* Reserve 512 KB for Mon */
202 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)   /* Reserved for malloc */
203
204 /*
205  * Serial Port
206  */
207 #define CONFIG_CONS_INDEX               1
208 #define CONFIG_SYS_NS16550
209 #define CONFIG_SYS_NS16550_SERIAL
210 #define CONFIG_SYS_NS16550_REG_SIZE     1
211 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
212 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
213 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
214 #define CONFIG_SYS_BAUDRATE_TABLE       \
215         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
216 #define CONFIG_BAUDRATE                 115200
217 #define CONFIG_LOADS_ECHO               1       /* echo on for serial download */
218 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change */
219
220 /*
221  * Use the HUSH parser
222  */
223 #define CONFIG_SYS_HUSH_PARSER
224
225 /*
226  * Pass open firmware flat tree
227  */
228 #define CONFIG_OF_LIBFDT                1
229 #define CONFIG_OF_BOARD_SETUP           1
230 #define CONFIG_OF_STDOUT_VIA_ALIAS      1
231 #define CONFIG_FDT_FIXUP_PCI_IRQ        1
232
233 /*
234  * I2C
235  */
236 #define CONFIG_SYS_I2C
237 #define CONFIG_SYS_I2C_FSL
238 #define CONFIG_SYS_FSL_I2C_SPEED        400000
239 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
240 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
241 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
242 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
243 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
244
245 /* I2C DS7505 temperature sensor */
246 #define CONFIG_DTT_LM75
247 #define CONFIG_DTT_SENSORS              { 0 }
248 #define CONFIG_SYS_I2C_LM75_ADDR        0x48
249
250 /* I2C ADT7461 temperature sensor */
251 #define CONFIG_SYS_I2C_LM90_ADDR        0x4C
252
253 /* I2C EEPROM - AT24C128B */
254 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x54
255 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2
256 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       6       /* 64 byte pages */
257 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* take up to 10 msec */
258
259 /* I2C RTC */
260 #define CONFIG_RTC_M41T11               1
261 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
262 #define CONFIG_SYS_M41T11_BASE_YEAR     2000
263
264 /* GPIO */
265 #define CONFIG_PCA953X
266 #define CONFIG_SYS_I2C_PCA953X_ADDR0    0x18
267 #define CONFIG_SYS_I2C_PCA953X_ADDR1    0x1c
268 #define CONFIG_SYS_I2C_PCA953X_ADDR2    0x1e
269 #define CONFIG_SYS_I2C_PCA953X_ADDR3    0x1f
270 #define CONFIG_SYS_I2C_PCA953X_ADDR     CONFIG_SYS_I2C_PCA953X_ADDR0
271
272 /*
273  * GPIO pin definitions, PU = pulled high, PD = pulled low
274  */
275 /* PCA9557 @ 0x18*/
276 #define CONFIG_SYS_PCA953X_C0_SER0_EN           0x01 /* PU; UART0 enable (1: enabled) */
277 #define CONFIG_SYS_PCA953X_C0_SER0_MODE         0x02 /* PU; UART0 serial mode select (1: RS-485, 0: RS-232) */
278 #define CONFIG_SYS_PCA953X_C0_SER1_EN           0x04 /* PU; UART1 enable (1: enabled) */
279 #define CONFIG_SYS_PCA953X_C0_SER1_MODE         0x08 /* PU; UART1 serial mode select (1: RS-485, 0: RS-232) */
280 #define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS     0x10 /* PU; Boot flash CS select */
281 #define CONFIG_SYS_PCA953X_NVM_WP               0x20 /* PU; Write protection (0: disabled, 1: enabled) */
282
283 /* PCA9557 @ 0x1e*/
284 #define CONFIG_SYS_PCA953X_XMC_GA0              0x01 /* PU; */
285 #define CONFIG_SYS_PCA953X_XMC_GA1              0x02 /* PU; */
286 #define CONFIG_SYS_PCA953X_XMC_GA2              0x04 /* PU; */
287 #define CONFIG_SYS_PCA953X_XMC_WAKE             0x10 /* PU; */
288 #define CONFIG_SYS_PCA953X_XMC_BIST             0x20 /* Enable XMC BIST */
289 #define CONFIG_SYS_PCA953X_PMC_EREADY           0x40 /* PU; PMC PCI eready */
290 #define CONFIG_SYS_PCA953X_PMC_MONARCH          0x80 /* PMC monarch mode enable */
291
292 /* PCA9557 @ 0x1f */
293 #define CONFIG_SYS_PCA953X_MC_GPIO0             0x01 /* PU; */
294 #define CONFIG_SYS_PCA953X_MC_GPIO1             0x02 /* PU; */
295 #define CONFIG_SYS_PCA953X_MC_GPIO2             0x04 /* PU; */
296 #define CONFIG_SYS_PCA953X_MC_GPIO3             0x08 /* PU; */
297 #define CONFIG_SYS_PCA953X_MC_GPIO4             0x10 /* PU; */
298 #define CONFIG_SYS_PCA953X_MC_GPIO5             0x20 /* PU; */
299 #define CONFIG_SYS_PCA953X_MC_GPIO6             0x40 /* PU; */
300 #define CONFIG_SYS_PCA953X_MC_GPIO7             0x80 /* PU; */
301
302 /*
303  * General PCI
304  * Memory space is mapped 1-1, but I/O space must start from 0.
305  */
306
307 /* controller 1 - PEX8112 or XMC, depending on build option */
308 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
309 #define CONFIG_SYS_PCIE1_MEM_PHYS       CONFIG_SYS_PCIE1_MEM_BUS
310 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x40000000      /* 1G */
311 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
312 #define CONFIG_SYS_PCIE1_IO_PHYS        0xe8000000
313 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00800000      /* 8M */
314
315
316 /*
317  * Networking options
318  */
319 #define CONFIG_TSEC_ENET                /* tsec ethernet support */
320 #define CONFIG_PHY_GIGE         1       /* Include GbE speed/duplex detection */
321 #define CONFIG_TSEC_TBI
322 #define CONFIG_MII              1       /* MII PHY management */
323 #define CONFIG_MII_DEFAULT_TSEC 1       /* Allow unregistered phys */
324 #define CONFIG_ETHPRIME         "eTSEC2"
325
326 /*
327  * In-band SGMII auto-negotiation between TBI and BCM5482S PHY fails, force
328  * 1000mbps SGMII link
329  */
330 #define CONFIG_TSEC_TBICR_SETTINGS ( \
331                 TBICR_PHY_RESET \
332                 | TBICR_FULL_DUPLEX \
333                 | TBICR_SPEED1_SET \
334                 )
335
336 #define CONFIG_TSEC1            1
337 #define CONFIG_TSEC1_NAME       "eTSEC1"
338 #define TSEC1_FLAGS             (TSEC_GIGABIT | TSEC_REDUCED)
339 #define TSEC1_PHY_ADDR          1
340 #define TSEC1_PHYIDX            0
341 #define CONFIG_HAS_ETH0
342
343 #define CONFIG_TSEC2            1
344 #define CONFIG_TSEC2_NAME       "eTSEC2"
345 #define TSEC2_FLAGS             (TSEC_GIGABIT | TSEC_REDUCED)
346 #define TSEC2_PHY_ADDR          2
347 #define TSEC2_PHYIDX            0
348 #define CONFIG_HAS_ETH1
349
350 #define CONFIG_TSEC3            1
351 #define CONFIG_TSEC3_NAME       "eTSEC3"
352 #define TSEC3_FLAGS             (TSEC_GIGABIT | TSEC_REDUCED)
353 #define TSEC3_PHY_ADDR          3
354 #define TSEC3_PHYIDX            0
355 #define CONFIG_HAS_ETH2
356
357 /*
358  * USB
359  */
360 #define CONFIG_USB_STORAGE
361 #define CONFIG_USB_EHCI
362 #define CONFIG_USB_EHCI_FSL
363 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
364 #define CONFIG_DOS_PARTITION
365
366 /*
367  * Command configuration.
368  */
369 #define CONFIG_CMD_ASKENV
370 #define CONFIG_CMD_DATE
371 #define CONFIG_CMD_DHCP
372 #define CONFIG_CMD_DTT
373 #define CONFIG_CMD_EEPROM
374 #define CONFIG_CMD_I2C
375 #define CONFIG_CMD_JFFS2
376 #define CONFIG_CMD_MII
377 #define CONFIG_CMD_NAND
378 #define CONFIG_CMD_PCA953X
379 #define CONFIG_CMD_PCA953X_INFO
380 #define CONFIG_CMD_PCI
381 #define CONFIG_CMD_PCI_ENUM
382 #define CONFIG_CMD_PING
383 #define CONFIG_CMD_REGINFO
384 #define CONFIG_CMD_SNTP
385 #define CONFIG_CMD_USB
386
387 /*
388  * Miscellaneous configurable options
389  */
390 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
391 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
392 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
393 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
394 #define CONFIG_SYS_MAXARGS      16              /* max number of command args */
395 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
396 #define CONFIG_CMDLINE_EDITING  1               /* add command line history     */
397 #define CONFIG_AUTO_COMPLETE    1               /* add autocompletion support */
398 #define CONFIG_LOADADDR         0x1000000       /* default location for tftp and bootm */
399 #define CONFIG_BOOTDELAY        3               /* -1 disables auto-boot */
400 #define CONFIG_PANIC_HANG                       /* do not reset board on panic */
401 #define CONFIG_PREBOOT                          /* enable preboot variable */
402 #define CONFIG_FIT              1
403 #define CONFIG_FIT_VERBOSE      1
404 #define CONFIG_INTEGRITY                        /* support booting INTEGRITY OS */
405
406 /*
407  * For booting Linux, the board info and command line data
408  * have to be in the first 16 MB of memory, since this is
409  * the maximum mapped by the Linux kernel during initialization.
410  */
411 #define CONFIG_SYS_BOOTMAPSZ    (16 << 20)      /* Initial Memory map for Linux*/
412 #define CONFIG_SYS_BOOTM_LEN    (16 << 20)      /* Increase max gunzip size */
413
414 /*
415  * Environment Configuration
416  */
417 #define CONFIG_ENV_IS_IN_FLASH  1
418 #define CONFIG_ENV_SECT_SIZE    0x20000         /* 128k (one sector) for env */
419 #define CONFIG_ENV_SIZE         0x8000
420 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
421
422 /*
423  * Flash memory map:
424  * fff80000 - ffffffff     Pri U-Boot (512 KB)
425  * fff40000 - fff7ffff     Pri U-Boot Environment (256 KB)
426  * fff00000 - fff3ffff     Pri FDT (256KB)
427  * fef00000 - ffefffff     Pri OS image (16MB)
428  * f8000000 - feefffff     Pri OS Use/Filesystem (111MB)
429  *
430  * f7f80000 - f7ffffff     Sec U-Boot (512 KB)
431  * f7f40000 - f7f7ffff     Sec U-Boot Environment (256 KB)
432  * f7f00000 - f7f3ffff     Sec FDT (256KB)
433  * f6f00000 - f7efffff     Sec OS image (16MB)
434  * f0000000 - f6efffff     Sec OS Use/Filesystem (111MB)
435  */
436 #define CONFIG_UBOOT1_ENV_ADDR  __stringify(0xfff80000)
437 #define CONFIG_UBOOT2_ENV_ADDR  __stringify(0xf7f80000)
438 #define CONFIG_FDT1_ENV_ADDR    __stringify(0xfff00000)
439 #define CONFIG_FDT2_ENV_ADDR    __stringify(0xf7f00000)
440 #define CONFIG_OS1_ENV_ADDR     __stringify(0xfef00000)
441 #define CONFIG_OS2_ENV_ADDR     __stringify(0xf6f00000)
442
443 #define CONFIG_PROG_UBOOT1                                              \
444         "$download_cmd $loadaddr $ubootfile; "                          \
445         "if test $? -eq 0; then "                                       \
446                 "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; "         \
447                 "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; "               \
448                 "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; "       \
449                 "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; "          \
450                 "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; "      \
451                 "if test $? -ne 0; then "                               \
452                         "echo PROGRAM FAILED; "                         \
453                 "else; "                                                \
454                         "echo PROGRAM SUCCEEDED; "                      \
455                 "fi; "                                                  \
456         "else; "                                                        \
457                 "echo DOWNLOAD FAILED; "                                \
458         "fi;"
459
460 #define CONFIG_PROG_UBOOT2                                              \
461         "$download_cmd $loadaddr $ubootfile; "                          \
462         "if test $? -eq 0; then "                                       \
463                 "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; "         \
464                 "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; "               \
465                 "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; "       \
466                 "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; "          \
467                 "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; "      \
468                 "if test $? -ne 0; then "                               \
469                         "echo PROGRAM FAILED; "                         \
470                 "else; "                                                \
471                         "echo PROGRAM SUCCEEDED; "                      \
472                 "fi; "                                                  \
473         "else; "                                                        \
474                 "echo DOWNLOAD FAILED; "                                \
475         "fi;"
476
477 #define CONFIG_BOOT_OS_NET                                              \
478         "$download_cmd $osaddr $osfile; "                               \
479         "if test $? -eq 0; then "                                       \
480                 "if test -n $fdtaddr; then "                            \
481                         "$download_cmd $fdtaddr $fdtfile; "             \
482                         "if test $? -eq 0; then "                       \
483                                 "bootm $osaddr - $fdtaddr; "            \
484                         "else; "                                        \
485                                 "echo FDT DOWNLOAD FAILED; "            \
486                         "fi; "                                          \
487                 "else; "                                                \
488                         "bootm $osaddr; "                               \
489                 "fi; "                                                  \
490         "else; "                                                        \
491                 "echo OS DOWNLOAD FAILED; "                             \
492         "fi;"
493
494 #define CONFIG_PROG_OS1                                                 \
495         "$download_cmd $osaddr $osfile; "                               \
496         "if test $? -eq 0; then "                                       \
497                 "erase "CONFIG_OS1_ENV_ADDR" +$filesize; "              \
498                 "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "        \
499                 "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "       \
500                 "if test $? -ne 0; then "                               \
501                         "echo OS PROGRAM FAILED; "                      \
502                 "else; "                                                \
503                         "echo OS PROGRAM SUCCEEDED; "                   \
504                 "fi; "                                                  \
505         "else; "                                                        \
506                 "echo OS DOWNLOAD FAILED; "                             \
507         "fi;"
508
509 #define CONFIG_PROG_OS2                                                 \
510         "$download_cmd $osaddr $osfile; "                               \
511         "if test $? -eq 0; then "                                       \
512                 "erase "CONFIG_OS2_ENV_ADDR" +$filesize; "              \
513                 "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "        \
514                 "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "       \
515                 "if test $? -ne 0; then "                               \
516                         "echo OS PROGRAM FAILED; "                      \
517                 "else; "                                                \
518                         "echo OS PROGRAM SUCCEEDED; "                   \
519                 "fi; "                                                  \
520         "else; "                                                        \
521                 "echo OS DOWNLOAD FAILED; "                             \
522         "fi;"
523
524 #define CONFIG_PROG_FDT1                                                \
525         "$download_cmd $fdtaddr $fdtfile; "                             \
526         "if test $? -eq 0; then "                                       \
527                 "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;"              \
528                 "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "      \
529                 "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "     \
530                 "if test $? -ne 0; then "                               \
531                         "echo FDT PROGRAM FAILED; "                     \
532                 "else; "                                                \
533                         "echo FDT PROGRAM SUCCEEDED; "                  \
534                 "fi; "                                                  \
535         "else; "                                                        \
536                 "echo FDT DOWNLOAD FAILED; "                            \
537         "fi;"
538
539 #define CONFIG_PROG_FDT2                                                \
540         "$download_cmd $fdtaddr $fdtfile; "                             \
541         "if test $? -eq 0; then "                                       \
542                 "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;"              \
543                 "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "      \
544                 "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "     \
545                 "if test $? -ne 0; then "                               \
546                         "echo FDT PROGRAM FAILED; "                     \
547                 "else; "                                                \
548                         "echo FDT PROGRAM SUCCEEDED; "                  \
549                 "fi; "                                                  \
550         "else; "                                                        \
551                 "echo FDT DOWNLOAD FAILED; "                            \
552         "fi;"
553
554 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
555         "autoload=yes\0"                                                \
556         "download_cmd=tftp\0"                                           \
557         "console_args=console=ttyS0,115200\0"                           \
558         "root_args=root=/dev/nfs rw\0"                                  \
559         "misc_args=ip=on\0"                                             \
560         "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
561         "bootfile=/home/user/file\0"                                    \
562         "osfile=/home/user/board.uImage\0"                              \
563         "fdtfile=/home/user/board.dtb\0"                                \
564         "ubootfile=/home/user/u-boot.bin\0"                             \
565         "fdtaddr=c00000\0"                                              \
566         "osaddr=0x1000000\0"                                            \
567         "loadaddr=0x1000000\0"                                          \
568         "prog_uboot1="CONFIG_PROG_UBOOT1"\0"                            \
569         "prog_uboot2="CONFIG_PROG_UBOOT2"\0"                            \
570         "prog_os1="CONFIG_PROG_OS1"\0"                                  \
571         "prog_os2="CONFIG_PROG_OS2"\0"                                  \
572         "prog_fdt1="CONFIG_PROG_FDT1"\0"                                \
573         "prog_fdt2="CONFIG_PROG_FDT2"\0"                                \
574         "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0"          \
575         "bootcmd_flash1=run set_bootargs; "                             \
576                 "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\
577         "bootcmd_flash2=run set_bootargs; "                             \
578                 "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\
579         "bootcmd=run bootcmd_flash1\0"
580 #endif  /* __CONFIG_H */