2 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
4 * SPDX-License-Identifier: GPL-2.0+
8 * config for XPedite1000 from XES Inc.
9 * Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com>
10 * (C) Copyright 2003 Sandburst Corporation
11 * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
17 /* High Level Configuration Options */
18 #define CONFIG_XPEDITE1000 1
19 #define CONFIG_SYS_BOARD_NAME "XPedite1000"
20 #define CONFIG_SYS_FORM_PMC 1
22 #define CONFIG_440GX 1 /* 440 GX */
23 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
24 #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
26 #define CONFIG_SYS_TEXT_BASE 0xFFF80000
31 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
32 #define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
33 #define CONFIG_VERY_BIG_RAM 1
36 * Base addresses -- Note these are effective addresses where the
37 * actual resources get mapped (not physical addresses)
39 #define CONFIG_SYS_SDRAM_BASE 0x00000000
40 #define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
41 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
42 #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
43 #define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
44 #define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
45 #define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
46 #define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
51 #define CONFIG_SYS_ALT_MEMTEST
52 #define CONFIG_SYS_MEMTEST_START 0x0400000
53 #define CONFIG_SYS_MEMTEST_END 0x0C00000
56 #define CONFIG_POST (CONFIG_SYS_POST_RTC | \
62 #define USR_LED0 0x00000080
63 #define USR_LED1 0x00000100
64 #define USR_LED2 0x00000200
65 #define USR_LED3 0x00000400
68 extern unsigned long in32(unsigned int);
69 extern void out32(unsigned int, unsigned long);
71 #define LED0_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED0))
72 #define LED1_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED1))
73 #define LED2_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED2))
74 #define LED3_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED3))
76 #define LED0_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED0))
77 #define LED1_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED1))
78 #define LED2_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED2))
79 #define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3))
83 * Use internal SRAM for initial stack
85 #define CONFIG_SYS_TEMP_STACK_OCM 1
86 #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
87 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
88 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
89 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
90 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
92 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */
93 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
98 #define CONFIG_CONS_INDEX 1 /* Use UART0 */
99 #define CONFIG_SYS_NS16550
100 #define CONFIG_SYS_NS16550_SERIAL
101 #define CONFIG_SYS_NS16550_REG_SIZE 1
102 #define CONFIG_SYS_NS16550_CLK get_serial_clock()
104 #define CONFIG_SYS_BAUDRATE_TABLE \
105 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
106 #define CONFIG_BAUDRATE 115200
107 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
108 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
111 * Use the HUSH parser
113 #define CONFIG_SYS_HUSH_PARSER
116 * NOR flash configuration
118 #define CONFIG_SYS_MAX_FLASH_BANKS 3
119 #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
120 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
121 #define CONFIG_FLASH_CFI_DRIVER
122 #define CONFIG_SYS_FLASH_CFI
123 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
124 #define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
125 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
126 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
131 #define CONFIG_SYS_I2C
132 #define CONFIG_SYS_I2C_PPC4XX
133 #define CONFIG_SYS_I2C_PPC4XX_CH0
134 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
135 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7f
138 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
139 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
140 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
141 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
143 /* I2C RTC: STMicro M41T00 */
144 #define CONFIG_RTC_M41T11 1
145 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
146 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
152 #define CONFIG_PCI /* include pci support */
153 #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
154 #define CONFIG_PCI_PNP /* do pci plug-and-play */
155 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
156 #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
158 /* Board-specific PCI */
159 #define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
160 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
161 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
162 #define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
167 #define CONFIG_PPC4xx_EMAC
168 #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
169 #define CONFIG_MII 1 /* MII PHY management */
170 #define CONFIG_PHY_RESET 1 /* reset phy upon startup */
171 #define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
172 #define CONFIG_ETHPRIME "ppc_4xx_eth2"
173 #define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
174 #define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
175 #define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
176 #define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
177 #define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
180 #define CONFIG_BOOTP_BOOTFILESIZE
181 #define CONFIG_BOOTP_BOOTPATH
182 #define CONFIG_BOOTP_GATEWAY
183 #define CONFIG_BOOTP_HOSTNAME
186 * Command configuration
188 #include <config_cmd_default.h>
190 #define CONFIG_CMD_ASKENV
191 #define CONFIG_CMD_DATE
192 #define CONFIG_CMD_DHCP
193 #define CONFIG_CMD_EEPROM
194 #define CONFIG_CMD_ELF
195 #define CONFIG_CMD_FLASH
196 #define CONFIG_CMD_I2C
197 #define CONFIG_CMD_IRQ
198 #define CONFIG_CMD_JFFS2
199 #define CONFIG_CMD_MII
200 #define CONFIG_CMD_NET
201 #define CONFIG_CMD_PCI
202 #define CONFIG_CMD_PING
203 #define CONFIG_CMD_SAVEENV
204 #define CONFIG_CMD_SNTP
207 * Miscellaneous configurable options
209 #define CONFIG_SYS_LONGHELP /* undef to save memory */
210 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
211 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
212 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
213 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
214 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
215 #define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
216 #define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
217 #define CONFIG_PANIC_HANG /* do not reset board on panic */
218 #define CONFIG_PREBOOT /* enable preboot variable */
220 #define CONFIG_FIT_VERBOSE 1
221 #define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
222 #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
225 * For booting Linux, the board info and command line data
226 * have to be in the first 8 MB of memory, since this is
227 * the maximum mapped by the Linux kernel during initialization.
229 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
232 * Environment Configuration
234 #define CONFIG_ENV_IS_IN_FLASH 1
235 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
236 #define CONFIG_ENV_SIZE 0x8000
237 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
241 * fff80000 - ffffffff U-Boot (512 KB)
242 * fff40000 - fff7ffff U-Boot Environment (256 KB)
243 * fff00000 - fff3ffff FDT (256KB)
244 * ffc00000 - ffefffff OS image (3MB)
245 * ff000000 - ffbfffff OS Use/Filesystem (12MB)
248 #define CONFIG_UBOOT_ENV_ADDR __stringify(CONFIG_SYS_TEXT_BASE)
249 #define CONFIG_FDT_ENV_ADDR __stringify(0xfff00000)
250 #define CONFIG_OS_ENV_ADDR __stringify(0xffc00000)
252 #define CONFIG_PROG_UBOOT \
253 "$download_cmd $loadaddr $ubootfile; " \
254 "if test $? -eq 0; then " \
255 "protect off "CONFIG_UBOOT_ENV_ADDR" +80000; " \
256 "erase "CONFIG_UBOOT_ENV_ADDR" +80000; " \
257 "cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; " \
258 "protect on "CONFIG_UBOOT_ENV_ADDR" +80000; " \
259 "cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; " \
260 "if test $? -ne 0; then " \
261 "echo PROGRAM FAILED; " \
263 "echo PROGRAM SUCCEEDED; " \
266 "echo DOWNLOAD FAILED; " \
269 #define CONFIG_BOOT_OS_NET \
270 "$download_cmd $osaddr $osfile; " \
271 "if test $? -eq 0; then " \
272 "if test -n $fdtaddr; then " \
273 "$download_cmd $fdtaddr $fdtfile; " \
274 "if test $? -eq 0; then " \
275 "bootm $osaddr - $fdtaddr; " \
277 "echo FDT DOWNLOAD FAILED; " \
283 "echo OS DOWNLOAD FAILED; " \
286 #define CONFIG_PROG_OS \
287 "$download_cmd $osaddr $osfile; " \
288 "if test $? -eq 0; then " \
289 "erase "CONFIG_OS_ENV_ADDR" +$filesize; " \
290 "cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
291 "cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
292 "if test $? -ne 0; then " \
293 "echo OS PROGRAM FAILED; " \
295 "echo OS PROGRAM SUCCEEDED; " \
298 "echo OS DOWNLOAD FAILED; " \
301 #define CONFIG_PROG_FDT \
302 "$download_cmd $fdtaddr $fdtfile; " \
303 "if test $? -eq 0; then " \
304 "erase "CONFIG_FDT_ENV_ADDR" +$filesize;" \
305 "cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
306 "cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
307 "if test $? -ne 0; then " \
308 "echo FDT PROGRAM FAILED; " \
310 "echo FDT PROGRAM SUCCEEDED; " \
313 "echo FDT DOWNLOAD FAILED; " \
316 #define CONFIG_EXTRA_ENV_SETTINGS \
318 "download_cmd=tftp\0" \
319 "console_args=console=ttyS0,115200\0" \
320 "root_args=root=/dev/nfs rw\0" \
321 "misc_args=ip=on\0" \
322 "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
323 "bootfile=/home/user/file\0" \
324 "osfile=/home/user/board.uImage\0" \
325 "fdtfile=/home/user/board.dtb\0" \
326 "ubootfile=/home/user/u-boot.bin\0" \
328 "osaddr=0x1000000\0" \
329 "loadaddr=0x1000000\0" \
330 "prog_uboot="CONFIG_PROG_UBOOT"\0" \
331 "prog_os="CONFIG_PROG_OS"\0" \
332 "prog_fdt="CONFIG_PROG_FDT"\0" \
333 "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
334 "bootcmd_flash=run set_bootargs; " \
335 "bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0" \
336 "bootcmd=run bootcmd_flash\0"
337 #endif /* __CONFIG_H */