2 * Configuration for Xilinx ZynqMP zc1751 XM015 DC1
4 * (C) Copyright 2015 Xilinx, Inc.
5 * Michal Simek <michal.simek@xilinx.com>
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H
11 #define __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H
13 #define CONFIG_ZYNQ_SDHCI0
14 #define CONFIG_ZYNQ_SDHCI1
15 #define CONFIG_ZYNQ_I2C1
16 #define CONFIG_SYS_I2C_ZYNQ
18 #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
20 #define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm015 dc1"
22 #define CONFIG_KERNEL_FDT_OFST_SIZE \
23 "kernel_offset=0x400000\0" \
24 "fdt_offset=0x2400000\0" \
25 "kernel_size=0x2000000\0" \
26 "fdt_size=0x80000\0" \
29 #include <configs/xilinx_zynqmp.h>
31 #endif /* __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H */