1 /* SPDX-License-Identifier: GPL-2.0 */
3 * (C) Copyright 2018 Xilinx, Inc. (Michal Simek)
6 #ifndef __CONFIG_ZYNQMP_R5_H
7 #define __CONFIG_ZYNQMP_R5_H
9 #define CONFIG_EXTRA_ENV_SETTINGS
12 /* The following table includes the supported baudrates */
13 #define CONFIG_SYS_BAUDRATE_TABLE \
14 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
16 /* Boot configuration */
18 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
19 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
21 /* Extend size of kernel image for uncompression */
22 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
24 #endif /* __CONFIG_ZYNQ_ZYNQMP_R5_H */