Merge git://git.denx.de/u-boot-spi
[platform/kernel/u-boot.git] / include / configs / x600.h
1 /*
2  * Copyright (C) 2009, STMicroelectronics - All Rights Reserved
3  * Author(s): Vipin Kumar, <vipin.kumar@st.com> for STMicroelectronics.
4  *
5  * Copyright (C) 2012, 2015 Stefan Roese <sr@denx.de>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 /*
14  * High Level Configuration Options
15  * (easy to change)
16  */
17 #define CONFIG_SPEAR600                         /* SPEAr600 SoC */
18 #define CONFIG_X600                             /* on X600 board */
19
20 #include <asm/arch/hardware.h>
21
22 /* Timer, HZ specific defines */
23 #define CONFIG_SYS_HZ_CLOCK                     8300000
24
25 #define CONFIG_SYS_FLASH_BASE                   0xf8000000
26 /* Reserve 8KiB for SPL */
27 #define CONFIG_SPL_PAD_TO                       8192    /* decimal for 'dd' */
28 #define CONFIG_SYS_SPL_LEN                      CONFIG_SPL_PAD_TO
29 #define CONFIG_SYS_UBOOT_BASE                   (CONFIG_SYS_FLASH_BASE + \
30                                                  CONFIG_SYS_SPL_LEN)
31 #define CONFIG_SYS_UBOOT_START                  CONFIG_SYS_TEXT_BASE
32 #define CONFIG_SYS_MONITOR_BASE                 CONFIG_SYS_FLASH_BASE
33 #define CONFIG_SYS_MONITOR_LEN                  0x60000
34
35 /* Serial Configuration (PL011) */
36 #define CONFIG_SYS_SERIAL0                      0xD0000000
37 #define CONFIG_SYS_SERIAL1                      0xD0080000
38 #define CONFIG_PL01x_PORTS                      { (void *)CONFIG_SYS_SERIAL0, \
39                                                 (void *)CONFIG_SYS_SERIAL1 }
40 #define CONFIG_PL011_CLOCK                      (48 * 1000 * 1000)
41 #define CONFIG_CONS_INDEX                       0
42 #define CONFIG_SYS_BAUDRATE_TABLE               { 9600, 19200, 38400, \
43                                                   57600, 115200 }
44 #define CONFIG_SYS_LOADS_BAUD_CHANGE
45
46 /* NOR FLASH config options */
47 #define CONFIG_ST_SMI
48 #define CONFIG_SYS_MAX_FLASH_BANKS              1
49 #define CONFIG_SYS_FLASH_BANK_SIZE              0x01000000
50 #define CONFIG_SYS_FLASH_ADDR_BASE              { CONFIG_SYS_FLASH_BASE }
51 #define CONFIG_SYS_MAX_FLASH_SECT               128
52 #define CONFIG_SYS_FLASH_EMPTY_INFO
53 #define CONFIG_SYS_FLASH_ERASE_TOUT             (3 * CONFIG_SYS_HZ)
54 #define CONFIG_SYS_FLASH_WRITE_TOUT             (3 * CONFIG_SYS_HZ)
55
56 /* NAND FLASH config options */
57 #define CONFIG_NAND_FSMC
58 #define CONFIG_SYS_NAND_SELF_INIT
59 #define CONFIG_SYS_MAX_NAND_DEVICE              1
60 #define CONFIG_SYS_NAND_BASE                    CONFIG_FSMC_NAND_BASE
61 #define CONFIG_MTD_ECC_SOFT
62 #define CONFIG_SYS_FSMC_NAND_8BIT
63 #define CONFIG_SYS_NAND_ONFI_DETECTION
64 #define CONFIG_NAND_ECC_BCH
65
66 /* UBI/UBI config options */
67 #define CONFIG_MTD_DEVICE
68 #define CONFIG_MTD_PARTITIONS
69
70 /* Ethernet config options */
71 #define CONFIG_MII
72 #define CONFIG_PHY_RESET_DELAY                  10000           /* in usec */
73
74 #define CONFIG_SPEAR_GPIO
75
76 /* I2C config options */
77 #define CONFIG_SYS_I2C
78 #define CONFIG_SYS_I2C_BASE                     0xD0200000
79 #define CONFIG_SYS_I2C_SPEED                    400000
80 #define CONFIG_SYS_I2C_SLAVE                    0x02
81 #define CONFIG_I2C_CHIPADDRESS                  0x50
82
83 #define CONFIG_RTC_M41T62       1
84 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
85
86 /* FPGA config options */
87 #define CONFIG_FPGA_COUNT       1
88
89 /* USB EHCI options */
90 #define CONFIG_USB_EHCI_SPEAR
91 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
92
93 /*
94  * U-Boot Environment placing definitions.
95  */
96 #define CONFIG_ENV_SECT_SIZE                    0x00010000
97 #define CONFIG_ENV_ADDR                         (CONFIG_SYS_MONITOR_BASE + \
98                                                  CONFIG_SYS_MONITOR_LEN)
99 #define CONFIG_ENV_SIZE                         0x02000
100 #define CONFIG_ENV_ADDR_REDUND                  (CONFIG_ENV_ADDR + \
101                                                  CONFIG_ENV_SECT_SIZE)
102 #define CONFIG_ENV_SIZE_REDUND                  (CONFIG_ENV_SIZE)
103
104 /* Miscellaneous configurable options */
105 #define CONFIG_ARCH_CPU_INIT
106 #define CONFIG_BOOT_PARAMS_ADDR                 0x00000100
107 #define CONFIG_CMDLINE_TAG
108 #define CONFIG_SETUP_MEMORY_TAGS
109 #define CONFIG_MISC_INIT_R
110 #define CONFIG_MX_CYCLIC                /* enable mdc/mwc commands      */
111
112 #define CONFIG_SYS_MEMTEST_START                0x00800000
113 #define CONFIG_SYS_MEMTEST_END                  0x04000000
114 #define CONFIG_SYS_MALLOC_LEN                   (8 << 20)
115 #define CONFIG_SYS_LOAD_ADDR                    0x00800000
116
117 #define CONFIG_HOSTNAME                         x600
118 #define CONFIG_UBI_PART                         ubi0
119 #define CONFIG_UBIFS_VOLUME                     rootfs
120
121 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
122         "u-boot_addr=1000000\0"                                         \
123         "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.spr\0"          \
124         "load=tftp ${u-boot_addr} ${u-boot}\0"                          \
125         "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE)      \
126                 " +${filesize};"                                        \
127                 "erase " __stringify(CONFIG_SYS_MONITOR_BASE) " +${filesize};" \
128                 "cp.b ${u-boot_addr} " __stringify(CONFIG_SYS_MONITOR_BASE) \
129                 " ${filesize};"                                         \
130                 "protect on " __stringify(CONFIG_SYS_MONITOR_BASE)      \
131                 " +${filesize}\0"                                       \
132         "upd=run load update\0"                                         \
133         "ubifs=" __stringify(CONFIG_HOSTNAME) "/ubifs.img\0"            \
134         "part=" __stringify(CONFIG_UBI_PART) "\0"                       \
135         "vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0"                    \
136         "load_ubifs=tftp ${kernel_addr} ${ubifs}\0"                     \
137         "update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}" \
138                 " ${filesize}\0"                                        \
139         "upd_ubifs=run load_ubifs update_ubifs\0"                       \
140         "init_ubifs=nand erase.part ubi0;ubi part ${part};"             \
141                 "ubi create ${vol} 4000000\0"                           \
142         "netdev=eth0\0"                                                 \
143         "rootpath=/opt/eldk-4.2/arm\0"                                  \
144         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
145                 "nfsroot=${serverip}:${rootpath}\0"                     \
146         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
147         "boot_part=0\0"                                                 \
148         "altbootcmd=if test $boot_part -eq 0;then "                     \
149                         "echo Switching to partition 1!;"               \
150                         "setenv boot_part 1;"                           \
151                 "else; "                                                \
152                         "echo Switching to partition 0!;"               \
153                         "setenv boot_part 0;"                           \
154                 "fi;"                                                   \
155                 "saveenv;boot\0"                                        \
156         "ubifsargs=set bootargs ubi.mtd=ubi${boot_part} "               \
157                 "root=ubi0:rootfs rootfstype=ubifs\0"                   \
158         "kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0"              \
159         "kernel_fs=/boot/uImage \0"                                     \
160         "kernel_addr=1000000\0"                                         \
161         "dtb=" __stringify(CONFIG_HOSTNAME) "/"                         \
162                 __stringify(CONFIG_HOSTNAME) ".dtb\0"                   \
163         "dtb_fs=/boot/" __stringify(CONFIG_HOSTNAME) ".dtb\0"           \
164         "dtb_addr=1800000\0"                                            \
165         "load_kernel=tftp ${kernel_addr} ${kernel}\0"                   \
166         "load_dtb=tftp ${dtb_addr} ${dtb}\0"                            \
167         "addip=setenv bootargs ${bootargs} "                            \
168                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
169                 ":${hostname}:${netdev}:off panic=1\0"                  \
170         "addcon=setenv bootargs ${bootargs} console=ttyAMA0,"           \
171                 "${baudrate}\0"                                         \
172         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
173         "net_nfs=run load_dtb load_kernel; "                            \
174                 "run nfsargs addip addcon addmtd addmisc;"              \
175                 "bootm ${kernel_addr} - ${dtb_addr}\0"                  \
176         "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"                                    \
177         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"                                \
178         "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip"         \
179                 " addcon addmisc addmtd;"                               \
180                 "bootm ${kernel_addr} - ${dtb_addr}\0"                  \
181         "ubifs_mount=ubi part ubi${boot_part};ubifsmount ubi:rootfs\0"  \
182         "ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};"             \
183                 "ubifsload ${dtb_addr} ${dtb_fs};\0"                    \
184         "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon " \
185                 "addmtd addmisc;bootm ${kernel_addr} - ${dtb_addr}\0"   \
186         "bootcmd=run nand_ubifs\0"                                      \
187         "\0"
188
189 /* Physical Memory Map */
190 #define CONFIG_NR_DRAM_BANKS                    1
191 #define PHYS_SDRAM_1                            0x00000000
192 #define PHYS_SDRAM_1_MAXSIZE                    0x40000000
193
194 #define CONFIG_SYS_SDRAM_BASE                   PHYS_SDRAM_1
195 #define CONFIG_SRAM_BASE                        0xd2800000
196 /* Preserve the last 2 lwords for the boot-counter */
197 #define CONFIG_SRAM_SIZE                        ((8 << 10) - 0x8)
198 #define CONFIG_SYS_INIT_RAM_ADDR                CONFIG_SRAM_BASE
199 #define CONFIG_SYS_INIT_RAM_SIZE                CONFIG_SRAM_SIZE
200
201 #define CONFIG_SYS_INIT_SP_OFFSET               \
202         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
203
204 #define CONFIG_SYS_INIT_SP_ADDR                 \
205         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
206
207 /*
208  * SPL related defines
209  */
210 #define CONFIG_SPL_TEXT_BASE            0xd2800b00
211 #define CONFIG_SPL_MAX_SIZE             (CONFIG_SRAM_SIZE - 0xb00)
212 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/spear"
213
214 /*
215  * Please select/define only one of the following
216  * Each definition corresponds to a supported DDR chip.
217  * DDR configuration is based on the following selection
218  */
219 #define CONFIG_DDR_MT47H64M16           1
220 #define CONFIG_DDR_MT47H32M16           0
221 #define CONFIG_DDR_MT47H128M8           0
222
223 /*
224  * Synchronous/Asynchronous operation of DDR
225  *
226  * Select CONFIG_DDR_2HCLK for DDR clk = 333MHz, synchronous operation
227  * Select CONFIG_DDR_HCLK for DDR clk = 166MHz, synchronous operation
228  * Select CONFIG_DDR_PLL2 for DDR clk = PLL2, asynchronous operation
229  */
230 #define CONFIG_DDR_2HCLK                1
231 #define CONFIG_DDR_HCLK                 0
232 #define CONFIG_DDR_PLL2                 0
233
234 /*
235  * xxx_BOOT_SUPPORTED macro defines whether a booting type is supported
236  * or not. Modify/Add to only these macros to define new boot types
237  */
238 #define USB_BOOT_SUPPORTED              0
239 #define PCIE_BOOT_SUPPORTED             0
240 #define SNOR_BOOT_SUPPORTED             1
241 #define NAND_BOOT_SUPPORTED             1
242 #define PNOR_BOOT_SUPPORTED             0
243 #define TFTP_BOOT_SUPPORTED             0
244 #define UART_BOOT_SUPPORTED             0
245 #define SPI_BOOT_SUPPORTED              0
246 #define I2C_BOOT_SUPPORTED              0
247 #define MMC_BOOT_SUPPORTED              0
248
249 #endif  /* __CONFIG_H */