1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * WORK Microwave work_92105 board configuration file
5 * (C) Copyright 2014 DENX Software Engineering GmbH
6 * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
9 #ifndef __CONFIG_WORK_92105_H__
10 #define __CONFIG_WORK_92105_H__
12 /* SoC and board defines */
13 #include <linux/sizes.h>
14 #include <asm/arch/cpu.h>
17 * Define work_92105 machine type by hand -- done only for compatibility
18 * with original board code
20 #define CONFIG_MACH_TYPE 736
22 #if !defined(CONFIG_SPL_BUILD)
23 #define CONFIG_SKIP_LOWLEVEL_INIT
27 * Memory configurations
29 #define CONFIG_SYS_MALLOC_LEN SZ_1M
30 #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
31 #define CONFIG_SYS_SDRAM_SIZE SZ_128M
33 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_512K \
34 - GENERATED_GBL_DATA_SIZE)
40 #define CONFIG_LPC32XX_ETH
41 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
42 /* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */
44 #define CONFIG_RTC_DS1374
47 * U-Boot General Configurations
49 #define CONFIG_SYS_CBSIZE 1024
50 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
53 * NAND chip timings for FIXME: which one?
56 #define CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333
57 #define CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000
58 #define CONFIG_LPC32XX_NAND_MLC_NAND_TA 18181818
59 #define CONFIG_LPC32XX_NAND_MLC_RD_HIGH 31250000
60 #define CONFIG_LPC32XX_NAND_MLC_RD_LOW 45454545
61 #define CONFIG_LPC32XX_NAND_MLC_WR_HIGH 40000000
62 #define CONFIG_LPC32XX_NAND_MLC_WR_LOW 83333333
68 /* driver configuration */
69 #define CONFIG_SYS_NAND_SELF_INIT
70 #define CONFIG_SYS_MAX_NAND_DEVICE 1
71 #define CONFIG_SYS_MAX_NAND_CHIPS 1
72 #define CONFIG_SYS_NAND_BASE MLC_NAND_BASE
73 #define CONFIG_NAND_LPC32XX_MLC
79 #define CONFIG_LPC32XX_GPIO
88 #define CONFIG_CMDLINE_TAG
89 #define CONFIG_SETUP_MEMORY_TAGS
90 #define CONFIG_INITRD_TAG
92 #define CONFIG_BOOTFILE "uImage"
98 /* SPL will be executed at offset 0 */
99 /* SPL will use SRAM as stack */
100 #define CONFIG_SPL_STACK 0x0000FFF8
101 /* Use the framework and generic lib */
102 /* SPL will use serial */
103 /* SPL will load U-Boot from NAND offset 0x40000 */
104 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00040000
105 #define CONFIG_SPL_PAD_TO 0x20000
106 /* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
107 #define CONFIG_SYS_MONITOR_LEN 0x40000 /* actually, MAX size */
108 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
109 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
112 * Include SoC specific configuration
114 #include <asm/arch/config.h>
116 #endif /* __CONFIG_WORK_92105_H__*/