2 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
6 * Configuration for the woodburn board.
8 * SPDX-License-Identifier: GPL-2.0+
11 #ifndef __WOODBURN_COMMON_CONFIG_H
12 #define __WOODBURN_COMMON_CONFIG_H
14 #include <asm/arch/imx-regs.h>
16 /* High Level Configuration Options */
18 #define CONFIG_MX35_HCLK_FREQ 24000000
19 #define CONFIG_SYS_FSL_CLK
21 #define CONFIG_SYS_DCACHE_OFF
23 /* Only in case the value is not present in mach-types.h */
24 #ifndef MACH_TYPE_FLEA3
25 #define MACH_TYPE_FLEA3 3668
28 #define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
30 /* This is required to setup the ESDC controller */
32 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
33 #define CONFIG_REVISION_TAG
34 #define CONFIG_SETUP_MEMORY_TAGS
35 #define CONFIG_INITRD_TAG
38 * Size of malloc() pool
40 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
45 #define CONFIG_SYS_I2C
46 #define CONFIG_SYS_I2C_MXC
47 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
48 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
49 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
50 #define CONFIG_SYS_SPD_BUS_NUM 0
51 #define CONFIG_MXC_SPI
52 #define CONFIG_MXC_GPIO
56 #define CONFIG_POWER_I2C
57 #define CONFIG_POWER_FSL
58 #define CONFIG_POWER_FSL_MC13892
59 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
60 #define CONFIG_RTC_MC13XXX
64 #define CONFIG_GENERIC_MMC
65 #define CONFIG_FSL_ESDHC
66 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
67 #define CONFIG_SYS_FSL_ESDHC_NUM 1
72 #define CONFIG_MXC_UART
73 #define CONFIG_MXC_UART_BASE UART1_BASE
75 /* allow to overwrite serial and ethaddr */
76 #define CONFIG_ENV_OVERWRITE
77 #define CONFIG_CONS_INDEX 1
78 #define CONFIG_BAUDRATE 115200
83 #define CONFIG_CMD_DATE
84 #define CONFIG_BOOTP_SUBNETMASK
85 #define CONFIG_BOOTP_GATEWAY
86 #define CONFIG_BOOTP_DNS
88 #define CONFIG_CMD_NAND
90 #define CONFIG_DOS_PARTITION
91 #define CONFIG_EFI_PARTITION
93 #define CONFIG_MXC_GPIO
95 #define CONFIG_NET_RETRY_COUNT 100
98 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
101 * Ethernet on SOC (FEC)
103 #define CONFIG_FEC_MXC
104 #define IMX_FEC_BASE FEC_BASE_ADDR
105 #define CONFIG_PHYLIB
106 #define CONFIG_PHY_MICREL
107 #define CONFIG_FEC_MXC_PHYADDR 0x1
110 #define CONFIG_DISCOVER_PHY
112 #define CONFIG_ARP_TIMEOUT 200UL
115 * Miscellaneous configurable options
117 #define CONFIG_SYS_LONGHELP /* undef to save memory */
118 #define CONFIG_CMDLINE_EDITING
120 #define CONFIG_AUTO_COMPLETE
121 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
122 /* Print Buffer Size */
123 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
124 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
125 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
127 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
128 #define CONFIG_SYS_MEMTEST_END 0x10000
130 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
135 * The stack sizes are set up in start.S using the settings below
137 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
140 * Physical Memory Map
142 #define CONFIG_NR_DRAM_BANKS 1
143 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
144 #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
146 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
148 #define CONFIG_SYS_GBL_DATA_OFFSET (LOW_LEVEL_SRAM_STACK - \
150 GENERATED_GBL_DATA_SIZE)
151 #define CONFIG_SYS_INIT_SP_ADDR (IRAM_BASE_ADDR + \
152 CONFIG_SYS_GBL_DATA_OFFSET)
155 * MTD Command for mtdparts
157 #define CONFIG_CMD_MTDPARTS
158 #define CONFIG_MTD_DEVICE
159 #define CONFIG_FLASH_CFI_MTD
160 #define CONFIG_MTD_PARTITIONS
161 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
162 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:50m(root1)," \
166 "10m(app2),-(spool);" \
167 "physmap-flash.0:512k(u-boot),64k(env1)," \
168 "64k(env2),3776k(kernel1),3776k(kernel2)"
171 * FLASH and environment organization
173 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
174 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
175 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
176 /* Monitor at beginning of flash */
177 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
178 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
180 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
181 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
183 /* Address and size of Redundant Environment Sector */
184 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
185 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
187 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
188 CONFIG_SYS_MONITOR_LEN)
190 #define CONFIG_ENV_IS_IN_FLASH
193 * CFI FLASH driver setup
195 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
196 #define CONFIG_FLASH_CFI_DRIVER
198 /* A non-standard buffered write algorithm */
199 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
200 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
203 * NAND FLASH driver setup
205 #define CONFIG_NAND_MXC
206 #define CONFIG_NAND_MXC_V1_1
207 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
208 #define CONFIG_SYS_MAX_NAND_DEVICE 1
209 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
210 #define CONFIG_MXC_NAND_HWECC
211 #define CONFIG_SYS_NAND_LARGEPAGE
214 #define CONFIG_MTD_DEBUG
215 #define CONFIG_MTD_DEBUG_VERBOSE 7
217 #define CONFIG_SYS_NAND_ONFI_DETECTION
220 * Default environment and default scripts
221 * to update uboot and load kernel
224 #define CONFIG_HOSTNAME woodburn
225 #define CONFIG_EXTRA_ENV_SETTINGS \
227 "nfsargs=setenv bootargs root=/dev/nfs rw " \
228 "nfsroot=${serverip}:${rootpath}\0" \
229 "ramargs=setenv bootargs root=/dev/ram rw\0" \
230 "addip_sta=setenv bootargs ${bootargs} " \
231 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
232 ":${hostname}:${netdev}:off panic=1\0" \
233 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
234 "addip=if test -n ${ipdyn};then run addip_dyn;" \
235 "else run addip_sta;fi\0" \
236 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
237 "addtty=setenv bootargs ${bootargs}" \
238 " console=ttymxc0,${baudrate}\0" \
239 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
240 "loadaddr=80800000\0" \
241 "kernel_addr_r=80800000\0" \
242 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
243 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
244 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \
245 "flash_self=run ramargs addip addtty addmtd addmisc;" \
246 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
247 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
248 "bootm ${kernel_addr}\0" \
249 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
250 "run nfsargs addip addtty addmtd addmisc;" \
251 "bootm ${kernel_addr_r}\0" \
252 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
253 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
254 "net_self=if run net_self_load;then " \
255 "run ramargs addip addtty addmtd addmisc;" \
256 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
257 "else echo Images not loades;fi\0" \
258 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
259 "load=tftp ${loadaddr} ${u-boot}\0" \
260 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
261 "update=protect off ${uboot_addr} +80000;" \
262 "erase ${uboot_addr} +80000;" \
263 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
264 "upd=if run load;then echo Updating u-boot;if run update;" \
265 "then echo U-Boot updated;" \
266 "else echo Error updating u-boot !;" \
267 "echo Board without bootloader !!;" \
269 "else echo U-Boot not downloaded..exiting;fi\0" \
270 "bootcmd=run net_nfs\0"
272 #endif /* __CONFIG_H */