Merge branch 'master' of git://git.denx.de/u-boot-socfpga
[platform/kernel/u-boot.git] / include / configs / woodburn_common.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
4  *
5  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
6  *
7  * Configuration for the woodburn board.
8  */
9
10 #ifndef __WOODBURN_COMMON_CONFIG_H
11 #define __WOODBURN_COMMON_CONFIG_H
12
13 #include <asm/arch/imx-regs.h>
14
15  /* High Level Configuration Options */
16 #define CONFIG_MX35
17 #define CONFIG_MX35_HCLK_FREQ   24000000
18 #define CONFIG_SYS_FSL_CLK
19
20 #define CONFIG_SYS_DCACHE_OFF
21
22 #define CONFIG_MACH_TYPE                MACH_TYPE_FLEA3
23
24 /* This is required to setup the ESDC controller */
25
26 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
27 #define CONFIG_REVISION_TAG
28 #define CONFIG_SETUP_MEMORY_TAGS
29 #define CONFIG_INITRD_TAG
30
31 /*
32  * Size of malloc() pool
33  */
34 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
35
36 /*
37  * Hardware drivers
38  */
39 #define CONFIG_SYS_I2C
40 #define CONFIG_SYS_I2C_MXC
41 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
42 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
43 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
44 #define CONFIG_SYS_SPD_BUS_NUM          0
45
46 /* PMIC Controller */
47 #define CONFIG_POWER
48 #define CONFIG_POWER_I2C
49 #define CONFIG_POWER_FSL
50 #define CONFIG_POWER_FSL_MC13892
51 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    0x8
52 #define CONFIG_RTC_MC13XXX
53
54 /* mmc driver */
55 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
56 #define CONFIG_SYS_FSL_ESDHC_NUM        1
57
58 /*
59  * UART (console)
60  */
61 #define CONFIG_MXC_UART
62 #define CONFIG_MXC_UART_BASE    UART1_BASE
63
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
66
67 /*
68  * Command definition
69  */
70
71 #define CONFIG_NET_RETRY_COUNT  100
72
73
74 #define CONFIG_LOADADDR         0x80800000      /* loadaddr env var */
75
76 /*
77  * Ethernet on SOC (FEC)
78  */
79 #define CONFIG_FEC_MXC
80 #define IMX_FEC_BASE    FEC_BASE_ADDR
81 #define CONFIG_FEC_MXC_PHYADDR  0x1
82
83 #define CONFIG_DISCOVER_PHY
84
85 #define CONFIG_ARP_TIMEOUT      200UL
86
87 /*
88  * Miscellaneous configurable options
89  */
90
91 #define CONFIG_SYS_MEMTEST_START        0       /* memtest works on */
92 #define CONFIG_SYS_MEMTEST_END          0x10000
93
94 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
95
96 /*
97  * Physical Memory Map
98  */
99 #define PHYS_SDRAM_1            CSD0_BASE_ADDR
100 #define PHYS_SDRAM_1_SIZE       (256 * 1024 * 1024)
101
102 #define CONFIG_SYS_SDRAM_BASE           CSD0_BASE_ADDR
103
104 #define CONFIG_SYS_GBL_DATA_OFFSET      (LOW_LEVEL_SRAM_STACK - \
105                                                 IRAM_BASE_ADDR - \
106                                                 GENERATED_GBL_DATA_SIZE)
107 #define CONFIG_SYS_INIT_SP_ADDR         (IRAM_BASE_ADDR + \
108                                         CONFIG_SYS_GBL_DATA_OFFSET)
109
110 /*
111  * MTD Command for mtdparts
112  */
113
114 /*
115  * FLASH and environment organization
116  */
117 #define CONFIG_SYS_FLASH_BASE           CS0_BASE_ADDR
118 #define CONFIG_SYS_MAX_FLASH_BANKS 1    /* max number of memory banks */
119 #define CONFIG_SYS_MAX_FLASH_SECT 512   /* max number of sectors on one chip */
120 /* Monitor at beginning of flash */
121 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
122 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
123
124 #define CONFIG_ENV_SECT_SIZE    (128 * 1024)
125 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
126
127 /* Address and size of Redundant Environment Sector     */
128 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
129 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
130
131 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE + \
132                                 CONFIG_SYS_MONITOR_LEN)
133
134 /*
135  * CFI FLASH driver setup
136  */
137
138 /* A non-standard buffered write algorithm */
139
140 /*
141  * NAND FLASH driver setup
142  */
143 #define CONFIG_NAND_MXC_V1_1
144 #define CONFIG_MXC_NAND_REGS_BASE       (NFC_BASE_ADDR)
145 #define CONFIG_SYS_MAX_NAND_DEVICE      1
146 #define CONFIG_SYS_NAND_BASE            (NFC_BASE_ADDR)
147 #define CONFIG_MXC_NAND_HWECC
148 #define CONFIG_SYS_NAND_LARGEPAGE
149
150 #define CONFIG_SYS_NAND_ONFI_DETECTION
151
152 /*
153  * Default environment and default scripts
154  * to update uboot and load kernel
155  */
156
157 #define CONFIG_HOSTNAME "woodburn"
158 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
159         "netdev=eth0\0"                                                 \
160         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
161                 "nfsroot=${serverip}:${rootpath}\0"                     \
162         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
163         "addip_sta=setenv bootargs ${bootargs} "                        \
164                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
165                 ":${hostname}:${netdev}:off panic=1\0"                  \
166         "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"               \
167         "addip=if test -n ${ipdyn};then run addip_dyn;"                 \
168                 "else run addip_sta;fi\0"       \
169         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
170         "addtty=setenv bootargs ${bootargs}"                            \
171                 " console=ttymxc0,${baudrate}\0"                        \
172         "addmisc=setenv bootargs ${bootargs} ${misc}\0"                 \
173         "loadaddr=80800000\0"                                           \
174         "kernel_addr_r=80800000\0"                                      \
175         "hostname=" CONFIG_HOSTNAME "\0"                        \
176         "bootfile=" CONFIG_HOSTNAME "/uImage\0"         \
177         "ramdisk_file=" CONFIG_HOSTNAME "/uRamdisk\0"   \
178         "flash_self=run ramargs addip addtty addmtd addmisc;"           \
179                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
180         "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
181                 "bootm ${kernel_addr}\0"                                \
182         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
183                 "run nfsargs addip addtty addmtd addmisc;"              \
184                 "bootm ${kernel_addr_r}\0"                              \
185         "net_self_load=tftp ${kernel_addr_r} ${bootfile};"              \
186                 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0"             \
187         "net_self=if run net_self_load;then "                           \
188                 "run ramargs addip addtty addmtd addmisc;"              \
189                 "bootm ${kernel_addr_r} ${ramdisk_addr_r};"             \
190                 "else echo Images not loades;fi\0"                      \
191         "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0"               \
192         "load=tftp ${loadaddr} ${u-boot}\0"                             \
193         "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"         \
194         "update=protect off ${uboot_addr} +80000;"                      \
195                 "erase ${uboot_addr} +80000;"                           \
196                 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"          \
197         "upd=if run load;then echo Updating u-boot;if run update;"      \
198                 "then echo U-Boot updated;"                             \
199                         "else echo Error updating u-boot !;"            \
200                         "echo Board without bootloader !!;"             \
201                 "fi;"                                                   \
202                 "else echo U-Boot not downloaded..exiting;fi\0"         \
203         "bootcmd=run net_nfs\0"
204
205 #endif                          /* __CONFIG_H */