2 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
6 * Configuration for the woodburn board.
8 * SPDX-License-Identifier: GPL-2.0+
11 #ifndef __WOODBURN_COMMON_CONFIG_H
12 #define __WOODBURN_COMMON_CONFIG_H
14 #include <asm/arch/imx-regs.h>
16 /* High Level Configuration Options */
18 #define CONFIG_MX35_HCLK_FREQ 24000000
19 #define CONFIG_SYS_FSL_CLK
21 #define CONFIG_SYS_DCACHE_OFF
23 /* Only in case the value is not present in mach-types.h */
24 #ifndef MACH_TYPE_FLEA3
25 #define MACH_TYPE_FLEA3 3668
28 #define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
30 /* This is required to setup the ESDC controller */
32 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
33 #define CONFIG_REVISION_TAG
34 #define CONFIG_SETUP_MEMORY_TAGS
35 #define CONFIG_INITRD_TAG
38 * Size of malloc() pool
40 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
45 #define CONFIG_SYS_I2C
46 #define CONFIG_SYS_I2C_MXC
47 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
48 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
49 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
50 #define CONFIG_SYS_SPD_BUS_NUM 0
51 #define CONFIG_MXC_SPI
52 #define CONFIG_MXC_GPIO
56 #define CONFIG_POWER_I2C
57 #define CONFIG_POWER_FSL
58 #define CONFIG_POWER_FSL_MC13892
59 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
60 #define CONFIG_RTC_MC13XXX
63 #define CONFIG_GENERIC_MMC
64 #define CONFIG_FSL_ESDHC
65 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
66 #define CONFIG_SYS_FSL_ESDHC_NUM 1
71 #define CONFIG_MXC_UART
72 #define CONFIG_MXC_UART_BASE UART1_BASE
74 /* allow to overwrite serial and ethaddr */
75 #define CONFIG_ENV_OVERWRITE
76 #define CONFIG_CONS_INDEX 1
77 #define CONFIG_BAUDRATE 115200
82 #define CONFIG_CMD_DATE
83 #define CONFIG_BOOTP_SUBNETMASK
84 #define CONFIG_BOOTP_GATEWAY
85 #define CONFIG_BOOTP_DNS
87 #define CONFIG_CMD_NAND
89 #define CONFIG_DOS_PARTITION
90 #define CONFIG_EFI_PARTITION
92 #define CONFIG_MXC_GPIO
94 #define CONFIG_NET_RETRY_COUNT 100
97 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
100 * Ethernet on SOC (FEC)
102 #define CONFIG_FEC_MXC
103 #define IMX_FEC_BASE FEC_BASE_ADDR
104 #define CONFIG_PHYLIB
105 #define CONFIG_PHY_MICREL
106 #define CONFIG_FEC_MXC_PHYADDR 0x1
109 #define CONFIG_DISCOVER_PHY
111 #define CONFIG_ARP_TIMEOUT 200UL
114 * Miscellaneous configurable options
116 #define CONFIG_SYS_LONGHELP /* undef to save memory */
117 #define CONFIG_CMDLINE_EDITING
119 #define CONFIG_AUTO_COMPLETE
120 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
121 /* Print Buffer Size */
122 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
123 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
124 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
126 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
127 #define CONFIG_SYS_MEMTEST_END 0x10000
129 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
134 * The stack sizes are set up in start.S using the settings below
136 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
139 * Physical Memory Map
141 #define CONFIG_NR_DRAM_BANKS 1
142 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
143 #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
145 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
147 #define CONFIG_SYS_GBL_DATA_OFFSET (LOW_LEVEL_SRAM_STACK - \
149 GENERATED_GBL_DATA_SIZE)
150 #define CONFIG_SYS_INIT_SP_ADDR (IRAM_BASE_ADDR + \
151 CONFIG_SYS_GBL_DATA_OFFSET)
154 * MTD Command for mtdparts
156 #define CONFIG_CMD_MTDPARTS
157 #define CONFIG_MTD_DEVICE
158 #define CONFIG_FLASH_CFI_MTD
159 #define CONFIG_MTD_PARTITIONS
160 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
161 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:50m(root1)," \
165 "10m(app2),-(spool);" \
166 "physmap-flash.0:512k(u-boot),64k(env1)," \
167 "64k(env2),3776k(kernel1),3776k(kernel2)"
170 * FLASH and environment organization
172 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
173 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
174 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
175 /* Monitor at beginning of flash */
176 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
177 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
179 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
180 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
182 /* Address and size of Redundant Environment Sector */
183 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
184 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
186 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
187 CONFIG_SYS_MONITOR_LEN)
189 #define CONFIG_ENV_IS_IN_FLASH
192 * CFI FLASH driver setup
194 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
195 #define CONFIG_FLASH_CFI_DRIVER
197 /* A non-standard buffered write algorithm */
198 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
199 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
202 * NAND FLASH driver setup
204 #define CONFIG_NAND_MXC
205 #define CONFIG_NAND_MXC_V1_1
206 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
207 #define CONFIG_SYS_MAX_NAND_DEVICE 1
208 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
209 #define CONFIG_MXC_NAND_HWECC
210 #define CONFIG_SYS_NAND_LARGEPAGE
213 #define CONFIG_MTD_DEBUG
214 #define CONFIG_MTD_DEBUG_VERBOSE 7
216 #define CONFIG_SYS_NAND_ONFI_DETECTION
219 * Default environment and default scripts
220 * to update uboot and load kernel
223 #define CONFIG_HOSTNAME woodburn
224 #define CONFIG_EXTRA_ENV_SETTINGS \
226 "nfsargs=setenv bootargs root=/dev/nfs rw " \
227 "nfsroot=${serverip}:${rootpath}\0" \
228 "ramargs=setenv bootargs root=/dev/ram rw\0" \
229 "addip_sta=setenv bootargs ${bootargs} " \
230 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
231 ":${hostname}:${netdev}:off panic=1\0" \
232 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
233 "addip=if test -n ${ipdyn};then run addip_dyn;" \
234 "else run addip_sta;fi\0" \
235 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
236 "addtty=setenv bootargs ${bootargs}" \
237 " console=ttymxc0,${baudrate}\0" \
238 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
239 "loadaddr=80800000\0" \
240 "kernel_addr_r=80800000\0" \
241 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
242 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
243 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \
244 "flash_self=run ramargs addip addtty addmtd addmisc;" \
245 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
246 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
247 "bootm ${kernel_addr}\0" \
248 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
249 "run nfsargs addip addtty addmtd addmisc;" \
250 "bootm ${kernel_addr_r}\0" \
251 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
252 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
253 "net_self=if run net_self_load;then " \
254 "run ramargs addip addtty addmtd addmisc;" \
255 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
256 "else echo Images not loades;fi\0" \
257 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
258 "load=tftp ${loadaddr} ${u-boot}\0" \
259 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
260 "update=protect off ${uboot_addr} +80000;" \
261 "erase ${uboot_addr} +80000;" \
262 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
263 "upd=if run load;then echo Updating u-boot;if run update;" \
264 "then echo U-Boot updated;" \
265 "else echo Error updating u-boot !;" \
266 "echo Board without bootloader !!;" \
268 "else echo U-Boot not downloaded..exiting;fi\0" \
269 "bootcmd=run net_nfs\0"
271 #endif /* __CONFIG_H */